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| author | Marek Vasut <marex@denx.de> | 2024-01-19 17:08:32 +0100 |
|---|---|---|
| committer | Fabio Estevam <festevam@gmail.com> | 2024-01-22 08:39:08 -0300 |
| commit | 67de291400725155afc637a18207a726781aa432 (patch) | |
| tree | b6fbb8632608e3e3bd874e023f395fde68554a0a /configs | |
| parent | 4dd80cb09ec333035a0cb812cae123dac568807c (diff) | |
| download | u-boot-67de291400725155afc637a18207a726781aa432.zip u-boot-67de291400725155afc637a18207a726781aa432.tar.gz u-boot-67de291400725155afc637a18207a726781aa432.tar.bz2 | |
ARM: imx: Configure GIC clock parent on Data Modul i.MX8M Plus eDM SBC
The CONFIG_SPL_BOARD_INIT lets SPL common code call spl_board_init()
during the SPL start up. On this particular system, spl_board_init()
is used to reconfigure GIC clock parent to PLL2 500M, which is the
configuration expected by the Linux kernel. Enable SPL_BOARD_INIT
and fill in the GIC clock configuration code.
Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not
allow to change it. Should set the clock after PMIC setting done.
Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for
ND VDD_SOC.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/imx8mp_data_modul_edm_sbc_defconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/configs/imx8mp_data_modul_edm_sbc_defconfig b/configs/imx8mp_data_modul_edm_sbc_defconfig index ba4730a..fb4fb67 100644 --- a/configs/imx8mp_data_modul_edm_sbc_defconfig +++ b/configs/imx8mp_data_modul_edm_sbc_defconfig @@ -59,6 +59,7 @@ CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x96fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |