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| author | Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> | 2016-01-13 16:25:37 +0530 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2016-09-22 07:33:21 +0200 |
| commit | 6b2450143882987f4287ea78783866c5f9ac4aff (patch) | |
| tree | d9b34e4e26cd9269e33da98c50161f4c7f714c26 /configs | |
| parent | 5242772c5113850c0c35d6271fd281dfc669c707 (diff) | |
| download | u-boot-6b2450143882987f4287ea78783866c5f9ac4aff.zip u-boot-6b2450143882987f4287ea78783866c5f9ac4aff.tar.gz u-boot-6b2450143882987f4287ea78783866c5f9ac4aff.tar.bz2 | |
fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP
Add PL bitstream dowload support for ZynqMP
Bitstream will be validated by uboot and loaded
to PL by invoking an smc instruction to ATF which route this request to
PMU FW which will take care of loading it to PL
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/xilinx_zynqmp_ep_defconfig | 2 | ||||
| -rw-r--r-- | configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 2 | ||||
| -rw-r--r-- | configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 2 | ||||
| -rw-r--r-- | configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 2 | ||||
| -rw-r--r-- | configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 2 | ||||
| -rw-r--r-- | configs/xilinx_zynqmp_zcu102_defconfig | 2 | ||||
| -rw-r--r-- | configs/xilinx_zynqmp_zcu102_revB_defconfig | 2 |
7 files changed, 14 insertions, 0 deletions
diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig index 196eb69..e7dc1c6 100644 --- a/configs/xilinx_zynqmp_ep_defconfig +++ b/configs/xilinx_zynqmp_ep_defconfig @@ -46,6 +46,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BLK=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index a3fb226..6afacd2 100644 --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@ -38,6 +38,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BLK=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig index aec4f9b..4068c28 100644 --- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig @@ -41,6 +41,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BLK=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig index 0b2ebb1..5116ff3 100644 --- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig @@ -34,6 +34,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BLK=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig index f570b2a..1a27bd0 100644 --- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig @@ -33,6 +33,8 @@ CONFIG_OF_EMBED=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BLK=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y diff --git a/configs/xilinx_zynqmp_zcu102_defconfig b/configs/xilinx_zynqmp_zcu102_defconfig index 8fcb2fd..78db9d9 100644 --- a/configs/xilinx_zynqmp_zcu102_defconfig +++ b/configs/xilinx_zynqmp_zcu102_defconfig @@ -38,6 +38,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BLK=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y CONFIG_DM_MMC=y CONFIG_DM_MMC_OPS=y diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig index b7ba599..6276282 100644 --- a/configs/xilinx_zynqmp_zcu102_revB_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig @@ -38,6 +38,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BLK=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y CONFIG_DM_MMC=y CONFIG_DM_MMC_OPS=y |