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| author | Ioana Ciornei <ioana.ciornei@nxp.com> | 2020-04-27 15:21:17 +0300 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2020-05-19 09:22:08 +0530 |
| commit | c0be08a577567eb10230934b5fa9de6a9a106824 (patch) | |
| tree | 82c4082d4947e10dd67196be85515f54ac40566a /configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | |
| parent | f49613f4aa19c41051b9a5436898d7a2e459b3e4 (diff) | |
| download | u-boot-c0be08a577567eb10230934b5fa9de6a9a106824.zip u-boot-c0be08a577567eb10230934b5fa9de6a9a106824.tar.gz u-boot-c0be08a577567eb10230934b5fa9de6a9a106824.tar.bz2 | |
configs: lx2160aqds_tfa_defconfig: enable DM_ETH and related
Enable CONFIG_DM_ETH and CONFIG_DM_MDIO and related configs for the
LX2160AQDS board.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'configs/lx2160aqds_tfa_SECURE_BOOT_defconfig')
| -rw-r--r-- | configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index cd7b413..51d5dc3 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2 CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -31,6 +32,8 @@ CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_OF_BOARD_FIXUP=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds" +CONFIG_OF_LIST="fsl-lx2160a-qds-3-x-x fsl-lx2160a-qds-7-x-x fsl-lx2160a-qds-19-x-x fsl-lx2160a-qds-20-x-x fsl-lx2160a-qds-3-11-x fsl-lx2160a-qds-7-11-x fsl-lx2160a-qds-7-11-x fsl-lx2160a-qds-19-11-x fsl-lx2160a-qds-20-11-x" +CONFIG_MULTI_DTB_FIT=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y @@ -53,7 +56,12 @@ CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y CONFIG_PHY_REALTEK=y CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y CONFIG_E1000=y +CONFIG_MDIO_MUX_I2CREG=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y |