diff options
| author | Tom Rini <trini@konsulko.com> | 2023-05-19 10:13:33 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-05-19 10:13:33 -0400 |
| commit | 62df7a39442902a71259568c13a4d496d5a514f4 (patch) | |
| tree | 92444cff8a17e4b3de6d49672c1a9ccea23ea879 /configs/evb-rk3588_defconfig | |
| parent | 6e1852ca2c418e2536ead4b51c4d84a59926b3f1 (diff) | |
| parent | fd6e425be243dce518a02710482514faccf3c211 (diff) | |
| download | u-boot-WIP/19May2023.zip u-boot-WIP/19May2023.tar.gz u-boot-WIP/19May2023.tar.bz2 | |
Merge tag 'u-boot-rockchip-20230519' of https://source.denx.de/u-boot/custodians/u-boot-rockchipWIP/19May2023
rk3588 driver:
- Sync the reset driver with kernel code;
- Enable pcie controller and phy support;
- Enable USB controller and phy support;
Board level dts and config update:
- boost eMMC performance for some of rk3399 boards;
- boot from SPI NOR flash for rk356x boards;
- Other board level updates;
Diffstat (limited to 'configs/evb-rk3588_defconfig')
| -rw-r--r-- | configs/evb-rk3588_defconfig | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/configs/evb-rk3588_defconfig b/configs/evb-rk3588_defconfig index 7911cc7..d5f1c4b 100644 --- a/configs/evb-rk3588_defconfig +++ b/configs/evb-rk3588_defconfig @@ -9,7 +9,6 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-evb1-v10" -CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y CONFIG_SPL_SERIAL=y @@ -22,12 +21,13 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-evb1-v10.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x4000000 @@ -36,14 +36,15 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -63,6 +64,6 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y CONFIG_ERRNO_STR=y |