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| author | Robert Marko <robert.marko@sartura.hr> | 2022-05-20 13:46:32 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2022-07-21 10:14:04 +0200 |
| commit | b4108f3fd35b073b3ecd9845ef9a7695ab70238a (patch) | |
| tree | b4e4cac5b1e1bb2b7e72c21d1b9ced7e05518ab4 /configs/eDPU_defconfig | |
| parent | 58b39652bb1ac071c4338b999d1529d0c4163445 (diff) | |
| download | u-boot-b4108f3fd35b073b3ecd9845ef9a7695ab70238a.zip u-boot-b4108f3fd35b073b3ecd9845ef9a7695ab70238a.tar.gz u-boot-b4108f3fd35b073b3ecd9845ef9a7695ab70238a.tar.bz2 | |
arm: mvebu: add support for Methode eDPU
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not
work under U-boot.
In order to reduce duplication, split the uDPU DTS into a common one.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'configs/eDPU_defconfig')
| -rw-r--r-- | configs/eDPU_defconfig | 100 |
1 files changed, 100 insertions, 0 deletions
diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig new file mode 100644 index 0000000..f1849cd --- /dev/null +++ b/configs/eDPU_defconfig @@ -0,0 +1,100 @@ +CONFIG_ARM=y +CONFIG_ARCH_CPU_INIT=y +CONFIG_ARCH_MVEBU=y +CONFIG_SYS_TEXT_BASE=0x00000000 +CONFIG_TARGET_MVEBU_ARMADA_37XX=y +CONFIG_MVEBU_EFUSE=y +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x180000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-eDPU" +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_SYS_LOAD_ADDR=0x6000000 +CONFIG_DEBUG_UART=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_USE_PREBOOT=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_ARCH_EARLY_INIT_R=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_PROMPT="eDPU>> " +CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1048 +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +# CONFIG_CMD_SCSI is not set +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_MVEBU_BUBT=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_MAC_PARTITION=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y +CONFIG_CLK=y +CONFIG_CLK_MVEBU=y +CONFIG_DM_I2C=y +CONFIG_DM_I2C_GPIO=y +CONFIG_SYS_I2C_MV=y +CONFIG_MISC=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_XENON=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_FIXED=y +CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y +CONFIG_MVMDIO=y +CONFIG_PHY=y +CONFIG_MVEBU_COMPHY_SUPPORT=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SCSI=y +CONFIG_MVEBU_A3700_UART=y +CONFIG_MVEBU_A3700_SPI=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_LZO=y |