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authorTom Rini <trini@konsulko.com>2022-01-10 14:01:57 -0500
committerTom Rini <trini@konsulko.com>2022-01-10 14:01:57 -0500
commitfe04d885fb540b614a2f989e16e808b300ccb52e (patch)
tree613d413c36bda908658fe4c6a24fb1a61de716ce /configs/chromebook_coral_defconfig
parentd637294e264adfeb29f390dfc393106fd4d41b17 (diff)
parent0dadad6d7c5769d6258baeaf1b8db843b0dfa01f (diff)
downloadu-boot-WIP/10Jan2022.zip
u-boot-WIP/10Jan2022.tar.gz
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Merge branch 'next'WIP/10Jan2022
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'configs/chromebook_coral_defconfig')
-rw-r--r--configs/chromebook_coral_defconfig3
1 files changed, 3 insertions, 0 deletions
diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig
index 321ad7d..785314a 100644
--- a/configs/chromebook_coral_defconfig
+++ b/configs/chromebook_coral_defconfig
@@ -6,6 +6,7 @@ CONFIG_MAX_CPUS=8
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="chromebook_coral"
CONFIG_SPL_TEXT_BASE=0xfef10000
+CONFIG_TPL_TEXT_BASE=0xffff8000
CONFIG_SPL_SYS_MALLOC_F_LEN=0xf000
CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -31,6 +32,8 @@ CONFIG_SPL_BOOTSTAGE_RECORD_COUNT=10
CONFIG_BOOTSTAGE_STASH=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS_SUBST=y
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="tpm init; tpm startup TPM2_SU_CLEAR; read mmc 0:2 100000 0 80; setexpr loader *001004f0; setexpr size *00100518; setexpr blocks $size / 200; read mmc 0:2 100000 80 $blocks; setexpr setup $loader - 1000; setexpr cmdline_ptr $loader - 2000; setexpr.s cmdline *$cmdline_ptr; setexpr cmdline gsub %U \\\\${uuid}; if part uuid mmc 0:2 uuid; then zboot start 100000 0 0 0 $setup cmdline; zboot load; zboot setup; zboot dump; zboot go;fi"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_LAST_STAGE_INIT=y