Merge tag 'xilinx-for-v2022.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblazeWIP/19Jan2022

Xilinx changes for v2022.04-rc1

gpio:
- Add modepin driver

net:
- Save random mac addresses to eth variable

zynqmp gem:
- Add support for mdio bus DT description
- Add support for reset and SGMII phy configuration
- Reduce timeout for MDIO accesses

zynqmp clk:
- Fix clock handling for gem and usb

phy:
- Add zynqmp phy/serdes driver

serial:
- Add one missing compatible string

microblaze:
- Symbol alignement
- SPL fixups
- Code cleanups

zynqmp:
- Various dt changes, DP pre-reloc, gem resets, gem clocks
- Switch SOM to shared psu configuration
- Move dcache handling to firmware driver
- Workaround gmii2rgmii DT description issue
- Enable broadcasts again
- Change firmware enablement logic
- Small adjustement in firmware driver

versal:
- Support new mmc@ DT nodes
- Fix run time variable handling
- Add missing I2C_PMC ID for power domain

5 files changed, 95 insertions, 133 deletions

diff --git a/board/xilinx/Kconfig b/board/xilinx/Kconfig
index 64507b5..1788066 100644
--- a/board/xilinx/Kconfig
+++ b/board/xilinx/Kconfig
@@ -43,6 +43,7 @@ endif
 config XILINX_OF_BOARD_DTB_ADDR
 	hex "Default DTB pickup address"
 	default 0x1000 if ARCH_VERSAL
+	default 0x8000 if MICROBLAZE
 	default 0x100000 if ARCH_ZYNQ || ARCH_ZYNQMP
 	depends on OF_BOARD || OF_SEPARATE
 	help
diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig
index f2fa0f7..e31257d 100644
--- a/board/xilinx/microblaze-generic/Kconfig
+++ b/board/xilinx/microblaze-generic/Kconfig
@@ -38,4 +38,20 @@ config XILINX_MICROBLAZE0_HW_VER
 	string "Core version number"
 	default "7.10.d"
 
+config XILINX_MICROBLAZE0_USR_EXCEP
+	bool "MicroBlaze user exception support"
+	default y
+	help
+	  Enable this option in order to install the user exception handler
+	  (_exception_handler routine from arch/microblaze/cpu/exception.c) in
+	  the exception vector table. The user exception vector is located at
+	  C_BASE_VECTORS + 0x8 address.
+
+config XILINX_MICROBLAZE0_VECTOR_BASE_ADDR
+	hex "Location of MicroBlaze vectors"
+	default 0x0
+	help
+	  Memory address location of the exception vector table. It is
+	  configurable via the C_BASE_VECTORS hdl parameter.
+
 endif
diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index 6045eb2..299e128 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -151,6 +151,8 @@ int board_late_init(void)
 	case EMMC_MODE:
 		puts("EMMC_MODE\n");
 		if (uclass_get_device_by_name(UCLASS_MMC,
+					      "mmc@f1050000", &dev) &&
+		    uclass_get_device_by_name(UCLASS_MMC,
 					      "sdhci@f1050000", &dev)) {
 			puts("Boot from EMMC but without SD1 enabled!\n");
 			return -1;
@@ -162,6 +164,8 @@ int board_late_init(void)
 	case SD_MODE:
 		puts("SD_MODE\n");
 		if (uclass_get_device_by_name(UCLASS_MMC,
+					      "mmc@f1040000", &dev) &&
+		    uclass_get_device_by_name(UCLASS_MMC,
 					      "sdhci@f1040000", &dev)) {
 			puts("Boot from SD0 but without SD0 enabled!\n");
 			return -1;
@@ -177,6 +181,8 @@ int board_late_init(void)
 	case SD_MODE1:
 		puts("SD_MODE1\n");
 		if (uclass_get_device_by_name(UCLASS_MMC,
+					      "mmc@f1050000", &dev) &&
+		    uclass_get_device_by_name(UCLASS_MMC,
 					      "sdhci@f1050000", &dev)) {
 			puts("Boot from SD1 but without SD1 enabled!\n");
 			return -1;
@@ -263,13 +269,13 @@ enum env_location env_get_location(enum env_operation op, int prio)
 			return ENVL_FAT;
 		if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4))
 			return ENVL_EXT4;
-		return ENVL_UNKNOWN;
+		return ENVL_NOWHERE;
 	case OSPI_MODE:
 	case QSPI_MODE_24BIT:
 	case QSPI_MODE_32BIT:
 		if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH))
 			return ENVL_SPI_FLASH;
-		return ENVL_UNKNOWN;
+		return ENVL_NOWHERE;
 	case JTAG_MODE:
 	default:
 		return ENVL_NOWHERE;
diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c
index b15c0f5..5a277c7 100644
--- a/board/xilinx/zynqmp/cmds.c
+++ b/board/xilinx/zynqmp/cmds.c
@@ -211,7 +211,6 @@ static int do_zynqmp_pmufw(struct cmd_tbl *cmdtp, int flag, int argc,
 
 	addr = hextoul(argv[2], NULL);
 	size = hextoul(argv[3], NULL);
-	flush_dcache_range((ulong)addr, (ulong)(addr + size));
 
 	zynqmp_pmufw_load_config_object((const void *)(uintptr_t)addr,
 					(size_t)size);
diff --git a/board/xilinx/zynqmp/zynqmp-sm-k26-revA/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-sm-k26-revA/psu_init_gpl.c
index c448f2a..ed02579 100644
--- a/board/xilinx/zynqmp/zynqmp-sm-k26-revA/psu_init_gpl.c
+++ b/board/xilinx/zynqmp/zynqmp-sm-k26-revA/psu_init_gpl.c
@@ -9,33 +9,31 @@
 static unsigned long psu_pll_init_data(void)
 {
 	psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U);
-	psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U);
+	psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014000U);
 	psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U);
 	psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U);
 	psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U);
 	mask_poll(0xFF5E0040, 0x00000002U);
 	psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U);
-	psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U);
-	psu_mask_write(0xFF5E0038, 0x8000FFFFU, 0x00000000U);
+	psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000200U);
 	psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012300U);
-	psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E672C6CU);
-	psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00002D00U);
+	psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E4E2C62U);
+	psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00013C00U);
 	psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U);
 	psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U);
 	psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U);
 	mask_poll(0xFF5E0040, 0x00000001U);
 	psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U);
-	psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U);
-	psu_mask_write(0xFF5E0028, 0x8000FFFFU, 0x00000000U);
+	psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000200U);
 	psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
-	psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U);
+	psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00015000U);
 	psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U);
 	psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U);
 	psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U);
 	mask_poll(0xFD1A0044, 0x00000001U);
 	psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U);
 	psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U);
-	psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x00000000U);
+	psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x80000033U);
 	psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
 	psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U);
 	psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U);
@@ -43,58 +41,43 @@ static unsigned long psu_pll_init_data(void)
 	psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U);
 	mask_poll(0xFD1A0044, 0x00000002U);
 	psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U);
-	psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U);
-	psu_mask_write(0xFD1A0034, 0x8000FFFFU, 0x00000000U);
-	psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C62U);
-	psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00014700U);
+	psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000200U);
+	psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C82U);
+	psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00015A00U);
 	psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U);
 	psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U);
 	psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U);
 	mask_poll(0xFD1A0044, 0x00000004U);
 	psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U);
 	psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U);
-	psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x00000000U);
 
 	return 1;
 }
 
 static unsigned long psu_clock_init_data(void)
 {
-	psu_mask_write(0xFF5E005C, 0x063F3F07U, 0x06010C00U);
-	psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U);
-	psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U);
-	psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x020F0500U);
-	psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010C00U);
-	psu_mask_write(0xFF5E006C, 0x013F3F07U, 0x01010800U);
-	psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010800U);
-	psu_mask_write(0xFF18030C, 0x00020003U, 0x00000000U);
-	psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U);
-	psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U);
-	psu_mask_write(0xFF5E0080, 0x013F3F07U, 0x01010800U);
-	psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U);
-	psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U);
-	psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U);
-	psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
-	psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
-	psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
-	psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
-	psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U);
-	psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01040F00U);
-	psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010500U);
-	psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010400U);
-	psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U);
+	psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010800U);
+	psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010A00U);
+	psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010A00U);
+	psu_mask_write(0xFF5E0080, 0x013F3F07U, 0x01010500U);
+	psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000200U);
+	psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000402U);
+	psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000500U);
+	psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000202U);
+	psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000A02U);
+	psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000402U);
+	psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000202U);
+	psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010A00U);
+	psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01010A00U);
+	psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011402U);
 	psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U);
-	psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U);
-	psu_mask_write(0xFD1A00A0, 0x01003F07U, 0x01000200U);
-	psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010400U);
-	psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01011003U);
-	psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01010F03U);
+	psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000A00U);
 	psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
 	psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U);
 	psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U);
 	psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U);
-	psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U);
-	psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U);
+	psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000203U);
+	psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000300U);
 	psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U);
 	psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U);
 	psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U);
@@ -133,8 +116,8 @@ static unsigned long psu_ddr_init_data(void)
 	psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U);
 	psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U);
 	psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU);
-	psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x11102411U);
-	psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00040419U);
+	psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x11102412U);
+	psu_mask_write(0xFD070104, 0x001F1F7FU, 0x0004041AU);
 	psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0708060DU);
 	psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU);
 	psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030409U);
@@ -234,14 +217,14 @@ static unsigned long psu_ddr_init_data(void)
 	psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U);
 	psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U);
 	psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD0800C4, 0xFFFFFFFFU, 0x000000E3U);
+	psu_mask_write(0xFD0800C4, 0xFFFFFFFFU, 0x000000E4U);
 	psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU);
-	psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x07221008U);
+	psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x07241008U);
 	psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28200008U);
 	psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x000F0300U);
 	psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U);
 	psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01762B07U);
-	psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00311008U);
+	psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00331008U);
 	psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000E10U);
 	psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U);
 	psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U);
@@ -407,90 +390,63 @@ static unsigned long psu_mio_init_data(void)
 	psu_mask_write(0xFF180028, 0x000000FEU, 0x00000080U);
 	psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000080U);
 	psu_mask_write(0xFF180030, 0x000000FEU, 0x00000000U);
-	psu_mask_write(0xFF180034, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF180038, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF180040, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF180044, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF180048, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF18004C, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF180050, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF180054, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF180058, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000008U);
+	psu_mask_write(0xFF180034, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180038, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180040, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180044, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180048, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF18004C, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180050, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180054, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180058, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000000U);
 	psu_mask_write(0xFF180060, 0x000000FEU, 0x00000040U);
 	psu_mask_write(0xFF180064, 0x000000FEU, 0x00000040U);
 	psu_mask_write(0xFF180068, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000018U);
-	psu_mask_write(0xFF180070, 0x000000FEU, 0x00000018U);
-	psu_mask_write(0xFF180074, 0x000000FEU, 0x00000018U);
-	psu_mask_write(0xFF180078, 0x000000FEU, 0x00000018U);
+	psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180070, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180074, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180078, 0x000000FEU, 0x00000000U);
 	psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000008U);
 	psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U);
 	psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U);
 	psu_mask_write(0xFF180090, 0x000000FEU, 0x000000C0U);
 	psu_mask_write(0xFF180094, 0x000000FEU, 0x000000C0U);
 	psu_mask_write(0xFF180098, 0x000000FEU, 0x00000000U);
-	psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000010U);
+	psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000000U);
 	psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000000U);
 	psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000000U);
-	psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF180100, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180104, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180108, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180110, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180114, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180118, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180120, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180124, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180128, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U);
-	psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U);
-	psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0xD4000000U);
-	psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B02020U);
-	psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U);
-	psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU);
+	psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x84000000U);
+	psu_mask_write(0xFF180208, 0x000FFFFFU, 0x00000020U);
+	psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x00000000U);
 	psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU);
 	psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U);
 	psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU);
 	psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU);
-	psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U);
-	psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU);
+	psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x03FFFFFFU);
+	psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x00080835U);
 	psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU);
 	psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U);
 	psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU);
 	psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU);
-	psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U);
-	psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU);
+	psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x03F7F7CAU);
+	psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x00FC000BU);
 	psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU);
 	psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U);
 	psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU);
-	psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x0357FFFFU);
-	psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U);
+	psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU);
+	psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x0303FFF4U);
 	psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U);
 
 	return 1;
@@ -506,24 +462,15 @@ static unsigned long psu_peripherals_pre_init_data(void)
 
 static unsigned long psu_peripherals_init_data(void)
 {
-	psu_mask_write(0xFD1A0100, 0x0001007EU, 0x00000000U);
+	psu_mask_write(0xFD1A0100, 0x0000807CU, 0x00000000U);
 	psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U);
 	psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U);
-	psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U);
 	psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U);
 	psu_mask_write(0xFF180390, 0x00000004U, 0x00000004U);
-	psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U);
-	psu_mask_write(0xFF5E0238, 0x00000060U, 0x00000000U);
-	psu_mask_write(0xFF180310, 0x00008001U, 0x00000001U);
-	psu_mask_write(0xFF180320, 0x33843384U, 0x02841284U);
-	psu_mask_write(0xFF18031C, 0x00007FFEU, 0x00006450U);
-	psu_mask_write(0xFF180358, 0x00080000U, 0x00080000U);
-	psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U);
-	psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U);
-	psu_mask_write(0xFF180324, 0x000003C0U, 0x00000000U);
-	psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U);
 	psu_mask_write(0xFF5E0238, 0x00000400U, 0x00000000U);
+	psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U);
 	psu_mask_write(0xFF5E0238, 0x00000010U, 0x00000000U);
+	psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U);
 	psu_mask_write(0xFF5E0238, 0x00000004U, 0x00000000U);
 	psu_mask_write(0xFF010034, 0x000000FFU, 0x00000006U);
 	psu_mask_write(0xFF010018, 0x0000FFFFU, 0x0000007CU);
@@ -536,13 +483,6 @@ static unsigned long psu_peripherals_init_data(void)
 	psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
 	psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD18U);
 	psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
-	psu_mask_write(0xFF0A0244, 0x03FFFFFFU, 0x00040000U);
-	psu_mask_write(0xFF0A0248, 0x03FFFFFFU, 0x00040000U);
-	psu_mask_write(0xFF0A000C, 0x03FF03FFU, 0x03FB0004U);
-	mask_delay(1);
-	psu_mask_write(0xFF0A000C, 0x03FF03FFU, 0x03FB0000U);
-	mask_delay(5);
-	psu_mask_write(0xFF0A000C, 0x03FF03FFU, 0x03FB0004U);
 	return 1;
 }