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authorTom Rini <trini@konsulko.com>2020-05-20 08:46:56 -0400
committerTom Rini <trini@konsulko.com>2020-05-20 08:46:56 -0400
commitb0b13f4114d30b6756e0f6f3b5819d78de22541e (patch)
tree5e3afc6650d3b9f6040e1d51972120eb3ee2f35e /board
parent023329284dadbbe7e0ed40bcda8101653997e507 (diff)
parent13bc860727ee406f073c8176dd2d6b9dacf35443 (diff)
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Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add DM_ETH support for lx2160aqds, ls2080aqds, ls1088aqds - QSI related fixes on ls1012a, ls2080a, ls1046a, ls1088a, ls1043a based platforms - Bug-fixes/updtaes related to ls1046afrwy, fsl-mc, msi-map property
Diffstat (limited to 'board')
-rw-r--r--board/freescale/ls1088a/eth_ls1088aqds.c89
-rw-r--r--board/freescale/ls2080aqds/eth.c112
-rw-r--r--board/freescale/ls2080aqds/ls2080aqds.c4
-rw-r--r--board/freescale/lx2160a/eth_lx2160aqds.c119
-rw-r--r--board/freescale/lx2160a/lx2160a.c5
5 files changed, 326 insertions, 3 deletions
diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c
index 8371c1c..e5d9d94 100644
--- a/board/freescale/ls1088a/eth_ls1088aqds.c
+++ b/board/freescale/ls1088a/eth_ls1088aqds.c
@@ -26,6 +26,7 @@
#include "ls1088a_qixis.h"
+#ifndef CONFIG_DM_ETH
#ifdef CONFIG_FSL_MC_ENET
#define SFP_TX 0
@@ -737,6 +738,7 @@ int board_eth_init(bd_t *bis)
error = pci_eth_init(bis);
return error;
}
+#endif // !CONFIG_DM_ETH
#if defined(CONFIG_RESET_PHY_R)
void reset_phy(void)
@@ -744,3 +746,90 @@ void reset_phy(void)
mc_env_boot();
}
#endif /* CONFIG_RESET_PHY_R */
+
+#if defined(CONFIG_DM_ETH) && defined(CONFIG_MULTI_DTB_FIT)
+
+/* Structure to hold SERDES protocols supported in case of
+ * CONFIG_DM_ETH enabled (network interfaces are described in the DTS).
+ *
+ * @serdes_block: the index of the SERDES block
+ * @serdes_protocol: the decimal value of the protocol supported
+ * @dts_needed: DTS notes describing the current configuration are needed
+ *
+ * When dts_needed is true, the board_fit_config_name_match() function
+ * will try to exactly match the current configuration of the block with a DTS
+ * name provided.
+ */
+static struct serdes_configuration {
+ u8 serdes_block;
+ u32 serdes_protocol;
+ bool dts_needed;
+} supported_protocols[] = {
+ /* Serdes block #1 */
+ {1, 21, true},
+ {1, 29, true},
+};
+
+#define SUPPORTED_SERDES_PROTOCOLS ARRAY_SIZE(supported_protocols)
+
+static bool protocol_supported(u8 serdes_block, u32 protocol)
+{
+ struct serdes_configuration serdes_conf;
+ int i;
+
+ for (i = 0; i < SUPPORTED_SERDES_PROTOCOLS; i++) {
+ serdes_conf = supported_protocols[i];
+ if (serdes_conf.serdes_block == serdes_block &&
+ serdes_conf.serdes_protocol == protocol)
+ return true;
+ }
+
+ return false;
+}
+
+static void get_str_protocol(u8 serdes_block, u32 protocol, char *str)
+{
+ struct serdes_configuration serdes_conf;
+ int i;
+
+ for (i = 0; i < SUPPORTED_SERDES_PROTOCOLS; i++) {
+ serdes_conf = supported_protocols[i];
+ if (serdes_conf.serdes_block == serdes_block &&
+ serdes_conf.serdes_protocol == protocol) {
+ if (serdes_conf.dts_needed == true)
+ sprintf(str, "%u", protocol);
+ else
+ sprintf(str, "x");
+ return;
+ }
+ }
+}
+
+int board_fit_config_name_match(const char *name)
+{
+ struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+ char expected_dts[100];
+ char srds_s1_str[2];
+ u32 srds_s1, cfg;
+
+ cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) &
+ FSL_CHASSIS3_SRDS1_PRTCL_MASK;
+ cfg >>= FSL_CHASSIS3_SRDS1_PRTCL_SHIFT;
+ srds_s1 = serdes_get_number(FSL_SRDS_1, cfg);
+
+ /* Check for supported protocols. The default DTS will be used
+ * in this case
+ */
+ if (!protocol_supported(1, srds_s1))
+ return -1;
+
+ get_str_protocol(1, srds_s1, srds_s1_str);
+
+ sprintf(expected_dts, "fsl-ls1088a-qds-%s-x", srds_s1_str);
+
+ if (!strcmp(name, expected_dts))
+ return 0;
+
+ return -1;
+}
+#endif
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index 81b5b9e..9171cb2 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -26,6 +26,8 @@
#define MC_BOOT_ENV_VAR "mcinitcmd"
+#ifndef CONFIG_DM_ETH
+
#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
/* - In LS2080A there are only 16 SERDES lanes, spread across 2 SERDES banks.
* Bank 1 -> Lanes A, B, C, D, E, F, G, H
@@ -891,10 +893,11 @@ void ls2080a_handle_phy_interface_xsgmii(int i)
}
}
#endif
+#endif // !CONFIG_DM_ETH
int board_eth_init(bd_t *bis)
{
- int error;
+#ifndef CONFIG_DM_ETH
#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) &
@@ -908,6 +911,7 @@ int board_eth_init(bd_t *bis)
struct memac_mdio_info *memac_mdio1_info;
unsigned int i;
char *env_hwconfig;
+ int error;
env_hwconfig = env_get("hwconfig");
@@ -972,8 +976,13 @@ int board_eth_init(bd_t *bis)
sgmii_configure_repeater(2);
}
#endif
- error = pci_eth_init(bis);
- return error;
+#endif // !CONFIG_DM_ETH
+
+#ifdef CONFIG_DM_ETH
+ return 0;
+#else
+ return pci_eth_init(bis);
+#endif
}
#if defined(CONFIG_RESET_PHY_R)
@@ -982,3 +991,100 @@ void reset_phy(void)
mc_env_boot();
}
#endif /* CONFIG_RESET_PHY_R */
+
+#if defined(CONFIG_DM_ETH) && defined(CONFIG_MULTI_DTB_FIT)
+
+/* Structure to hold SERDES protocols supported in case of
+ * CONFIG_DM_ETH enabled (network interfaces are described in the DTS).
+ *
+ * @serdes_block: the index of the SERDES block
+ * @serdes_protocol: the decimal value of the protocol supported
+ * @dts_needed: DTS notes describing the current configuration are needed
+ *
+ * When dts_needed is true, the board_fit_config_name_match() function
+ * will try to exactly match the current configuration of the block with a DTS
+ * name provided.
+ */
+static struct serdes_configuration {
+ u8 serdes_block;
+ u32 serdes_protocol;
+ bool dts_needed;
+} supported_protocols[] = {
+ /* Serdes block #1 */
+ {1, 42, true},
+
+ /* Serdes block #2 */
+ {2, 65, false},
+};
+
+#define SUPPORTED_SERDES_PROTOCOLS ARRAY_SIZE(supported_protocols)
+
+static bool protocol_supported(u8 serdes_block, u32 protocol)
+{
+ struct serdes_configuration serdes_conf;
+ int i;
+
+ for (i = 0; i < SUPPORTED_SERDES_PROTOCOLS; i++) {
+ serdes_conf = supported_protocols[i];
+ if (serdes_conf.serdes_block == serdes_block &&
+ serdes_conf.serdes_protocol == protocol)
+ return true;
+ }
+
+ return false;
+}
+
+static void get_str_protocol(u8 serdes_block, u32 protocol, char *str)
+{
+ struct serdes_configuration serdes_conf;
+ int i;
+
+ for (i = 0; i < SUPPORTED_SERDES_PROTOCOLS; i++) {
+ serdes_conf = supported_protocols[i];
+ if (serdes_conf.serdes_block == serdes_block &&
+ serdes_conf.serdes_protocol == protocol) {
+ if (serdes_conf.dts_needed == true)
+ sprintf(str, "%u", protocol);
+ else
+ sprintf(str, "x");
+ return;
+ }
+ }
+}
+
+int board_fit_config_name_match(const char *name)
+{
+ struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+ u32 rcw_status = in_le32(&gur->rcwsr[28]);
+ char srds_s1_str[2], srds_s2_str[2];
+ u32 srds_s1, srds_s2;
+ char expected_dts[100];
+
+ srds_s1 = rcw_status & FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK;
+ srds_s1 >>= FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT;
+
+ srds_s2 = rcw_status & FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK;
+ srds_s2 >>= FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT;
+
+ /* Check for supported protocols. The default DTS will be used
+ * in this case
+ */
+ if (!protocol_supported(1, srds_s1) ||
+ !protocol_supported(2, srds_s2))
+ return -1;
+
+ get_str_protocol(1, srds_s1, srds_s1_str);
+ get_str_protocol(2, srds_s2, srds_s2_str);
+
+ printf("expected_dts %s\n", expected_dts);
+ sprintf(expected_dts, "fsl-ls2080a-qds-%s-%s",
+ srds_s1_str, srds_s2_str);
+
+ if (!strcmp(name, expected_dts))
+ return 0;
+
+ printf("this is not!\n");
+ return -1;
+}
+
+#endif
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index 5f95f3c..b9754f9 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -252,6 +252,10 @@ int board_init(void)
ppa_init();
#endif
+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
+ pci_init();
+#endif
+
return 0;
}
diff --git a/board/freescale/lx2160a/eth_lx2160aqds.c b/board/freescale/lx2160a/eth_lx2160aqds.c
index 8240eaa..7794495 100644
--- a/board/freescale/lx2160a/eth_lx2160aqds.c
+++ b/board/freescale/lx2160a/eth_lx2160aqds.c
@@ -28,6 +28,7 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifndef CONFIG_DM_ETH
#define EMI_NONE 0
#define EMI1 1 /* Mdio Bus 1 */
#define EMI2 2 /* Mdio Bus 2 */
@@ -442,9 +443,11 @@ static inline void do_dpmac_config(int dpmac, const char *arg_dpmacid,
}
#endif
+#endif /* !CONFIG_DM_ETH */
int board_eth_init(bd_t *bis)
{
+#ifndef CONFIG_DM_ETH
#if defined(CONFIG_FSL_MC_ENET)
struct memac_mdio_info mdio_info;
struct memac_mdio_controller *regs;
@@ -567,6 +570,7 @@ int board_eth_init(bd_t *bis)
cpu_eth_init(bis);
#endif /* CONFIG_FMAN_ENET */
+#endif /* !CONFIG_DM_ETH */
#ifdef CONFIG_PHY_AQUANTIA
/*
@@ -580,7 +584,12 @@ int board_eth_init(bd_t *bis)
gd->jt->mdio_phydev_for_ethname = mdio_phydev_for_ethname;
gd->jt->miiphy_set_current_dev = miiphy_set_current_dev;
#endif
+
+#ifdef CONFIG_DM_ETH
+ return 0;
+#else
return pci_eth_init(bis);
+#endif
}
#if defined(CONFIG_RESET_PHY_R)
@@ -592,6 +601,7 @@ void reset_phy(void)
}
#endif /* CONFIG_RESET_PHY_R */
+#ifndef CONFIG_DM_ETH
#if defined(CONFIG_FSL_MC_ENET)
int fdt_fixup_dpmac_phy_handle(void *fdt, int dpmac_id, int node_phandle)
{
@@ -840,4 +850,113 @@ int fdt_fixup_board_phy(void *fdt)
return ret;
}
#endif // CONFIG_FSL_MC_ENET
+#endif
+
+#if defined(CONFIG_DM_ETH) && defined(CONFIG_MULTI_DTB_FIT)
+
+/* Structure to hold SERDES protocols supported in case of
+ * CONFIG_DM_ETH enabled (network interfaces are described in the DTS).
+ *
+ * @serdes_block: the index of the SERDES block
+ * @serdes_protocol: the decimal value of the protocol supported
+ * @dts_needed: DTS notes describing the current configuration are needed
+ *
+ * When dts_needed is true, the board_fit_config_name_match() function
+ * will try to exactly match the current configuration of the block with a DTS
+ * name provided.
+ */
+static struct serdes_configuration {
+ u8 serdes_block;
+ u32 serdes_protocol;
+ bool dts_needed;
+} supported_protocols[] = {
+ /* Serdes block #1 */
+ {1, 3, true},
+ {1, 7, true},
+ {1, 19, true},
+ {1, 20, true},
+
+ /* Serdes block #2 */
+ {2, 2, false},
+ {2, 3, false},
+ {2, 5, false},
+ {2, 11, true},
+
+ /* Serdes block #3 */
+ {3, 2, false},
+ {3, 3, false},
+};
+
+#define SUPPORTED_SERDES_PROTOCOLS ARRAY_SIZE(supported_protocols)
+
+static bool protocol_supported(u8 serdes_block, u32 protocol)
+{
+ struct serdes_configuration serdes_conf;
+ int i;
+
+ for (i = 0; i < SUPPORTED_SERDES_PROTOCOLS; i++) {
+ serdes_conf = supported_protocols[i];
+ if (serdes_conf.serdes_block == serdes_block &&
+ serdes_conf.serdes_protocol == protocol)
+ return true;
+ }
+
+ return false;
+}
+static void get_str_protocol(u8 serdes_block, u32 protocol, char *str)
+{
+ struct serdes_configuration serdes_conf;
+ int i;
+
+ for (i = 0; i < SUPPORTED_SERDES_PROTOCOLS; i++) {
+ serdes_conf = supported_protocols[i];
+ if (serdes_conf.serdes_block == serdes_block &&
+ serdes_conf.serdes_protocol == protocol) {
+ if (serdes_conf.dts_needed == true)
+ sprintf(str, "%u", protocol);
+ else
+ sprintf(str, "x");
+ return;
+ }
+ }
+}
+
+int board_fit_config_name_match(const char *name)
+{
+ struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+ u32 rcw_status = in_le32(&gur->rcwsr[28]);
+ char srds_s1_str[2], srds_s2_str[2], srds_s3_str[2];
+ u32 srds_s1, srds_s2, srds_s3;
+ char expected_dts[100];
+
+ srds_s1 = rcw_status & FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK;
+ srds_s1 >>= FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT;
+
+ srds_s2 = rcw_status & FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK;
+ srds_s2 >>= FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT;
+
+ srds_s3 = rcw_status & FSL_CHASSIS3_RCWSR28_SRDS3_PRTCL_MASK;
+ srds_s3 >>= FSL_CHASSIS3_RCWSR28_SRDS3_PRTCL_SHIFT;
+
+ /* Check for supported protocols. The default DTS will be used
+ * in this case
+ */
+ if (!protocol_supported(1, srds_s1) ||
+ !protocol_supported(2, srds_s2) ||
+ !protocol_supported(3, srds_s3))
+ return -1;
+
+ get_str_protocol(1, srds_s1, srds_s1_str);
+ get_str_protocol(2, srds_s2, srds_s2_str);
+ get_str_protocol(3, srds_s3, srds_s3_str);
+
+ sprintf(expected_dts, "fsl-lx2160a-qds-%s-%s-%s",
+ srds_s1_str, srds_s2_str, srds_s3_str);
+
+ if (!strcmp(name, expected_dts))
+ return 0;
+
+ return -1;
+}
+#endif
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 88eb66b..73e05ee 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -586,6 +586,9 @@ int board_init(void)
sec_init();
#endif
+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
+ pci_init();
+#endif
return 0;
}
@@ -631,7 +634,9 @@ void fdt_fixup_board_enet(void *fdt)
if (get_mc_boot_status() == 0 &&
(is_lazy_dpl_addr_valid() || get_dpl_apply_status() == 0)) {
fdt_status_okay(fdt, offset);
+#ifndef CONFIG_DM_ETH
fdt_fixup_board_phy(fdt);
+#endif
} else {
fdt_status_fail(fdt, offset);
}