Merge tag 'u-boot-imx-20220422' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20220422
-------------------

- Switch to DM_SERIAL
- Drop MMCROOT
- several cleanup

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/11815

36 files changed, 2651 insertions, 1504 deletions

diff --git a/board/bsh/imx8mn_smm_s2/spl.c b/board/bsh/imx8mn_smm_s2/spl.c
index 5f04731..0f61acc 100644
--- a/board/bsh/imx8mn_smm_s2/spl.c
+++ b/board/bsh/imx8mn_smm_s2/spl.c
@@ -40,14 +40,8 @@ void spl_board_init(void)
 		puts("Failed to find clock node. Check device tree\n");
 }
 
-#define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
 #define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 
-static const iomux_v3_cfg_t uart_pads[] = {
-	IMX8MN_PAD_UART4_RXD__UART4_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	IMX8MN_PAD_UART4_TXD__UART4_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
 static const iomux_v3_cfg_t wdog_pads[] = {
 	IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
@@ -59,7 +53,6 @@ int board_early_init_f(void)
 	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
 	set_wdog_reset(wdog);
 
-	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
 	init_uart_clk(3);
 
 	if (IS_ENABLED(CONFIG_NAND_MXS)) {
@@ -82,14 +75,14 @@ void board_init_f(ulong dummy)
 
 	timer_init();
 
-	preloader_console_init();
-
 	ret = spl_init();
 	if (ret) {
 		debug("spl_init() failed: %d\n", ret);
 		hang();
 	}
 
+	preloader_console_init();
+
 	/* DDR initialization */
 	spl_dram_init();
 
diff --git a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
index e6021a4..3d7fff3 100644
--- a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
+++ b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
@@ -335,11 +335,6 @@ static int iot_gate_imx8_update_ext_ied(void)
 	return 0;
 }
 
-int board_fix_fdt(void *rw_fdt_blob)
-{
-	return 0;
-}
-
 int extension_board_scan(struct list_head *extension_list)
 {
 	struct extension *extension = NULL;
diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c
index cf4882c..7eeec6c 100644
--- a/board/freescale/imx8mm_evk/spl.c
+++ b/board/freescale/imx8mm_evk/spl.c
@@ -72,14 +72,8 @@ int board_fit_config_name_match(const char *name)
 }
 #endif
 
-#define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
 #define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 
-static iomux_v3_cfg_t const uart_pads[] = {
-	IMX8MM_PAD_UART2_RXD_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	IMX8MM_PAD_UART2_TXD_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
 static iomux_v3_cfg_t const wdog_pads[] = {
 	IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
@@ -92,8 +86,6 @@ int board_early_init_f(void)
 
 	set_wdog_reset(wdog);
 
-	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-
 	return 0;
 }
 
@@ -147,8 +139,6 @@ void board_init_f(ulong dummy)
 
 	timer_init();
 
-	preloader_console_init();
-
 	/* Clear the BSS. */
 	memset(__bss_start, 0, __bss_end - __bss_start);
 
@@ -166,6 +156,8 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 
+	preloader_console_init();
+
 	enable_tzc380();
 
 	power_init_board();
diff --git a/board/freescale/imx8mn_evk/spl.c b/board/freescale/imx8mn_evk/spl.c
index dfa81a0..63f335b 100644
--- a/board/freescale/imx8mn_evk/spl.c
+++ b/board/freescale/imx8mn_evk/spl.c
@@ -115,14 +115,8 @@ int board_fit_config_name_match(const char *name)
 }
 #endif
 
-#define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
 #define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 
-static iomux_v3_cfg_t const uart_pads[] = {
-	IMX8MN_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	IMX8MN_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
 static iomux_v3_cfg_t const wdog_pads[] = {
 	IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
@@ -135,8 +129,6 @@ int board_early_init_f(void)
 
 	set_wdog_reset(wdog);
 
-	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-
 	return 0;
 }
 
@@ -152,8 +144,6 @@ void board_init_f(ulong dummy)
 
 	timer_init();
 
-	preloader_console_init();
-
 	/* Clear the BSS. */
 	memset(__bss_start, 0, __bss_end - __bss_start);
 
@@ -163,6 +153,8 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 
+	preloader_console_init();
+
 	enable_tzc380();
 
 	/* DDR initialization */
diff --git a/board/freescale/imx8mp_evk/imx8mp_evk.c b/board/freescale/imx8mp_evk/imx8mp_evk.c
index 62096c2..fb6c61c 100644
--- a/board/freescale/imx8mp_evk/imx8mp_evk.c
+++ b/board/freescale/imx8mp_evk/imx8mp_evk.c
@@ -20,14 +20,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
 #define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 
-static iomux_v3_cfg_t const uart_pads[] = {
-	MX8MP_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	MX8MP_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
 static iomux_v3_cfg_t const wdog_pads[] = {
 	MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
@@ -40,8 +34,6 @@ int board_early_init_f(void)
 
 	set_wdog_reset(wdog);
 
-	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-
 	return 0;
 }
 
diff --git a/board/gateworks/gw_ventana/Kconfig b/board/gateworks/gw_ventana/Kconfig
index fee910c..c82e8ae 100644
--- a/board/gateworks/gw_ventana/Kconfig
+++ b/board/gateworks/gw_ventana/Kconfig
@@ -17,12 +17,4 @@ config CMD_EECONFIG
 	help
 	  Provides access to EEPROM configuration on Gateworks Ventana
 
-config CMD_GSC
-	bool "Enable the 'gsc' command"
-	help
-	  Provides access to the GSC configuration:
-
-	     gsc sleep - sleeps for a period of seconds
-	     gsc wd - enables / disables the watchdog
-
 endif
diff --git a/board/gateworks/gw_ventana/Makefile b/board/gateworks/gw_ventana/Makefile
index 360d1d4..c407f8e 100644
--- a/board/gateworks/gw_ventana/Makefile
+++ b/board/gateworks/gw_ventana/Makefile
@@ -6,5 +6,5 @@
 # SPDX-License-Identifier:  GPL-2.0+
 #
 
-obj-y  := gw_ventana.o gsc.o eeprom.o common.o
+obj-y  := gw_ventana.o eeprom.o common.o
 obj-$(CONFIG_SPL_BUILD) += gw_ventana_spl.o
diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 4144064..74328b2 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -6,15 +6,15 @@
  */
 
 #include <common.h>
+#include <env.h>
+#include <fsl_esdhc_imx.h>
+#include <hwconfig.h>
 #include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/mxc_i2c.h>
-#include <env.h>
-#include <fsl_esdhc_imx.h>
-#include <hwconfig.h>
 #include <linux/delay.h>
 
 #include "common.h"
@@ -1045,7 +1045,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 #define SETUP_GPIO_INPUT(gpio, name) \
 	gpio_request(gpio, name); \
 	gpio_direction_input(gpio);
-void setup_iomux_gpio(int board, struct ventana_board_info *info)
+void setup_iomux_gpio(int board)
 {
 	if (board >= GW_UNKNOWN)
 		return;
@@ -1214,8 +1214,6 @@ static struct fsl_esdhc_cfg usdhc_cfg[2];
 
 int board_mmc_init(struct bd_info *bis)
 {
-	struct ventana_board_info ventana_info;
-	int board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
 	int ret;
 
 	switch (board_type) {
@@ -1279,13 +1277,11 @@ int board_mmc_init(struct bd_info *bis)
 
 int board_mmc_getcd(struct mmc *mmc)
 {
-	struct ventana_board_info ventana_info;
 	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-	int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
-	int gpio = gpio_cfg[board].mmc_cd;
+	int gpio = gpio_cfg[board_type].mmc_cd;
 
 	/* Card Detect */
-	switch (board) {
+	switch (board_type) {
 	case GW560x:
 		/* emmc is always present */
 		if (cfg->esdhc_base == USDHC2_BASE_ADDR)
diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h
index 7a60db7..480c667 100644
--- a/board/gateworks/gw_ventana/common.h
+++ b/board/gateworks/gw_ventana/common.h
@@ -8,7 +8,7 @@
 #ifndef _GWVENTANA_COMMON_H_
 #define _GWVENTANA_COMMON_H_
 
-#include "ventana_eeprom.h"
+#include "eeprom.h"
 
 /* GPIO's common to all baseboards */
 #define GP_RS232_EN	IMX_GPIO_NR(2, 11)
@@ -80,6 +80,6 @@ struct ventana {
 extern struct ventana gpio_cfg[GW_UNKNOWN];
 
 /* configure gpio iomux/defaults */
-void setup_iomux_gpio(int board, struct ventana_board_info *);
+void setup_iomux_gpio(int board);
 
 #endif /* #ifndef _GWVENTANA_COMMON_H_ */
diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
index c3a2bbe..e622a9b 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -4,23 +4,211 @@
  * Author: Tim Harvey <tharvey@gateworks.com>
  */
 
-#include <common.h>
 #include <command.h>
-#include <errno.h>
+#include <common.h>
+#include <gsc.h>
 #include <hexdump.h>
 #include <i2c.h>
-#include <log.h>
-#include <malloc.h>
-#include <asm/bitops.h>
-#include <linux/delay.h>
+#include <asm/arch/sys_proto.h>
+#include <dm/device.h>
 #include <dm/uclass.h>
+#include <linux/ctype.h>
+#include <linux/delay.h>
+
+#include "eeprom.h"
+
+/*
+ * EEPROM board info struct populated by read_eeprom so that we only have to
+ * read it once.
+ */
+struct ventana_board_info ventana_info;
+int board_type;
+
+#if CONFIG_IS_ENABLED(DM_I2C)
+struct udevice *i2c_get_dev(int busno, int slave)
+{
+	struct udevice *dev, *bus;
+	int ret;
+
+	ret = uclass_get_device_by_seq(UCLASS_I2C, busno, &bus);
+	if (ret)
+		return NULL;
+	ret = dm_i2c_probe(bus, slave, 0, &dev);
+	if (ret)
+		return NULL;
+
+	return dev;
+}
+#endif
+
+/*
+ * The Gateworks System Controller will fail to ACK a master transaction if
+ * it is busy, which can occur during its 1HZ timer tick while reading ADC's.
+ * When this does occur, it will never be busy long enough to fail more than
+ * 2 back-to-back transfers.  Thus we wrap i2c_read and i2c_write with
+ * 3 retries.
+ */
+int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
+{
+	int retry = 3;
+	int n = 0;
+	int ret;
+#if CONFIG_IS_ENABLED(DM_I2C)
+	struct udevice *dev;
+
+	dev = i2c_get_dev(BOARD_EEPROM_BUSNO, chip);
+	if (!dev)
+		return -ENODEV;
+	ret = i2c_set_chip_offset_len(dev, alen);
+	if (ret) {
+		puts("EEPROM: Failed to set alen\n");
+		return ret;
+	}
+#else
+	i2c_set_bus_num(BOARD_EEPROM_BUSNO);
+#endif
+
+	while (n++ < retry) {
+#if CONFIG_IS_ENABLED(DM_I2C)
+		ret = dm_i2c_read(dev, addr, buf, len);
+#else
+		ret = i2c_read(chip, addr, alen, buf, len);
+#endif
+		if (!ret)
+			break;
+		debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr,
+		      n, ret);
+		if (ret != -ENODEV)
+			break;
+		mdelay(10);
+	}
+	return ret;
+}
+
+int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
+{
+	int retry = 3;
+	int n = 0;
+	int ret;
+#if CONFIG_IS_ENABLED(DM_I2C)
+	struct udevice *dev;
+
+	dev = i2c_get_dev(BOARD_EEPROM_BUSNO, chip);
+	if (!dev)
+		return -ENODEV;
+	ret = i2c_set_chip_offset_len(dev, alen);
+	if (ret) {
+		puts("EEPROM: Failed to set alen\n");
+		return ret;
+	}
+#endif
+
+	while (n++ < retry) {
+#if CONFIG_IS_ENABLED(DM_I2C)
+		ret = dm_i2c_write(dev, addr, buf, len);
+#else
+		ret = i2c_write(chip, addr, alen, buf, len);
+#endif
+		if (!ret)
+			break;
+		debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr,
+		      n, ret);
+		if (ret != -ENODEV)
+			break;
+		mdelay(10);
+	}
+	mdelay(100);
+	return ret;
+}
+
+/* determine BOM revision from model */
+int get_bom_rev(const char *str)
+{
+	int  rev_bom = 0;
+	int i;
+
+	for (i = strlen(str) - 1; i > 0; i--) {
+		if (str[i] == '-')
+			break;
+		if (str[i] >= '1' && str[i] <= '9') {
+			rev_bom = str[i] - '0';
+			break;
+		}
+	}
+	return rev_bom;
+}
 
-#include "gsc.h"
-#include "ventana_eeprom.h"
+/* determine PCB revision from model */
+char get_pcb_rev(const char *str)
+{
+	char rev_pcb = 'A';
+	int i;
 
+	for (i = strlen(str) - 1; i > 0; i--) {
+		if (str[i] == '-')
+			break;
+		if (str[i] >= 'A') {
+			rev_pcb = str[i];
+			break;
+		}
+	}
+	return rev_pcb;
+}
+
+/*
+ * get dt name based on model and detail level:
+ */
+const char *gsc_get_dtb_name(int level, char *buf, int sz)
+{
+	const char *model = (const char *)ventana_info.model;
+	const char *pre = is_mx6dq() ? "imx6q-" : "imx6dl-";
+	int modelno, rev_pcb, rev_bom;
+
+	/* a few board models are dt equivalents to other models */
+	if (strncasecmp(model, "gw5906", 6) == 0)
+		model = "gw552x-d";
+	else if (strncasecmp(model, "gw5908", 6) == 0)
+		model = "gw53xx-f";
+	else if (strncasecmp(model, "gw5905", 6) == 0)
+		model = "gw5904-a";
+
+	modelno = ((model[2] - '0') * 1000)
+		  + ((model[3] - '0') * 100)
+		  + ((model[4] - '0') * 10)
+		  + (model[5] - '0');
+	rev_pcb = tolower(get_pcb_rev(model));
+	rev_bom = get_bom_rev(model);
+
+	/* compare model/rev/bom in order of most specific to least */
+	snprintf(buf, sz, "%s%04d", pre, modelno);
+	switch (level) {
+	case 0: /* full model first (ie gw5400-a1) */
+		if (rev_bom) {
+			snprintf(buf, sz, "%sgw%04d-%c%d", pre, modelno, rev_pcb, rev_bom);
+			break;
+		}
+		fallthrough;
+	case 1: /* don't care about bom rev (ie gw5400-a) */
+		snprintf(buf, sz, "%sgw%04d-%c", pre, modelno, rev_pcb);
+		break;
+	case 2: /* don't care about the pcb rev (ie gw5400) */
+		snprintf(buf, sz, "%sgw%04d", pre, modelno);
+		break;
+	case 3: /* look for generic model (ie gw540x) */
+		snprintf(buf, sz, "%sgw%03dx", pre, modelno / 10);
+		break;
+	case 4: /* look for more generic model (ie gw54xx) */
+		snprintf(buf, sz, "%sgw%02dxx", pre, modelno / 100);
+		break;
+	default: /* give up */
+		return NULL;
+	}
+
+	return buf;
+}
 /* read ventana EEPROM, check for validity, and return baseboard type */
 int
-read_eeprom(int bus, struct ventana_board_info *info)
+read_eeprom(struct ventana_board_info *info)
 {
 	int i;
 	int chksum;
@@ -30,29 +218,8 @@ read_eeprom(int bus, struct ventana_board_info *info)
 
 	memset(info, 0, sizeof(*info));
 
-	/*
-	 * On a board with a missing/depleted backup battery for GSC, the
-	 * board may be ready to probe the GSC before its firmware is
-	 * running.  We will wait here indefinately for the GSC/EEPROM.
-	 */
-#if CONFIG_IS_ENABLED(DM_I2C)
-	while (1) {
-		if (i2c_get_dev(bus, GSC_EEPROM_ADDR))
-			break;
-		mdelay(1);
-	}
-#else
-	while (1) {
-		if (0 == i2c_set_bus_num(bus) &&
-		    0 == i2c_probe(GSC_EEPROM_ADDR))
-			break;
-		mdelay(1);
-	}
-#endif
-
 	/* read eeprom config section */
-	mdelay(10);
-	if (gsc_i2c_read(GSC_EEPROM_ADDR, 0x00, 1, buf, sizeof(*info))) {
+	if (gsc_i2c_read(BOARD_EEPROM_ADDR, 0x00, 1, buf, sizeof(*info))) {
 		puts("EEPROM: Failed to read EEPROM\n");
 		return GW_UNKNOWN;
 	}
@@ -219,14 +386,14 @@ static int do_econfig(struct cmd_tbl *cmdtp, int flag, int argc,
 		info->chksum[1] = chksum & 0xff;
 
 		/* write new config data */
-		if (gsc_i2c_write(GSC_EEPROM_ADDR, info->config - (u8 *)info,
+		if (gsc_i2c_write(BOARD_EEPROM_ADDR, info->config - (u8 *)info,
 				  1, econfig_bytes, sizeof(econfig_bytes))) {
 			printf("EEPROM: Failed updating config\n");
 			return CMD_RET_FAILURE;
 		}
 
 		/* write new config data */
-		if (gsc_i2c_write(GSC_EEPROM_ADDR, info->chksum - (u8 *)info,
+		if (gsc_i2c_write(BOARD_EEPROM_ADDR, info->chksum - (u8 *)info,
 				  1, info->chksum, 2)) {
 			printf("EEPROM: Failed updating checksum\n");
 			return CMD_RET_FAILURE;
diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/eeprom.h
index 2d5c272..2354205 100644
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++ b/board/gateworks/gw_ventana/eeprom.h
@@ -6,6 +6,9 @@
 #ifndef _VENTANA_EEPROM_
 #define _VENTANA_EEPROM_
 
+#define BOARD_EEPROM_BUSNO		0
+#define BOARD_EEPROM_ADDR		0x51
+
 struct ventana_board_info {
 	u8 mac0[6];          /* 0x00: MAC1 */
 	u8 mac1[6];          /* 0x06: MAC2 */
@@ -137,7 +140,18 @@ struct ventana_eeprom_config {
 
 extern struct ventana_eeprom_config econfig[];
 extern struct ventana_board_info ventana_info;
+extern int board_type;
+
+int read_eeprom(struct ventana_board_info *info);
 
-int read_eeprom(int bus, struct ventana_board_info *);
+/*
+ * I2C transactions to the GSC are done via these functions which
+ * perform retries in the case of a busy GSC NAK'ing the transaction
+ */
+int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len);
+int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len);
+const char *gsc_get_dtb_name(int level, char *buf, int sz);
+struct udevice *i2c_get_dev(int busno, int slave);
+const char *eeprom_get_model(void);
 
 #endif
diff --git a/board/gateworks/gw_ventana/gsc.h b/board/gateworks/gw_ventana/gsc.h
deleted file mode 100644
index 2e1d25b..0000000
--- a/board/gateworks/gw_ventana/gsc.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2013 Gateworks Corporation
- *
- * Author: Tim Harvey <tharvey@gateworks.com>
- */
-
-#ifndef __ASSEMBLY__
-
-/* i2c slave addresses */
-#define GSC_SC_ADDR		0x20
-#define GSC_RTC_ADDR		0x68
-#define GSC_HWMON_ADDR		0x29
-#define GSC_EEPROM_ADDR		0x51
-
-/* System Controller registers */
-enum {
-	GSC_SC_CTRL0		= 0x00,
-	GSC_SC_CTRL1		= 0x01,
-	GSC_SC_STATUS		= 0x0a,
-	GSC_SC_FWCRC		= 0x0c,
-	GSC_SC_FWVER		= 0x0e,
-};
-
-/* System Controller Control1 bits */
-enum {
-	GSC_SC_CTRL1_WDTIME	= 4, /* 1 = 60s timeout, 0 = 30s timeout */
-	GSC_SC_CTRL1_WDEN	= 5, /* 1 = enable, 0 = disable */
-	GSC_SC_CTRL1_WDDIS	= 7, /* 1 = disable boot watchdog */
-};
-
-/* System Controller Interrupt bits */
-enum {
-	GSC_SC_IRQ_PB		= 0, /* Pushbutton switch */
-	GSC_SC_IRQ_SECURE	= 1, /* Secure Key erase operation complete */
-	GSC_SC_IRQ_EEPROM_WP	= 2, /* EEPROM write violation */
-	GSC_SC_IRQ_GPIO		= 4, /* GPIO change */
-	GSC_SC_IRQ_TAMPER	= 5, /* Tamper detect */
-	GSC_SC_IRQ_WATCHDOG	= 6, /* Watchdog trip */
-	GSC_SC_IRQ_PBLONG	= 7, /* Pushbutton long hold */
-};
-
-/* Hardware Monitor registers */
-enum {
-	GSC_HWMON_TEMP		= 0x00,
-	GSC_HWMON_VIN		= 0x02,
-	GSC_HWMON_VDD_3P3	= 0x05,
-	GSC_HWMON_VBATT		= 0x08,
-	GSC_HWMON_VDD_5P0	= 0x0b,
-	GSC_HWMON_VDD_CORE	= 0x0e,
-	GSC_HWMON_VDD_SOC	= 0x11,
-	GSC_HWMON_VDD_HIGH	= 0x14,
-	GSC_HWMON_VDD_DDR	= 0x17,
-	GSC_HWMON_VDD_EXT	= 0x1a,
-	GSC_HWMON_VDD_1P8	= 0x1d,
-	GSC_HWMON_VDD_IO2	= 0x20,
-	GSC_HWMON_VDD_2P5	= 0x23,
-	GSC_HWMON_VDD_IO3	= 0x26,
-	GSC_HWMON_VDD_IO4	= 0x29,
-};
-
-/*
- * I2C transactions to the GSC are done via these functions which
- * perform retries in the case of a busy GSC NAK'ing the transaction
- */
-int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len);
-int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len);
-int gsc_info(int verbose);
-int gsc_boot_wd_disable(void);
-const char *gsc_get_dtb_name(int level, char *buf, int sz);
-struct udevice *i2c_get_dev(int busno, int slave);
-#endif
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 8748878..c06630a 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -5,40 +5,29 @@
  * Author: Tim Harvey <tharvey@gateworks.com>
  */
 
+#include <command.h>
 #include <common.h>
+#include <fdt_support.h>
+#include <gsc.h>
+#include <hwconfig.h>
+#include <i2c.h>
+#include <miiphy.h>
+#include <mtd_node.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/arch/mxc_hdmi.h>
 #include <asm/arch/sys_proto.h>
-#include <asm/global_data.h>
-#include <asm/gpio.h>
 #include <asm/mach-imx/boot_mode.h>
 #include <asm/mach-imx/video.h>
-#include <asm/setup.h>
-#include <env.h>
-#include <hwconfig.h>
+#include <jffs2/load_kernel.h>
 #include <linux/ctype.h>
-#include <miiphy.h>
-#include <mtd_node.h>
 #include <linux/delay.h>
-#include <power/pmic.h>
-#include <fdt_support.h>
-#include <jffs2/load_kernel.h>
 
-#include "gsc.h"
 #include "common.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
-
-/*
- * EEPROM board info struct populated by read_eeprom so that we only have to
- * read it once.
- */
-struct ventana_board_info ventana_info;
-static int board_type;
-
 /* configure eth0 PHY board-specific LED behavior */
 int board_phy_config(struct phy_device *phydev)
 {
@@ -482,9 +471,12 @@ int board_init(void)
 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
 	/* read Gateworks EEPROM into global struct (used later) */
-	board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
+	board_type = read_eeprom(&ventana_info);
 
-	setup_iomux_gpio(board_type, &ventana_info);
+	setup_iomux_gpio(board_type);
+
+	/* show GSC details */
+	run_command("gsc", 0);
 
 	return 0;
 }
@@ -517,7 +509,6 @@ int board_fit_config_name_match(const char *name)
 int checkboard(void)
 {
 	struct ventana_board_info *info = &ventana_info;
-	unsigned char buf[4];
 	const char *p;
 	int quiet; /* Quiet or minimal output mode */
 
@@ -541,15 +532,6 @@ int checkboard(void)
 	if (quiet)
 		return 0;
 
-	/* Display GSC firmware revision/CRC/status */
-	gsc_info(0);
-
-	/* Display RTC */
-	if (!gsc_i2c_read(GSC_RTC_ADDR, 0x00, 1, buf, 4)) {
-		printf("RTC:   %d\n",
-		       buf[0] | buf[1]<<8 | buf[2]<<16 | buf[3]<<24);
-	}
-
 	return 0;
 }
 #endif
diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 3149e88..e85a009 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -6,26 +6,22 @@
 
 #include <common.h>
 #include <env.h>
+#include <gsc.h>
 #include <hang.h>
+#include <i2c.h>
 #include <init.h>
-#include <log.h>
-#include <asm/io.h>
+#include <spl.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/mx6-ddr.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/arch/sys_proto.h>
-#include <asm/mach-imx/boot_mode.h>
-#include <asm/mach-imx/iomux-v3.h>
 #include <asm/mach-imx/mxc_i2c.h>
-#include <env.h>
-#include <i2c.h>
-#include <spl.h>
+#include <linux/delay.h>
+#include <power/mp5416.h>
 #include <power/pmic.h>
-#include <power/ltc3676_pmic.h>
 #include <power/pfuze100_pmic.h>
-#include <power/mp5416.h>
+#include <power/ltc3676_pmic.h>
 
-#include "gsc.h"
 #include "common.h"
 
 #define RTT_NOM_120OHM /* use 120ohm Rtt_nom vs 60ohm (lower power) */
@@ -778,8 +774,6 @@ static void setup_ventana_i2c(int i2c)
 void setup_pmic(void)
 {
 	struct pmic *p;
-	struct ventana_board_info ventana_info;
-	int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
 	const int i2c_pmic = 1;
 	u32 reg;
 	char rev;
@@ -817,7 +811,7 @@ void setup_pmic(void)
 			reg |= (SWBST_5_00V | (SWBST_MODE_AUTO << SWBST_MODE_SHIFT));
 			pmic_reg_write(p, PFUZE100_SWBSTCON1, reg);
 
-			if (board == GW54xx && (rev == 'G')) {
+			if (board_type == GW54xx && (rev == 'G')) {
 				/* Disable VGEN5 */
 				pmic_reg_write(p, PFUZE100_VGEN5VOL, 0);
 
@@ -873,7 +867,7 @@ void setup_pmic(void)
 		 * is a bit shy of the Vmin of 1350mV in the datasheet
 		 * for LDO enabled mode but is as high as we can go.
 		 */
-		switch (board) {
+		switch (board_type) {
 		case GW560x:
 			/* mask PGOOD during SW3 transition */
 			pmic_reg_write(p, LTC3676_DVB3B,
@@ -931,7 +925,7 @@ void setup_pmic(void)
 	/* configure MP5416 PMIC */
 	else if (!i2c_probe(0x69)) {
 		puts("PMIC:  MP5416\n");
-		switch (board) {
+		switch (board_type) {
 		case GW5910:
 			/* SW1: VDD_ARM 1.2V -> (1.275 to 1.475) */
 			reg = MP5416_VSET_EN | MP5416_VSET_SW1_SVAL(1475000);
@@ -974,11 +968,23 @@ void board_init_f(ulong dummy)
 	/* UART clocks enabled and gd valid - init serial console */
 	preloader_console_init();
 
+	/*
+	 * On a board with a missing/depleted backup battery for GSC, the
+	 * board may be ready to probe the GSC before its firmware is
+	 * running. We will wait here indefinately for the GSC/EEPROM.
+	 */
+	while (1) {
+		if (!i2c_set_bus_num(BOARD_EEPROM_BUSNO) &&
+		    !i2c_probe(BOARD_EEPROM_ADDR))
+			break;
+		mdelay(1);
+	}
+
 	/* read/validate EEPROM info to determine board model and SDRAM cfg */
-	board_model = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
+	board_model = read_eeprom(&ventana_info);
 
 	/* configure model-specific gpio */
-	setup_iomux_gpio(board_model, &ventana_info);
+	setup_iomux_gpio(board_model);
 
 	/* provide some some default: 32bit 128MB */
 	if (GW_UNKNOWN == board_model)
@@ -1006,7 +1012,6 @@ void board_boot_order(u32 *spl_boot_list)
 
 /* called from board_init_r after gd setup if CONFIG_SPL_BOARD_INIT defined */
 /* its our chance to print info about boot device */
-static int board_type;
 void spl_board_init(void)
 {
 	u32 boot_device;
@@ -1015,7 +1020,7 @@ void spl_board_init(void)
 	boot_device = spl_boot_device();
 
 	/* read eeprom again now that we have gd */
-	board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
+	board_type = read_eeprom(&ventana_info);
 	if (board_type == GW_UNKNOWN)
 		hang();
 
diff --git a/board/gateworks/venice/Kconfig b/board/gateworks/venice/Kconfig
index 3034275..9d083dc 100644
--- a/board/gateworks/venice/Kconfig
+++ b/board/gateworks/venice/Kconfig
@@ -27,3 +27,18 @@ config SYS_CONFIG_NAME
 config IMX_CONFIG
 	default "board/gateworks/venice/imximage-8mn-lpddr4.cfg"
 endif
+
+if TARGET_IMX8MP_VENICE
+
+config SYS_BOARD
+	default "venice"
+
+config SYS_VENDOR
+	default "gateworks"
+
+config SYS_CONFIG_NAME
+	default "imx8mp_venice"
+
+config IMX_CONFIG
+	default "board/gateworks/venice/imximage-8mp-lpddr4.cfg"
+endif
diff --git a/board/gateworks/venice/Makefile b/board/gateworks/venice/Makefile
index b8b53fd..faf1348 100644
--- a/board/gateworks/venice/Makefile
+++ b/board/gateworks/venice/Makefile
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-y += venice.o gsc.o
+obj-y += venice.o eeprom.o
 
 ifdef CONFIG_SPL_BUILD
 obj-y += spl.o
@@ -14,4 +14,7 @@ endif
 ifdef CONFIG_IMX8MN
 obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing_imx8mn.o
 endif
+ifdef CONFIG_IMX8MP
+obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing_imx8mp.o
+endif
 endif
diff --git a/board/gateworks/venice/eeprom.c b/board/gateworks/venice/eeprom.c
new file mode 100644
index 0000000..7a46f44
--- /dev/null
+++ b/board/gateworks/venice/eeprom.c
@@ -0,0 +1,363 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2021 Gateworks Corporation
+ */
+
+#include <common.h>
+#include <gsc.h>
+#include <hexdump.h>
+#include <i2c.h>
+#include <dm/uclass.h>
+
+#include "eeprom.h"
+
+/* I2C */
+#define SOM_EEPROM_BUSNO		0
+#define SOM_EEPROM_ADDR			0x51
+#define BASEBOARD_EEPROM_BUSNO		1
+#define BASEBOARD_EEPROM_ADDR		0x52
+
+struct venice_board_info som_info;
+struct venice_board_info base_info;
+char venice_model[32];
+u32 venice_serial;
+
+/* return a mac address from EEPROM info */
+int eeprom_getmac(int index, uint8_t *address)
+{
+	int i, j;
+	u32 maclow, machigh;
+	u64 mac;
+
+	j = 0;
+	if (som_info.macno) {
+		maclow = som_info.mac[5];
+		maclow |= som_info.mac[4] << 8;
+		maclow |= som_info.mac[3] << 16;
+		maclow |= som_info.mac[2] << 24;
+		machigh = som_info.mac[1];
+		machigh |= som_info.mac[0] << 8;
+		mac = machigh;
+		mac <<= 32;
+		mac |= maclow;
+		for (i = 0; i < som_info.macno; i++, j++) {
+			if (index == j)
+				goto out;
+		}
+	}
+
+	maclow = base_info.mac[5];
+	maclow |= base_info.mac[4] << 8;
+	maclow |= base_info.mac[3] << 16;
+	maclow |= base_info.mac[2] << 24;
+	machigh = base_info.mac[1];
+	machigh |= base_info.mac[0] << 8;
+	mac = machigh;
+	mac <<= 32;
+	mac |= maclow;
+	for (i = 0; i < base_info.macno; i++, j++) {
+		if (index == j)
+			goto out;
+	}
+
+	return -EINVAL;
+
+out:
+	mac += i;
+	address[0] = (mac >> 40) & 0xff;
+	address[1] = (mac >> 32) & 0xff;
+	address[2] = (mac >> 24) & 0xff;
+	address[3] = (mac >> 16) & 0xff;
+	address[4] = (mac >> 8) & 0xff;
+	address[5] = (mac >> 0) & 0xff;
+
+	return 0;
+}
+
+static int eeprom_read(int busno, int slave, int alen, struct venice_board_info *info)
+{
+	int i;
+	int chksum;
+	unsigned char *buf = (unsigned char *)info;
+	struct udevice *dev, *bus;
+	int ret;
+
+	/* probe device */
+	ret = uclass_get_device_by_seq(UCLASS_I2C, busno, &bus);
+	if (ret)
+		return ret;
+	ret = dm_i2c_probe(bus, slave, 0, &dev);
+	if (ret)
+		return ret;
+
+	/* read eeprom config section */
+	memset(info, 0, sizeof(*info));
+	ret = i2c_set_chip_offset_len(dev, alen);
+	if (ret) {
+		puts("EEPROM: Failed to set alen\n");
+		return ret;
+	}
+	ret = dm_i2c_read(dev, 0x00, buf, sizeof(*info));
+	if (ret) {
+		if (slave == SOM_EEPROM_ADDR)
+			printf("EEPROM: Failed to read EEPROM\n");
+		return ret;
+	}
+
+	/* validate checksum */
+	for (chksum = 0, i = 0; i < (int)sizeof(*info) - 2; i++)
+		chksum += buf[i];
+	if ((info->chksum[0] != chksum >> 8) ||
+	    (info->chksum[1] != (chksum & 0xff))) {
+		printf("EEPROM: I2C%d@0x%02x: Invalid Checksum\n", busno, slave);
+		print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info));
+		memset(info, 0, sizeof(*info));
+		return -EINVAL;
+	}
+
+	/* sanity check valid model */
+	if (info->model[0] != 'G' || info->model[1] != 'W') {
+		printf("EEPROM: I2C%d@0x%02x: Invalid Model in EEPROM\n", busno, slave);
+		print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info));
+		memset(info, 0, sizeof(*info));
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+/* determine BOM revision from model */
+int get_bom_rev(const char *str)
+{
+	int  rev_bom = 0;
+	int i;
+
+	for (i = strlen(str) - 1; i > 0; i--) {
+		if (str[i] == '-')
+			break;
+		if (str[i] >= '1' && str[i] <= '9') {
+			rev_bom = str[i] - '0';
+			break;
+		}
+	}
+	return rev_bom;
+}
+
+/* determine PCB revision from model */
+char get_pcb_rev(const char *str)
+{
+	char rev_pcb = 'A';
+	int i;
+
+	for (i = strlen(str) - 1; i > 0; i--) {
+		if (str[i] == '-')
+			break;
+		if (str[i] >= 'A') {
+			rev_pcb = str[i];
+			break;
+		}
+	}
+	return rev_pcb;
+}
+
+/*
+ * get dt name based on model and detail level:
+ *
+ * For boards that are a combination of a SoM plus a Baseboard:
+ *   Venice SoM part numbers are GW70xx where xx is:
+ *    7000-7019: same PCB with som dt of '0x'
+ *    7020-7039: same PCB with som dt of '2x'
+ *    7040-7059: same PCB with som dt of '4x'
+ *    7060-7079: same PCB with som dt of '6x'
+ *    7080-7099: same PCB with som dt of '8x'
+ *   Venice Baseboard part numbers are GW7xxx where xxx is:
+ *    7100-7199: same PCB with base dt of '71xx'
+ *    7200-7299: same PCB with base dt of '72xx'
+ *    7300-7399: same PCB with base dt of '73xx'
+ *    7400-7499: same PCB with base dt of '74xx'
+ *    7500-7599: same PCB with base dt of '75xx'
+ *    7600-7699: same PCB with base dt of '76xx'
+ *    7700-7799: same PCB with base dt of '77xx'
+ *    7800-7899: same PCB with base dt of '78xx'
+ *   DT name is comprised of:
+ *    gw<base dt>-<som dt>-[base-pcb-rev][base-bom-rev][som-pcb-rev][som-bom-rev]
+ *
+ * For board models from 7900-7999 each PCB is unique with its own dt:
+ *   DT name is comprised:
+ *    gw<model>-[pcb-rev][bom-rev]
+ *
+ */
+#define snprintfcat(dest, sz, fmt, ...) \
+	snprintf((dest) + strlen(dest), (sz) - strlen(dest), fmt, ##__VA_ARGS__)
+const char *eeprom_get_dtb_name(int level, char *buf, int sz)
+{
+#ifdef CONFIG_IMX8MM
+	const char *pre = "imx8mm-venice-gw";
+#elif CONFIG_IMX8MN
+	const char *pre = "imx8mn-venice-gw";
+#elif CONFIG_IMX8MP
+	const char *pre = "imx8mp-venice-gw";
+#endif
+	int model, rev_pcb, rev_bom;
+
+	model = ((som_info.model[2] - '0') * 1000)
+		+ ((som_info.model[3] - '0') * 100)
+		+ ((som_info.model[4] - '0') * 10)
+		+ (som_info.model[5] - '0');
+	rev_pcb = tolower(get_pcb_rev(som_info.model));
+	rev_bom = get_bom_rev(som_info.model);
+
+	/* som + baseboard*/
+	if (base_info.model[0]) {
+		/* baseboard id: 7100-7199->71; 7200-7299->72; etc */
+		int base = ((base_info.model[2] - '0') * 10) + (base_info.model[3] - '0');
+		/* som id: 7000-7019->1; 7020-7039->2; etc */
+		int som = ((model % 100) / 20) * 2;
+		int rev_base_pcb = tolower(get_pcb_rev(base_info.model));
+		int rev_base_bom = get_bom_rev(base_info.model);
+
+		snprintf(buf, sz, "%s%2dxx-%dx", pre, base, som);
+		switch (level) {
+		case 0: /* full model (ie gw73xx-0x-a1a1) */
+			if (rev_base_bom)
+				snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom);
+			else
+				snprintfcat(buf, sz, "-%c", rev_base_pcb);
+			if (rev_bom)
+				snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom);
+			else
+				snprintfcat(buf, sz, "%c", rev_pcb);
+			break;
+		case 1: /* don't care about SoM revision */
+			if (rev_base_bom)
+				snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom);
+			else
+				snprintfcat(buf, sz, "-%c", rev_base_pcb);
+			snprintfcat(buf, sz, "xx");
+			break;
+		case 2: /* don't care about baseboard revision */
+			snprintfcat(buf, sz, "-xx");
+			if (rev_bom)
+				snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom);
+			else
+				snprintfcat(buf, sz, "%c", rev_pcb);
+			break;
+		case 3: /* don't care about SoM/baseboard revision */
+			break;
+		default:
+			return NULL;
+		}
+	} else {
+		snprintf(buf, sz, "%s%04d", pre, model);
+		switch (level) {
+		case 0: /* full model wth PCB and BOM revision first (ie gw7901-a1) */
+			if (rev_bom)
+				snprintfcat(buf, sz, "-%c%d", rev_pcb, rev_bom);
+			else
+				snprintfcat(buf, sz, "-%c", rev_pcb);
+			break;
+		case 1: /* don't care about BOM revision */
+			snprintfcat(buf, sz, "-%c", rev_pcb);
+			break;
+		case 2: /* don't care about PCB or BOM revision */
+			break;
+		case 3: /* don't care about last digit of model */
+			buf[strlen(buf) - 1] = 'x';
+			break;
+		case 4: /* don't care about last two digits of model */
+			buf[strlen(buf) - 1] = 'x';
+			buf[strlen(buf) - 2] = 'x';
+			break;
+		default:
+			return NULL;
+			break;
+		}
+	}
+
+	return buf;
+}
+
+static int eeprom_info(bool verbose)
+{
+	printf("Model   : %s\n", venice_model);
+	printf("Serial  : %d\n", som_info.serial);
+	printf("MFGDate : %02x-%02x-%02x%02x\n",
+	       som_info.mfgdate[0], som_info.mfgdate[1],
+	       som_info.mfgdate[2], som_info.mfgdate[3]);
+	if (base_info.model[0] && verbose) {
+		printf("SOM     : %s %d %02x-%02x-%02x%02x\n",
+		       som_info.model, som_info.serial,
+		       som_info.mfgdate[0], som_info.mfgdate[1],
+		       som_info.mfgdate[2], som_info.mfgdate[3]);
+		printf("BASE    : %s %d %02x-%02x-%02x%02x\n",
+		       base_info.model, base_info.serial,
+		       base_info.mfgdate[0], base_info.mfgdate[1],
+		       base_info.mfgdate[2], base_info.mfgdate[3]);
+	}
+
+	return 0;
+}
+
+int eeprom_init(int quiet)
+{
+	char rev_pcb;
+	int rev_bom;
+	int ret;
+
+	ret = eeprom_read(SOM_EEPROM_BUSNO, SOM_EEPROM_ADDR, 1, &som_info);
+	if (ret) {
+		puts("ERROR: Failed to probe EEPROM\n");
+		memset(&som_info, 0, sizeof(som_info));
+		return 0;
+	}
+
+	/* read optional baseboard EEPROM */
+	eeprom_read(BASEBOARD_EEPROM_BUSNO, BASEBOARD_EEPROM_ADDR, 2, &base_info);
+
+	/* create model strings */
+	if (base_info.model[0]) {
+		sprintf(venice_model, "GW%c%c%c%c-%c%c-",
+			som_info.model[2], /* family */
+			base_info.model[3], /* baseboard */
+			base_info.model[4], base_info.model[5], /* subload of baseboard */
+			som_info.model[4], som_info.model[5]); /* last 2digits of SOM */
+
+		/* baseboard revision */
+		rev_pcb = get_pcb_rev(base_info.model);
+		rev_bom = get_bom_rev(base_info.model);
+		if (rev_bom)
+			sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom);
+		else
+			sprintf(venice_model + strlen(venice_model), "%c", rev_pcb);
+		/* som revision */
+		rev_pcb = get_pcb_rev(som_info.model);
+		rev_bom = get_bom_rev(som_info.model);
+		if (rev_bom)
+			sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom);
+		else
+			sprintf(venice_model + strlen(venice_model), "%c", rev_pcb);
+	} else {
+		strcpy(venice_model, som_info.model);
+	}
+	venice_serial = som_info.serial;
+
+	if (!quiet)
+		eeprom_info(false);
+
+	return (16 << som_info.sdram_size);
+}
+
+void board_gsc_info(void)
+{
+	eeprom_info(true);
+}
+
+const char *eeprom_get_model(void)
+{
+	return venice_model;
+}
+
+u32 eeprom_get_serial(void)
+{
+	return venice_serial;
+}
diff --git a/board/gateworks/venice/gsc.h b/board/gateworks/venice/eeprom.h
index b391b2e..37bfe76 100644
--- a/board/gateworks/venice/gsc.h
+++ b/board/gateworks/venice/eeprom.h
@@ -3,19 +3,8 @@
  * Copyright 2021 Gateworks Corporation
  */
 
-#ifndef _GSC_H_
-#define _GSC_H_
-
-/* I2C bus numbers */
-#define GSC_BUSNO			0
-#define BASEBOARD_EEPROM_BUSNO		1
-
-/* I2C slave addresses */
-#define GSC_SC_ADDR             0x20
-#define GSC_RTC_ADDR            0x68
-#define GSC_HWMON_ADDR          0x29
-#define GSC_EEPROM_ADDR         0x51
-#define BASEBOARD_EEPROM_ADDR	0x52
+#ifndef _VENICE_EEPROM_H_
+#define _VENICE_EEPROM_H_
 
 struct venice_board_info {
 	u8 mac[6];		/* 0x00: MAC base */
@@ -35,11 +24,10 @@ struct venice_board_info {
 	u8 chksum[2];	/* 0x4E */
 };
 
-int gsc_init(int quiet);
-int gsc_hwmon(void);
-const char *gsc_get_model(void);
-const char *gsc_get_dtb_name(int level, char *buf, int len);
-int gsc_getmac(int index, uint8_t *enetaddr);
-uint32_t gsc_get_serial(void);
+int eeprom_init(int quiet);
+const char *eeprom_get_model(void);
+const char *eeprom_get_dtb_name(int level, char *buf, int len);
+int eeprom_getmac(int index, uint8_t *enetaddr);
+uint32_t eeprom_get_serial(void);
 
 #endif
diff --git a/board/gateworks/venice/gsc.c b/board/gateworks/venice/gsc.c
deleted file mode 100644
index 763b89b..0000000
--- a/board/gateworks/venice/gsc.c
+++ /dev/null
@@ -1,700 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2021 Gateworks Corporation
- */
-
-#include <common.h>
-#include <command.h>
-#include <hang.h>
-#include <hexdump.h>
-#include <i2c.h>
-#include <linux/delay.h>
-#include <dm/uclass.h>
-
-#include "gsc.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct venice_board_info som_info;
-struct venice_board_info base_info;
-char venice_model[32];
-uint32_t venice_serial;
-
-/* return a mac address from EEPROM info */
-int gsc_getmac(int index, uint8_t *address)
-{
-	int i, j;
-	u32 maclow, machigh;
-	u64 mac;
-
-	j = 0;
-	if (som_info.macno) {
-		maclow = som_info.mac[5];
-		maclow |= som_info.mac[4] << 8;
-		maclow |= som_info.mac[3] << 16;
-		maclow |= som_info.mac[2] << 24;
-		machigh = som_info.mac[1];
-		machigh |= som_info.mac[0] << 8;
-		mac = machigh;
-		mac <<= 32;
-		mac |= maclow;
-		for (i = 0; i < som_info.macno; i++, j++) {
-			if (index == j)
-				goto out;
-		}
-	}
-
-	maclow = base_info.mac[5];
-	maclow |= base_info.mac[4] << 8;
-	maclow |= base_info.mac[3] << 16;
-	maclow |= base_info.mac[2] << 24;
-	machigh = base_info.mac[1];
-	machigh |= base_info.mac[0] << 8;
-	mac = machigh;
-	mac <<= 32;
-	mac |= maclow;
-	for (i = 0; i < base_info.macno; i++, j++) {
-		if (index == j)
-			goto out;
-	}
-
-	return -EINVAL;
-
-out:
-	mac += i;
-	address[0] = (mac >> 40) & 0xff;
-	address[1] = (mac >> 32) & 0xff;
-	address[2] = (mac >> 24) & 0xff;
-	address[3] = (mac >> 16) & 0xff;
-	address[4] = (mac >> 8) & 0xff;
-	address[5] = (mac >> 0) & 0xff;
-
-	return 0;
-}
-
-/* System Controller registers */
-enum {
-	GSC_SC_CTRL0		= 0,
-	GSC_SC_CTRL1		= 1,
-	GSC_SC_STATUS		= 10,
-	GSC_SC_FWCRC		= 12,
-	GSC_SC_FWVER		= 14,
-	GSC_SC_WP		= 15,
-	GSC_SC_RST_CAUSE	= 16,
-	GSC_SC_THERM_PROTECT	= 19,
-};
-
-/* System Controller Control1 bits */
-enum {
-	GSC_SC_CTRL1_WDTIME	= 4, /* 1 = 60s timeout, 0 = 30s timeout */
-	GSC_SC_CTRL1_WDEN	= 5, /* 1 = enable, 0 = disable */
-	GSC_SC_CTRL1_BOOT_CHK   = 6, /* 1 = enable alt boot check */
-	GSC_SC_CTRL1_WDDIS	= 7, /* 1 = disable boot watchdog */
-};
-
-/* System Controller Interrupt bits */
-enum {
-	GSC_SC_IRQ_PB		= 0, /* Pushbutton switch */
-	GSC_SC_IRQ_SECURE	= 1, /* Secure Key erase operation complete */
-	GSC_SC_IRQ_EEPROM_WP	= 2, /* EEPROM write violation */
-	GSC_SC_IRQ_GPIO		= 4, /* GPIO change */
-	GSC_SC_IRQ_TAMPER	= 5, /* Tamper detect */
-	GSC_SC_IRQ_WATCHDOG	= 6, /* Watchdog trip */
-	GSC_SC_IRQ_PBLONG	= 7, /* Pushbutton long hold */
-};
-
-/* System Controller WP bits */
-enum {
-	GSC_SC_WP_ALL		= 0, /* Write Protect All EEPROM regions */
-	GSC_SC_WP_BOARDINFO	= 1, /* Write Protect Board Info region */
-};
-
-/* System Controller Reset Cause */
-enum {
-	GSC_SC_RST_CAUSE_VIN		= 0,
-	GSC_SC_RST_CAUSE_PB		= 1,
-	GSC_SC_RST_CAUSE_WDT		= 2,
-	GSC_SC_RST_CAUSE_CPU		= 3,
-	GSC_SC_RST_CAUSE_TEMP_LOCAL	= 4,
-	GSC_SC_RST_CAUSE_TEMP_REMOTE	= 5,
-	GSC_SC_RST_CAUSE_SLEEP		= 6,
-	GSC_SC_RST_CAUSE_BOOT_WDT	= 7,
-	GSC_SC_RST_CAUSE_BOOT_WDT_MAN	= 8,
-	GSC_SC_RST_CAUSE_SOFT_PWR	= 9,
-	GSC_SC_RST_CAUSE_MAX		= 10,
-};
-
-#include <dm/device.h>
-static struct udevice *gsc_get_dev(int busno, int slave)
-{
-	struct udevice *dev, *bus;
-	int ret;
-
-	ret = uclass_get_device_by_seq(UCLASS_I2C, busno, &bus);
-	if (ret) {
-		printf("GSC     : failed I2C%d probe: %d\n", busno, ret);
-		return NULL;
-	}
-	ret = dm_i2c_probe(bus, slave, 0, &dev);
-	if (ret)
-		return NULL;
-
-	return dev;
-}
-
-static int gsc_read_eeprom(int bus, int slave, int alen, struct venice_board_info *info)
-{
-	int i;
-	int chksum;
-	unsigned char *buf = (unsigned char *)info;
-	struct udevice *dev;
-	int ret;
-
-	/* probe device */
-	dev = gsc_get_dev(bus, slave);
-	if (!dev) {
-		if (slave == GSC_EEPROM_ADDR)
-			puts("ERROR: Failed to probe EEPROM\n");
-		return -ENODEV;
-	}
-
-	/* read eeprom config section */
-	memset(info, 0, sizeof(*info));
-	ret = i2c_set_chip_offset_len(dev, alen);
-	if (ret) {
-		puts("EEPROM: Failed to set alen\n");
-		return ret;
-	}
-	ret = dm_i2c_read(dev, 0x00, buf, sizeof(*info));
-	if (ret) {
-		if (slave == GSC_EEPROM_ADDR)
-			printf("EEPROM: Failed to read EEPROM\n");
-		return ret;
-	}
-
-	/* validate checksum */
-	for (chksum = 0, i = 0; i < (int)sizeof(*info) - 2; i++)
-		chksum += buf[i];
-	if ((info->chksum[0] != chksum >> 8) ||
-	    (info->chksum[1] != (chksum & 0xff))) {
-		printf("EEPROM: I2C%d@0x%02x: Invalid Checksum\n", bus, slave);
-		print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info));
-		memset(info, 0, sizeof(*info));
-		return -EINVAL;
-	}
-
-	/* sanity check valid model */
-	if (info->model[0] != 'G' || info->model[1] != 'W') {
-		printf("EEPROM: I2C%d@0x%02x: Invalid Model in EEPROM\n", bus, slave);
-		print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info));
-		memset(info, 0, sizeof(*info));
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static const char *gsc_get_rst_cause(struct udevice *dev)
-{
-	static char str[64];
-	static const char * const names[] = {
-		"VIN",
-		"PB",
-		"WDT",
-		"CPU",
-		"TEMP_L",
-		"TEMP_R",
-		"SLEEP",
-		"BOOT_WDT1",
-		"BOOT_WDT2",
-		"SOFT_PWR",
-	};
-	unsigned char reg;
-
-	/* reset cause */
-	str[0] = 0;
-	if (!dm_i2c_read(dev, GSC_SC_RST_CAUSE, &reg, 1)) {
-		if (reg < ARRAY_SIZE(names))
-			sprintf(str, "%s", names[reg]);
-		else
-			sprintf(str, "0x%02x", reg);
-	}
-
-	/* thermal protection */
-	if (!dm_i2c_read(dev, GSC_SC_THERM_PROTECT, &reg, 1)) {
-		strcat(str, " Thermal Protection ");
-		if (reg & BIT(0))
-			strcat(str, "Enabled");
-		else
-			strcat(str, "Disabled");
-	}
-
-	return str;
-}
-
-/* display hardware monitor ADC channels */
-int gsc_hwmon(void)
-{
-	const void *fdt = gd->fdt_blob;
-	struct udevice *dev;
-	int node, reg, mode, len, val, offset;
-	const char *label;
-	u8 buf[2];
-	int ret;
-
-	node = fdt_node_offset_by_compatible(fdt, -1, "gw,gsc-adc");
-	if (node <= 0)
-		return node;
-
-	/* probe device */
-	dev = gsc_get_dev(GSC_BUSNO, GSC_HWMON_ADDR);
-	if (!dev) {
-		puts("ERROR: Failed to probe GSC HWMON\n");
-		return -ENODEV;
-	}
-
-	/* iterate over hwmon nodes */
-	node = fdt_first_subnode(fdt, node);
-	while (node > 0) {
-		reg = fdtdec_get_int(fdt, node, "reg", -1);
-		mode = fdtdec_get_int(fdt, node, "gw,mode", -1);
-		offset = fdtdec_get_int(fdt, node, "gw,voltage-offset-microvolt", 0);
-		label = fdt_stringlist_get(fdt, node, "label", 0, NULL);
-
-		if ((reg == -1) || (mode == -1) || !label)
-			printf("invalid dt:%s\n", fdt_get_name(fdt, node, NULL));
-
-		memset(buf, 0, sizeof(buf));
-		ret = dm_i2c_read(dev, reg, buf, sizeof(buf));
-		if (ret) {
-			printf("i2c error: %d\n", ret);
-			continue;
-		}
-		val = buf[0] | buf[1] << 8;
-		if (val >= 0) {
-			const u32 *div;
-			int r[2];
-
-			switch (mode) {
-			case 0: /* temperature (C*10) */
-				if (val > 0x8000)
-					val -= 0xffff;
-				printf("%-8s: %d.%ldC\n", label, val / 10, abs(val % 10));
-				break;
-			case 1: /* prescaled voltage */
-				if (val != 0xffff)
-					printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000);
-				break;
-			case 2: /* scaled based on ref volt and resolution */
-				val *= 2500;
-				val /= 1 << 12;
-
-				/* apply pre-scaler voltage divider */
-				div  = fdt_getprop(fdt, node, "gw,voltage-divider-ohms", &len);
-				if (div && (len == sizeof(uint32_t) * 2)) {
-					r[0] = fdt32_to_cpu(div[0]);
-					r[1] = fdt32_to_cpu(div[1]);
-					if (r[0] && r[1]) {
-						val *= (r[0] + r[1]);
-						val /= r[1];
-					}
-				}
-
-				/* adjust by offset */
-				val += (offset / 1000);
-
-				printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000);
-				break;
-			}
-		}
-		node = fdt_next_subnode(fdt, node);
-	}
-
-	return 0;
-}
-
-/* determine BOM revision from model */
-int get_bom_rev(const char *str)
-{
-	int  rev_bom = 0;
-	int i;
-
-	for (i = strlen(str) - 1; i > 0; i--) {
-		if (str[i] == '-')
-			break;
-		if (str[i] >= '1' && str[i] <= '9') {
-			rev_bom = str[i] - '0';
-			break;
-		}
-	}
-	return rev_bom;
-}
-
-/* determine PCB revision from model */
-char get_pcb_rev(const char *str)
-{
-	char rev_pcb = 'A';
-	int i;
-
-	for (i = strlen(str) - 1; i > 0; i--) {
-		if (str[i] == '-')
-			break;
-		if (str[i] >= 'A') {
-			rev_pcb = str[i];
-			break;
-		}
-	}
-	return rev_pcb;
-}
-
-/*
- * get dt name based on model and detail level:
- *
- * For boards that are a combination of a SoM plus a Baseboard:
- *   Venice SoM part numbers are GW70xx where xx is:
- *    7000-7019: same PCB with som dt of '0x'
- *    7020-7039: same PCB with som dt of '2x'
- *    7040-7059: same PCB with som dt of '4x'
- *    7060-7079: same PCB with som dt of '6x'
- *    7080-7099: same PCB with som dt of '8x'
- *   Venice Baseboard part numbers are GW7xxx where xxx is:
- *    7100-7199: same PCB with base dt of '71xx'
- *    7200-7299: same PCB with base dt of '72xx'
- *    7300-7399: same PCB with base dt of '73xx'
- *    7400-7499: same PCB with base dt of '74xx'
- *    7500-7599: same PCB with base dt of '75xx'
- *    7600-7699: same PCB with base dt of '76xx'
- *    7700-7799: same PCB with base dt of '77xx'
- *    7800-7899: same PCB with base dt of '78xx'
- *   DT name is comprised of:
- *    gw<base dt>-<som dt>-[base-pcb-rev][base-bom-rev][som-pcb-rev][som-bom-rev]
- *
- * For board models from 7900-7999 each PCB is unique with its own dt:
- *   DT name is comprised:
- *    gw<model>-[pcb-rev][bom-rev]
- *
- */
-#define snprintfcat(dest, sz, fmt, ...) \
-	snprintf((dest) + strlen(dest), (sz) - strlen(dest), fmt, ##__VA_ARGS__)
-const char *gsc_get_dtb_name(int level, char *buf, int sz)
-{
-#ifdef CONFIG_IMX8MM
-	const char *pre = "imx8mm-venice-gw";
-#else
-	const char *pre = "imx8mn-venice-gw";
-#endif
-	int model, rev_pcb, rev_bom;
-
-	model = ((som_info.model[2] - '0') * 1000)
-		+ ((som_info.model[3] - '0') * 100)
-		+ ((som_info.model[4] - '0') * 10)
-		+ (som_info.model[5] - '0');
-	rev_pcb = tolower(get_pcb_rev(som_info.model));
-	rev_bom = get_bom_rev(som_info.model);
-
-	/* som + baseboard*/
-	if (base_info.model[0]) {
-		/* baseboard id: 7100-7199->71; 7200-7299->72; etc */
-		int base = ((base_info.model[2] - '0') * 10) + (base_info.model[3] - '0');
-		/* som id: 7000-7019->1; 7020-7039->2; etc */
-		int som = ((model % 100) / 20) * 2;
-		int rev_base_pcb = tolower(get_pcb_rev(base_info.model));
-		int rev_base_bom = get_bom_rev(base_info.model);
-
-		snprintf(buf, sz, "%s%2dxx-%dx", pre, base, som);
-		switch (level) {
-		case 0: /* full model (ie gw73xx-0x-a1a1) */
-			if (rev_base_bom)
-				snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom);
-			else
-				snprintfcat(buf, sz, "-%c", rev_base_pcb);
-			if (rev_bom)
-				snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom);
-			else
-				snprintfcat(buf, sz, "%c", rev_pcb);
-			break;
-		case 1: /* don't care about SoM revision */
-			if (rev_base_bom)
-				snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom);
-			else
-				snprintfcat(buf, sz, "-%c", rev_base_pcb);
-			snprintfcat(buf, sz, "xx");
-			break;
-		case 2: /* don't care about baseboard revision */
-			snprintfcat(buf, sz, "-xx");
-			if (rev_bom)
-				snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom);
-			else
-				snprintfcat(buf, sz, "%c", rev_pcb);
-			break;
-		case 3: /* don't care about SoM/baseboard revision */
-			break;
-		default:
-			return NULL;
-		}
-	} else {
-		snprintf(buf, sz, "%s%04d", pre, model);
-		switch (level) {
-		case 0: /* full model wth PCB and BOM revision first (ie gw7901-a1) */
-			if (rev_bom)
-				snprintfcat(buf, sz, "-%c%d", rev_pcb, rev_bom);
-			else
-				snprintfcat(buf, sz, "-%c", rev_pcb);
-			break;
-		case 1: /* don't care about BOM revision */
-			snprintfcat(buf, sz, "-%c", rev_pcb);
-			break;
-		case 2: /* don't care about PCB or BOM revision */
-			break;
-		default:
-			return NULL;
-		}
-	}
-
-	return buf;
-}
-
-static int gsc_read(void)
-{
-	char rev_pcb;
-	int rev_bom;
-	int ret;
-
-	ret = gsc_read_eeprom(GSC_BUSNO, GSC_EEPROM_ADDR, 1, &som_info);
-	if (ret) {
-		memset(&som_info, 0, sizeof(som_info));
-		return ret;
-	}
-
-	/* read optional baseboard EEPROM */
-	gsc_read_eeprom(BASEBOARD_EEPROM_BUSNO, BASEBOARD_EEPROM_ADDR,
-			2, &base_info);
-
-	/* create model strings */
-	if (base_info.model[0]) {
-		sprintf(venice_model, "GW%c%c%c%c-%c%c-",
-			som_info.model[2], /* family */
-			base_info.model[3], /* baseboard */
-			base_info.model[4], base_info.model[5], /* subload of baseboard */
-			som_info.model[4], som_info.model[5]); /* last 2digits of SOM */
-
-		/* baseboard revision */
-		rev_pcb = get_pcb_rev(base_info.model);
-		rev_bom = get_bom_rev(base_info.model);
-		if (rev_bom)
-			sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom);
-		else
-			sprintf(venice_model + strlen(venice_model), "%c", rev_pcb);
-		/* som revision */
-		rev_pcb = get_pcb_rev(som_info.model);
-		rev_bom = get_bom_rev(som_info.model);
-		if (rev_bom)
-			sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom);
-		else
-			sprintf(venice_model + strlen(venice_model), "%c", rev_pcb);
-	} else {
-		strcpy(venice_model, som_info.model);
-	}
-	venice_serial = som_info.serial;
-
-	return 0;
-}
-
-static int gsc_info(int verbose)
-{
-	struct udevice *dev;
-	unsigned char buf[16];
-
-	printf("Model   : %s\n", venice_model);
-	printf("Serial  : %d\n", som_info.serial);
-	printf("MFGDate : %02x-%02x-%02x%02x\n",
-	       som_info.mfgdate[0], som_info.mfgdate[1],
-	       som_info.mfgdate[2], som_info.mfgdate[3]);
-	if (base_info.model[0] && verbose > 1) {
-		printf("SOM     : %s %d %02x-%02x-%02x%02x\n",
-		       som_info.model, som_info.serial,
-		       som_info.mfgdate[0], som_info.mfgdate[1],
-		       som_info.mfgdate[2], som_info.mfgdate[3]);
-		printf("BASE    : %s %d %02x-%02x-%02x%02x\n",
-		       base_info.model, base_info.serial,
-		       base_info.mfgdate[0], base_info.mfgdate[1],
-		       base_info.mfgdate[2], base_info.mfgdate[3]);
-	}
-
-	/* Display RTC */
-	puts("RTC     : ");
-	dev = gsc_get_dev(GSC_BUSNO, GSC_RTC_ADDR);
-	if (!dev) {
-		puts("Failed to probe GSC RTC\n");
-	} else {
-		dm_i2c_read(dev, 0, buf, 6);
-		printf("%d\n", buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24);
-	}
-
-	/* Display hwmon */
-	gsc_hwmon();
-
-	return 0;
-}
-
-int gsc_init(int quiet)
-{
-	unsigned char buf[16];
-	struct udevice *dev;
-	int ret;
-
-	/*
-	 * On a board with a missing/depleted backup battery for GSC, the
-	 * board may be ready to probe the GSC before its firmware is
-	 * running.  We will wait here indefinately for the GSC/EEPROM.
-	 */
-#ifdef CONFIG_IMX8MN
-	// TODO:
-	//   IMX8MN boots quicker than IMX8MM and exposes issue
-	//   where because GSC I2C state machine isn't running and its
-	//   SCL/SDA are driven low spams i2c errors
-	//
-	//   Put a loop here that somehow waits for I2C CLK/DAT to be high
-	mdelay(40);
-#endif
-	while (1) {
-		/* probe device */
-		dev = gsc_get_dev(GSC_BUSNO, GSC_SC_ADDR);
-		if (dev)
-			break;
-		mdelay(1);
-	}
-
-	ret = dm_i2c_read(dev, 0, buf, sizeof(buf));
-	if (ret) {
-		puts("ERROR: Failed reading GSC\n");
-		return ret;
-	}
-	gsc_read();
-
-	/* banner */
-	if (!quiet) {
-		printf("GSC     : v%d 0x%04x", buf[GSC_SC_FWVER],
-		       buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC + 1] << 8);
-		printf(" RST:%s", gsc_get_rst_cause(dev));
-		printf("\n");
-		gsc_info(1);
-	}
-
-	if (ret)
-		hang();
-
-	return (16 << som_info.sdram_size);
-}
-
-const char *gsc_get_model(void)
-{
-	return venice_model;
-}
-
-uint32_t gsc_get_serial(void)
-{
-	return venice_serial;
-}
-
-#if !(IS_ENABLED(CONFIG_SPL_BUILD))
-static int gsc_sleep(unsigned long secs)
-{
-	unsigned char reg;
-	struct udevice *dev;
-	int ret;
-
-	/* probe device */
-	dev = gsc_get_dev(GSC_BUSNO, GSC_SC_ADDR);
-	if (!dev)
-		return -ENODEV;
-
-	printf("GSC Sleeping for %ld seconds\n", secs);
-	reg = (secs >> 24) & 0xff;
-	ret = dm_i2c_write(dev, 9, &reg, 1);
-	if (ret)
-		goto err;
-	reg = (secs >> 16) & 0xff;
-	ret = dm_i2c_write(dev, 8, &reg, 1);
-	if (ret)
-		goto err;
-	reg = (secs >> 8) & 0xff;
-	ret = dm_i2c_write(dev, 7, &reg, 1);
-	if (ret)
-		goto err;
-	reg = secs & 0xff;
-	ret = dm_i2c_write(dev, 6, &reg, 1);
-	if (ret)
-		goto err;
-	ret = dm_i2c_read(dev, GSC_SC_CTRL1, &reg, 1);
-	if (ret)
-		goto err;
-	reg |= (1 << 2);
-	ret = dm_i2c_write(dev, GSC_SC_CTRL1, &reg, 1);
-	if (ret)
-		goto err;
-	reg &= ~(1 << 2);
-	reg |= 0x3;
-	ret = dm_i2c_write(dev, GSC_SC_CTRL1, &reg, 1);
-	if (ret)
-		goto err;
-
-	return 0;
-
-err:
-	printf("i2c error\n");
-	return ret;
-}
-
-static int gsc_boot_wd_disable(void)
-{
-	u8 reg;
-	struct udevice *dev;
-	int ret;
-
-	/* probe device */
-	dev = gsc_get_dev(GSC_BUSNO, GSC_SC_ADDR);
-	if (!dev)
-		return -ENODEV;
-
-	ret = dm_i2c_read(dev, GSC_SC_CTRL1, &reg, 1);
-	if (ret)
-		goto err;
-	reg |= (1 << GSC_SC_CTRL1_WDDIS);
-	reg &= ~(1 << GSC_SC_CTRL1_BOOT_CHK);
-	ret = dm_i2c_write(dev, GSC_SC_CTRL1, &reg, 1);
-	if (ret)
-		goto err;
-	puts("GSC     : boot watchdog disabled\n");
-
-	return 0;
-
-err:
-	printf("i2c error");
-	return ret;
-}
-
-static int do_gsc(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
-{
-	if (argc < 2)
-		return gsc_info(2);
-
-	if (strcasecmp(argv[1], "sleep") == 0) {
-		if (argc < 3)
-			return CMD_RET_USAGE;
-		if (!gsc_sleep(dectoul(argv[2], NULL)))
-			return CMD_RET_SUCCESS;
-	} else if (strcasecmp(argv[1], "hwmon") == 0) {
-		if (!gsc_hwmon())
-			return CMD_RET_SUCCESS;
-	} else if (strcasecmp(argv[1], "wd-disable") == 0) {
-		if (!gsc_boot_wd_disable())
-			return CMD_RET_SUCCESS;
-	}
-
-	return CMD_RET_USAGE;
-}
-
-U_BOOT_CMD(gsc, 4, 1, do_gsc, "Gateworks System Controller",
-	   "[sleep <secs>]|[hwmon]|[wd-disable]\n");
-#endif
diff --git a/board/gateworks/venice/imximage-8mp-lpddr4.cfg b/board/gateworks/venice/imximage-8mp-lpddr4.cfg
new file mode 100644
index 0000000..7731d54
--- /dev/null
+++ b/board/gateworks/venice/imximage-8mp-lpddr4.cfg
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2022 Gateworks Corporation
+ */
+
+
+ROM_VERSION	v2
+BOOT_FROM	sd
+LOADER		u-boot-spl-ddr.bin	0x920000
diff --git a/board/gateworks/venice/lpddr4_timing.h b/board/gateworks/venice/lpddr4_timing.h
index f9a3ee1..62b8606 100644
--- a/board/gateworks/venice/lpddr4_timing.h
+++ b/board/gateworks/venice/lpddr4_timing.h
@@ -15,6 +15,8 @@ extern struct dram_timing_info dram_timing_4gb;
 extern struct dram_timing_info dram_timing_1gb_single_die;
 extern struct dram_timing_info dram_timing_2gb_single_die;
 extern struct dram_timing_info dram_timing_2gb_dual_die;
+#elif CONFIG_IMX8MP
+extern struct dram_timing_info dram_timing_4gb_dual_die;
 #endif
 
 #endif /* __LPDDR4_TIMING_H__ */
diff --git a/board/gateworks/venice/lpddr4_timing_imx8mp.c b/board/gateworks/venice/lpddr4_timing_imx8mp.c
new file mode 100644
index 0000000..2e96332
--- /dev/null
+++ b/board/gateworks/venice/lpddr4_timing_imx8mp.c
@@ -0,0 +1,1846 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <linux/kernel.h>
+#include <asm/arch/ddr.h>
+
+/*
+ * Generated code from MX8M_DDR_tool v3.30 using MX8M_Plus RPAv7
+ */
+/* ddr phy trained csr */
+static struct dram_cfg_param ddr_ddrphy_trained_csr[] = {
+	{ 0x200b2, 0x0 },
+	{ 0x1200b2, 0x0 },
+	{ 0x2200b2, 0x0 },
+	{ 0x200cb, 0x0 },
+	{ 0x10043, 0x0 },
+	{ 0x110043, 0x0 },
+	{ 0x210043, 0x0 },
+	{ 0x10143, 0x0 },
+	{ 0x110143, 0x0 },
+	{ 0x210143, 0x0 },
+	{ 0x11043, 0x0 },
+	{ 0x111043, 0x0 },
+	{ 0x211043, 0x0 },
+	{ 0x11143, 0x0 },
+	{ 0x111143, 0x0 },
+	{ 0x211143, 0x0 },
+	{ 0x12043, 0x0 },
+	{ 0x112043, 0x0 },
+	{ 0x212043, 0x0 },
+	{ 0x12143, 0x0 },
+	{ 0x112143, 0x0 },
+	{ 0x212143, 0x0 },
+	{ 0x13043, 0x0 },
+	{ 0x113043, 0x0 },
+	{ 0x213043, 0x0 },
+	{ 0x13143, 0x0 },
+	{ 0x113143, 0x0 },
+	{ 0x213143, 0x0 },
+	{ 0x80, 0x0 },
+	{ 0x100080, 0x0 },
+	{ 0x200080, 0x0 },
+	{ 0x1080, 0x0 },
+	{ 0x101080, 0x0 },
+	{ 0x201080, 0x0 },
+	{ 0x2080, 0x0 },
+	{ 0x102080, 0x0 },
+	{ 0x202080, 0x0 },
+	{ 0x3080, 0x0 },
+	{ 0x103080, 0x0 },
+	{ 0x203080, 0x0 },
+	{ 0x4080, 0x0 },
+	{ 0x104080, 0x0 },
+	{ 0x204080, 0x0 },
+	{ 0x5080, 0x0 },
+	{ 0x105080, 0x0 },
+	{ 0x205080, 0x0 },
+	{ 0x6080, 0x0 },
+	{ 0x106080, 0x0 },
+	{ 0x206080, 0x0 },
+	{ 0x7080, 0x0 },
+	{ 0x107080, 0x0 },
+	{ 0x207080, 0x0 },
+	{ 0x8080, 0x0 },
+	{ 0x108080, 0x0 },
+	{ 0x208080, 0x0 },
+	{ 0x9080, 0x0 },
+	{ 0x109080, 0x0 },
+	{ 0x209080, 0x0 },
+	{ 0x10080, 0x0 },
+	{ 0x110080, 0x0 },
+	{ 0x210080, 0x0 },
+	{ 0x10180, 0x0 },
+	{ 0x110180, 0x0 },
+	{ 0x210180, 0x0 },
+	{ 0x11080, 0x0 },
+	{ 0x111080, 0x0 },
+	{ 0x211080, 0x0 },
+	{ 0x11180, 0x0 },
+	{ 0x111180, 0x0 },
+	{ 0x211180, 0x0 },
+	{ 0x12080, 0x0 },
+	{ 0x112080, 0x0 },
+	{ 0x212080, 0x0 },
+	{ 0x12180, 0x0 },
+	{ 0x112180, 0x0 },
+	{ 0x212180, 0x0 },
+	{ 0x13080, 0x0 },
+	{ 0x113080, 0x0 },
+	{ 0x213080, 0x0 },
+	{ 0x13180, 0x0 },
+	{ 0x113180, 0x0 },
+	{ 0x213180, 0x0 },
+	{ 0x10081, 0x0 },
+	{ 0x110081, 0x0 },
+	{ 0x210081, 0x0 },
+	{ 0x10181, 0x0 },
+	{ 0x110181, 0x0 },
+	{ 0x210181, 0x0 },
+	{ 0x11081, 0x0 },
+	{ 0x111081, 0x0 },
+	{ 0x211081, 0x0 },
+	{ 0x11181, 0x0 },
+	{ 0x111181, 0x0 },
+	{ 0x211181, 0x0 },
+	{ 0x12081, 0x0 },
+	{ 0x112081, 0x0 },
+	{ 0x212081, 0x0 },
+	{ 0x12181, 0x0 },
+	{ 0x112181, 0x0 },
+	{ 0x212181, 0x0 },
+	{ 0x13081, 0x0 },
+	{ 0x113081, 0x0 },
+	{ 0x213081, 0x0 },
+	{ 0x13181, 0x0 },
+	{ 0x113181, 0x0 },
+	{ 0x213181, 0x0 },
+	{ 0x100d0, 0x0 },
+	{ 0x1100d0, 0x0 },
+	{ 0x2100d0, 0x0 },
+	{ 0x101d0, 0x0 },
+	{ 0x1101d0, 0x0 },
+	{ 0x2101d0, 0x0 },
+	{ 0x110d0, 0x0 },
+	{ 0x1110d0, 0x0 },
+	{ 0x2110d0, 0x0 },
+	{ 0x111d0, 0x0 },
+	{ 0x1111d0, 0x0 },
+	{ 0x2111d0, 0x0 },
+	{ 0x120d0, 0x0 },
+	{ 0x1120d0, 0x0 },
+	{ 0x2120d0, 0x0 },
+	{ 0x121d0, 0x0 },
+	{ 0x1121d0, 0x0 },
+	{ 0x2121d0, 0x0 },
+	{ 0x130d0, 0x0 },
+	{ 0x1130d0, 0x0 },
+	{ 0x2130d0, 0x0 },
+	{ 0x131d0, 0x0 },
+	{ 0x1131d0, 0x0 },
+	{ 0x2131d0, 0x0 },
+	{ 0x100d1, 0x0 },
+	{ 0x1100d1, 0x0 },
+	{ 0x2100d1, 0x0 },
+	{ 0x101d1, 0x0 },
+	{ 0x1101d1, 0x0 },
+	{ 0x2101d1, 0x0 },
+	{ 0x110d1, 0x0 },
+	{ 0x1110d1, 0x0 },
+	{ 0x2110d1, 0x0 },
+	{ 0x111d1, 0x0 },
+	{ 0x1111d1, 0x0 },
+	{ 0x2111d1, 0x0 },
+	{ 0x120d1, 0x0 },
+	{ 0x1120d1, 0x0 },
+	{ 0x2120d1, 0x0 },
+	{ 0x121d1, 0x0 },
+	{ 0x1121d1, 0x0 },
+	{ 0x2121d1, 0x0 },
+	{ 0x130d1, 0x0 },
+	{ 0x1130d1, 0x0 },
+	{ 0x2130d1, 0x0 },
+	{ 0x131d1, 0x0 },
+	{ 0x1131d1, 0x0 },
+	{ 0x2131d1, 0x0 },
+	{ 0x10068, 0x0 },
+	{ 0x10168, 0x0 },
+	{ 0x10268, 0x0 },
+	{ 0x10368, 0x0 },
+	{ 0x10468, 0x0 },
+	{ 0x10568, 0x0 },
+	{ 0x10668, 0x0 },
+	{ 0x10768, 0x0 },
+	{ 0x10868, 0x0 },
+	{ 0x11068, 0x0 },
+	{ 0x11168, 0x0 },
+	{ 0x11268, 0x0 },
+	{ 0x11368, 0x0 },
+	{ 0x11468, 0x0 },
+	{ 0x11568, 0x0 },
+	{ 0x11668, 0x0 },
+	{ 0x11768, 0x0 },
+	{ 0x11868, 0x0 },
+	{ 0x12068, 0x0 },
+	{ 0x12168, 0x0 },
+	{ 0x12268, 0x0 },
+	{ 0x12368, 0x0 },
+	{ 0x12468, 0x0 },
+	{ 0x12568, 0x0 },
+	{ 0x12668, 0x0 },
+	{ 0x12768, 0x0 },
+	{ 0x12868, 0x0 },
+	{ 0x13068, 0x0 },
+	{ 0x13168, 0x0 },
+	{ 0x13268, 0x0 },
+	{ 0x13368, 0x0 },
+	{ 0x13468, 0x0 },
+	{ 0x13568, 0x0 },
+	{ 0x13668, 0x0 },
+	{ 0x13768, 0x0 },
+	{ 0x13868, 0x0 },
+	{ 0x10069, 0x0 },
+	{ 0x10169, 0x0 },
+	{ 0x10269, 0x0 },
+	{ 0x10369, 0x0 },
+	{ 0x10469, 0x0 },
+	{ 0x10569, 0x0 },
+	{ 0x10669, 0x0 },
+	{ 0x10769, 0x0 },
+	{ 0x10869, 0x0 },
+	{ 0x11069, 0x0 },
+	{ 0x11169, 0x0 },
+	{ 0x11269, 0x0 },
+	{ 0x11369, 0x0 },
+	{ 0x11469, 0x0 },
+	{ 0x11569, 0x0 },
+	{ 0x11669, 0x0 },
+	{ 0x11769, 0x0 },
+	{ 0x11869, 0x0 },
+	{ 0x12069, 0x0 },
+	{ 0x12169, 0x0 },
+	{ 0x12269, 0x0 },
+	{ 0x12369, 0x0 },
+	{ 0x12469, 0x0 },
+	{ 0x12569, 0x0 },
+	{ 0x12669, 0x0 },
+	{ 0x12769, 0x0 },
+	{ 0x12869, 0x0 },
+	{ 0x13069, 0x0 },
+	{ 0x13169, 0x0 },
+	{ 0x13269, 0x0 },
+	{ 0x13369, 0x0 },
+	{ 0x13469, 0x0 },
+	{ 0x13569, 0x0 },
+	{ 0x13669, 0x0 },
+	{ 0x13769, 0x0 },
+	{ 0x13869, 0x0 },
+	{ 0x1008c, 0x0 },
+	{ 0x11008c, 0x0 },
+	{ 0x21008c, 0x0 },
+	{ 0x1018c, 0x0 },
+	{ 0x11018c, 0x0 },
+	{ 0x21018c, 0x0 },
+	{ 0x1108c, 0x0 },
+	{ 0x11108c, 0x0 },
+	{ 0x21108c, 0x0 },
+	{ 0x1118c, 0x0 },
+	{ 0x11118c, 0x0 },
+	{ 0x21118c, 0x0 },
+	{ 0x1208c, 0x0 },
+	{ 0x11208c, 0x0 },
+	{ 0x21208c, 0x0 },
+	{ 0x1218c, 0x0 },
+	{ 0x11218c, 0x0 },
+	{ 0x21218c, 0x0 },
+	{ 0x1308c, 0x0 },
+	{ 0x11308c, 0x0 },
+	{ 0x21308c, 0x0 },
+	{ 0x1318c, 0x0 },
+	{ 0x11318c, 0x0 },
+	{ 0x21318c, 0x0 },
+	{ 0x1008d, 0x0 },
+	{ 0x11008d, 0x0 },
+	{ 0x21008d, 0x0 },
+	{ 0x1018d, 0x0 },
+	{ 0x11018d, 0x0 },
+	{ 0x21018d, 0x0 },
+	{ 0x1108d, 0x0 },
+	{ 0x11108d, 0x0 },
+	{ 0x21108d, 0x0 },
+	{ 0x1118d, 0x0 },
+	{ 0x11118d, 0x0 },
+	{ 0x21118d, 0x0 },
+	{ 0x1208d, 0x0 },
+	{ 0x11208d, 0x0 },
+	{ 0x21208d, 0x0 },
+	{ 0x1218d, 0x0 },
+	{ 0x11218d, 0x0 },
+	{ 0x21218d, 0x0 },
+	{ 0x1308d, 0x0 },
+	{ 0x11308d, 0x0 },
+	{ 0x21308d, 0x0 },
+	{ 0x1318d, 0x0 },
+	{ 0x11318d, 0x0 },
+	{ 0x21318d, 0x0 },
+	{ 0x100c0, 0x0 },
+	{ 0x1100c0, 0x0 },
+	{ 0x2100c0, 0x0 },
+	{ 0x101c0, 0x0 },
+	{ 0x1101c0, 0x0 },
+	{ 0x2101c0, 0x0 },
+	{ 0x102c0, 0x0 },
+	{ 0x1102c0, 0x0 },
+	{ 0x2102c0, 0x0 },
+	{ 0x103c0, 0x0 },
+	{ 0x1103c0, 0x0 },
+	{ 0x2103c0, 0x0 },
+	{ 0x104c0, 0x0 },
+	{ 0x1104c0, 0x0 },
+	{ 0x2104c0, 0x0 },
+	{ 0x105c0, 0x0 },
+	{ 0x1105c0, 0x0 },
+	{ 0x2105c0, 0x0 },
+	{ 0x106c0, 0x0 },
+	{ 0x1106c0, 0x0 },
+	{ 0x2106c0, 0x0 },
+	{ 0x107c0, 0x0 },
+	{ 0x1107c0, 0x0 },
+	{ 0x2107c0, 0x0 },
+	{ 0x108c0, 0x0 },
+	{ 0x1108c0, 0x0 },
+	{ 0x2108c0, 0x0 },
+	{ 0x110c0, 0x0 },
+	{ 0x1110c0, 0x0 },
+	{ 0x2110c0, 0x0 },
+	{ 0x111c0, 0x0 },
+	{ 0x1111c0, 0x0 },
+	{ 0x2111c0, 0x0 },
+	{ 0x112c0, 0x0 },
+	{ 0x1112c0, 0x0 },
+	{ 0x2112c0, 0x0 },
+	{ 0x113c0, 0x0 },
+	{ 0x1113c0, 0x0 },
+	{ 0x2113c0, 0x0 },
+	{ 0x114c0, 0x0 },
+	{ 0x1114c0, 0x0 },
+	{ 0x2114c0, 0x0 },
+	{ 0x115c0, 0x0 },
+	{ 0x1115c0, 0x0 },
+	{ 0x2115c0, 0x0 },
+	{ 0x116c0, 0x0 },
+	{ 0x1116c0, 0x0 },
+	{ 0x2116c0, 0x0 },
+	{ 0x117c0, 0x0 },
+	{ 0x1117c0, 0x0 },
+	{ 0x2117c0, 0x0 },
+	{ 0x118c0, 0x0 },
+	{ 0x1118c0, 0x0 },
+	{ 0x2118c0, 0x0 },
+	{ 0x120c0, 0x0 },
+	{ 0x1120c0, 0x0 },
+	{ 0x2120c0, 0x0 },
+	{ 0x121c0, 0x0 },
+	{ 0x1121c0, 0x0 },
+	{ 0x2121c0, 0x0 },
+	{ 0x122c0, 0x0 },
+	{ 0x1122c0, 0x0 },
+	{ 0x2122c0, 0x0 },
+	{ 0x123c0, 0x0 },
+	{ 0x1123c0, 0x0 },
+	{ 0x2123c0, 0x0 },
+	{ 0x124c0, 0x0 },
+	{ 0x1124c0, 0x0 },
+	{ 0x2124c0, 0x0 },
+	{ 0x125c0, 0x0 },
+	{ 0x1125c0, 0x0 },
+	{ 0x2125c0, 0x0 },
+	{ 0x126c0, 0x0 },
+	{ 0x1126c0, 0x0 },
+	{ 0x2126c0, 0x0 },
+	{ 0x127c0, 0x0 },
+	{ 0x1127c0, 0x0 },
+	{ 0x2127c0, 0x0 },
+	{ 0x128c0, 0x0 },
+	{ 0x1128c0, 0x0 },
+	{ 0x2128c0, 0x0 },
+	{ 0x130c0, 0x0 },
+	{ 0x1130c0, 0x0 },
+	{ 0x2130c0, 0x0 },
+	{ 0x131c0, 0x0 },
+	{ 0x1131c0, 0x0 },
+	{ 0x2131c0, 0x0 },
+	{ 0x132c0, 0x0 },
+	{ 0x1132c0, 0x0 },
+	{ 0x2132c0, 0x0 },
+	{ 0x133c0, 0x0 },
+	{ 0x1133c0, 0x0 },
+	{ 0x2133c0, 0x0 },
+	{ 0x134c0, 0x0 },
+	{ 0x1134c0, 0x0 },
+	{ 0x2134c0, 0x0 },
+	{ 0x135c0, 0x0 },
+	{ 0x1135c0, 0x0 },
+	{ 0x2135c0, 0x0 },
+	{ 0x136c0, 0x0 },
+	{ 0x1136c0, 0x0 },
+	{ 0x2136c0, 0x0 },
+	{ 0x137c0, 0x0 },
+	{ 0x1137c0, 0x0 },
+	{ 0x2137c0, 0x0 },
+	{ 0x138c0, 0x0 },
+	{ 0x1138c0, 0x0 },
+	{ 0x2138c0, 0x0 },
+	{ 0x100c1, 0x0 },
+	{ 0x1100c1, 0x0 },
+	{ 0x2100c1, 0x0 },
+	{ 0x101c1, 0x0 },
+	{ 0x1101c1, 0x0 },
+	{ 0x2101c1, 0x0 },
+	{ 0x102c1, 0x0 },
+	{ 0x1102c1, 0x0 },
+	{ 0x2102c1, 0x0 },
+	{ 0x103c1, 0x0 },
+	{ 0x1103c1, 0x0 },
+	{ 0x2103c1, 0x0 },
+	{ 0x104c1, 0x0 },
+	{ 0x1104c1, 0x0 },
+	{ 0x2104c1, 0x0 },
+	{ 0x105c1, 0x0 },
+	{ 0x1105c1, 0x0 },
+	{ 0x2105c1, 0x0 },
+	{ 0x106c1, 0x0 },
+	{ 0x1106c1, 0x0 },
+	{ 0x2106c1, 0x0 },
+	{ 0x107c1, 0x0 },
+	{ 0x1107c1, 0x0 },
+	{ 0x2107c1, 0x0 },
+	{ 0x108c1, 0x0 },
+	{ 0x1108c1, 0x0 },
+	{ 0x2108c1, 0x0 },
+	{ 0x110c1, 0x0 },
+	{ 0x1110c1, 0x0 },
+	{ 0x2110c1, 0x0 },
+	{ 0x111c1, 0x0 },
+	{ 0x1111c1, 0x0 },
+	{ 0x2111c1, 0x0 },
+	{ 0x112c1, 0x0 },
+	{ 0x1112c1, 0x0 },
+	{ 0x2112c1, 0x0 },
+	{ 0x113c1, 0x0 },
+	{ 0x1113c1, 0x0 },
+	{ 0x2113c1, 0x0 },
+	{ 0x114c1, 0x0 },
+	{ 0x1114c1, 0x0 },
+	{ 0x2114c1, 0x0 },
+	{ 0x115c1, 0x0 },
+	{ 0x1115c1, 0x0 },
+	{ 0x2115c1, 0x0 },
+	{ 0x116c1, 0x0 },
+	{ 0x1116c1, 0x0 },
+	{ 0x2116c1, 0x0 },
+	{ 0x117c1, 0x0 },
+	{ 0x1117c1, 0x0 },
+	{ 0x2117c1, 0x0 },
+	{ 0x118c1, 0x0 },
+	{ 0x1118c1, 0x0 },
+	{ 0x2118c1, 0x0 },
+	{ 0x120c1, 0x0 },
+	{ 0x1120c1, 0x0 },
+	{ 0x2120c1, 0x0 },
+	{ 0x121c1, 0x0 },
+	{ 0x1121c1, 0x0 },
+	{ 0x2121c1, 0x0 },
+	{ 0x122c1, 0x0 },
+	{ 0x1122c1, 0x0 },
+	{ 0x2122c1, 0x0 },
+	{ 0x123c1, 0x0 },
+	{ 0x1123c1, 0x0 },
+	{ 0x2123c1, 0x0 },
+	{ 0x124c1, 0x0 },
+	{ 0x1124c1, 0x0 },
+	{ 0x2124c1, 0x0 },
+	{ 0x125c1, 0x0 },
+	{ 0x1125c1, 0x0 },
+	{ 0x2125c1, 0x0 },
+	{ 0x126c1, 0x0 },
+	{ 0x1126c1, 0x0 },
+	{ 0x2126c1, 0x0 },
+	{ 0x127c1, 0x0 },
+	{ 0x1127c1, 0x0 },
+	{ 0x2127c1, 0x0 },
+	{ 0x128c1, 0x0 },
+	{ 0x1128c1, 0x0 },
+	{ 0x2128c1, 0x0 },
+	{ 0x130c1, 0x0 },
+	{ 0x1130c1, 0x0 },
+	{ 0x2130c1, 0x0 },
+	{ 0x131c1, 0x0 },
+	{ 0x1131c1, 0x0 },
+	{ 0x2131c1, 0x0 },
+	{ 0x132c1, 0x0 },
+	{ 0x1132c1, 0x0 },
+	{ 0x2132c1, 0x0 },
+	{ 0x133c1, 0x0 },
+	{ 0x1133c1, 0x0 },
+	{ 0x2133c1, 0x0 },
+	{ 0x134c1, 0x0 },
+	{ 0x1134c1, 0x0 },
+	{ 0x2134c1, 0x0 },
+	{ 0x135c1, 0x0 },
+	{ 0x1135c1, 0x0 },
+	{ 0x2135c1, 0x0 },
+	{ 0x136c1, 0x0 },
+	{ 0x1136c1, 0x0 },
+	{ 0x2136c1, 0x0 },
+	{ 0x137c1, 0x0 },
+	{ 0x1137c1, 0x0 },
+	{ 0x2137c1, 0x0 },
+	{ 0x138c1, 0x0 },
+	{ 0x1138c1, 0x0 },
+	{ 0x2138c1, 0x0 },
+	{ 0x10020, 0x0 },
+	{ 0x110020, 0x0 },
+	{ 0x210020, 0x0 },
+	{ 0x11020, 0x0 },
+	{ 0x111020, 0x0 },
+	{ 0x211020, 0x0 },
+	{ 0x12020, 0x0 },
+	{ 0x112020, 0x0 },
+	{ 0x212020, 0x0 },
+	{ 0x13020, 0x0 },
+	{ 0x113020, 0x0 },
+	{ 0x213020, 0x0 },
+	{ 0x20072, 0x0 },
+	{ 0x20073, 0x0 },
+	{ 0x20074, 0x0 },
+	{ 0x100aa, 0x0 },
+	{ 0x110aa, 0x0 },
+	{ 0x120aa, 0x0 },
+	{ 0x130aa, 0x0 },
+	{ 0x20010, 0x0 },
+	{ 0x120010, 0x0 },
+	{ 0x220010, 0x0 },
+	{ 0x20011, 0x0 },
+	{ 0x120011, 0x0 },
+	{ 0x220011, 0x0 },
+	{ 0x100ae, 0x0 },
+	{ 0x1100ae, 0x0 },
+	{ 0x2100ae, 0x0 },
+	{ 0x100af, 0x0 },
+	{ 0x1100af, 0x0 },
+	{ 0x2100af, 0x0 },
+	{ 0x110ae, 0x0 },
+	{ 0x1110ae, 0x0 },
+	{ 0x2110ae, 0x0 },
+	{ 0x110af, 0x0 },
+	{ 0x1110af, 0x0 },
+	{ 0x2110af, 0x0 },
+	{ 0x120ae, 0x0 },
+	{ 0x1120ae, 0x0 },
+	{ 0x2120ae, 0x0 },
+	{ 0x120af, 0x0 },
+	{ 0x1120af, 0x0 },
+	{ 0x2120af, 0x0 },
+	{ 0x130ae, 0x0 },
+	{ 0x1130ae, 0x0 },
+	{ 0x2130ae, 0x0 },
+	{ 0x130af, 0x0 },
+	{ 0x1130af, 0x0 },
+	{ 0x2130af, 0x0 },
+	{ 0x20020, 0x0 },
+	{ 0x120020, 0x0 },
+	{ 0x220020, 0x0 },
+	{ 0x100a0, 0x0 },
+	{ 0x100a1, 0x0 },
+	{ 0x100a2, 0x0 },
+	{ 0x100a3, 0x0 },
+	{ 0x100a4, 0x0 },
+	{ 0x100a5, 0x0 },
+	{ 0x100a6, 0x0 },
+	{ 0x100a7, 0x0 },
+	{ 0x110a0, 0x0 },
+	{ 0x110a1, 0x0 },
+	{ 0x110a2, 0x0 },
+	{ 0x110a3, 0x0 },
+	{ 0x110a4, 0x0 },
+	{ 0x110a5, 0x0 },
+	{ 0x110a6, 0x0 },
+	{ 0x110a7, 0x0 },
+	{ 0x120a0, 0x0 },
+	{ 0x120a1, 0x0 },
+	{ 0x120a2, 0x0 },
+	{ 0x120a3, 0x0 },
+	{ 0x120a4, 0x0 },
+	{ 0x120a5, 0x0 },
+	{ 0x120a6, 0x0 },
+	{ 0x120a7, 0x0 },
+	{ 0x130a0, 0x0 },
+	{ 0x130a1, 0x0 },
+	{ 0x130a2, 0x0 },
+	{ 0x130a3, 0x0 },
+	{ 0x130a4, 0x0 },
+	{ 0x130a5, 0x0 },
+	{ 0x130a6, 0x0 },
+	{ 0x130a7, 0x0 },
+	{ 0x2007c, 0x0 },
+	{ 0x12007c, 0x0 },
+	{ 0x22007c, 0x0 },
+	{ 0x2007d, 0x0 },
+	{ 0x12007d, 0x0 },
+	{ 0x22007d, 0x0 },
+	{ 0x400fd, 0x0 },
+	{ 0x400c0, 0x0 },
+	{ 0x90201, 0x0 },
+	{ 0x190201, 0x0 },
+	{ 0x290201, 0x0 },
+	{ 0x90202, 0x0 },
+	{ 0x190202, 0x0 },
+	{ 0x290202, 0x0 },
+	{ 0x90203, 0x0 },
+	{ 0x190203, 0x0 },
+	{ 0x290203, 0x0 },
+	{ 0x90204, 0x0 },
+	{ 0x190204, 0x0 },
+	{ 0x290204, 0x0 },
+	{ 0x90205, 0x0 },
+	{ 0x190205, 0x0 },
+	{ 0x290205, 0x0 },
+	{ 0x90206, 0x0 },
+	{ 0x190206, 0x0 },
+	{ 0x290206, 0x0 },
+	{ 0x90207, 0x0 },
+	{ 0x190207, 0x0 },
+	{ 0x290207, 0x0 },
+	{ 0x90208, 0x0 },
+	{ 0x190208, 0x0 },
+	{ 0x290208, 0x0 },
+	{ 0x10062, 0x0 },
+	{ 0x10162, 0x0 },
+	{ 0x10262, 0x0 },
+	{ 0x10362, 0x0 },
+	{ 0x10462, 0x0 },
+	{ 0x10562, 0x0 },
+	{ 0x10662, 0x0 },
+	{ 0x10762, 0x0 },
+	{ 0x10862, 0x0 },
+	{ 0x11062, 0x0 },
+	{ 0x11162, 0x0 },
+	{ 0x11262, 0x0 },
+	{ 0x11362, 0x0 },
+	{ 0x11462, 0x0 },
+	{ 0x11562, 0x0 },
+	{ 0x11662, 0x0 },
+	{ 0x11762, 0x0 },
+	{ 0x11862, 0x0 },
+	{ 0x12062, 0x0 },
+	{ 0x12162, 0x0 },
+	{ 0x12262, 0x0 },
+	{ 0x12362, 0x0 },
+	{ 0x12462, 0x0 },
+	{ 0x12562, 0x0 },
+	{ 0x12662, 0x0 },
+	{ 0x12762, 0x0 },
+	{ 0x12862, 0x0 },
+	{ 0x13062, 0x0 },
+	{ 0x13162, 0x0 },
+	{ 0x13262, 0x0 },
+	{ 0x13362, 0x0 },
+	{ 0x13462, 0x0 },
+	{ 0x13562, 0x0 },
+	{ 0x13662, 0x0 },
+	{ 0x13762, 0x0 },
+	{ 0x13862, 0x0 },
+	{ 0x20077, 0x0 },
+	{ 0x10001, 0x0 },
+	{ 0x11001, 0x0 },
+	{ 0x12001, 0x0 },
+	{ 0x13001, 0x0 },
+	{ 0x10040, 0x0 },
+	{ 0x10140, 0x0 },
+	{ 0x10240, 0x0 },
+	{ 0x10340, 0x0 },
+	{ 0x10440, 0x0 },
+	{ 0x10540, 0x0 },
+	{ 0x10640, 0x0 },
+	{ 0x10740, 0x0 },
+	{ 0x10840, 0x0 },
+	{ 0x10030, 0x0 },
+	{ 0x10130, 0x0 },
+	{ 0x10230, 0x0 },
+	{ 0x10330, 0x0 },
+	{ 0x10430, 0x0 },
+	{ 0x10530, 0x0 },
+	{ 0x10630, 0x0 },
+	{ 0x10730, 0x0 },
+	{ 0x10830, 0x0 },
+	{ 0x11040, 0x0 },
+	{ 0x11140, 0x0 },
+	{ 0x11240, 0x0 },
+	{ 0x11340, 0x0 },
+	{ 0x11440, 0x0 },
+	{ 0x11540, 0x0 },
+	{ 0x11640, 0x0 },
+	{ 0x11740, 0x0 },
+	{ 0x11840, 0x0 },
+	{ 0x11030, 0x0 },
+	{ 0x11130, 0x0 },
+	{ 0x11230, 0x0 },
+	{ 0x11330, 0x0 },
+	{ 0x11430, 0x0 },
+	{ 0x11530, 0x0 },
+	{ 0x11630, 0x0 },
+	{ 0x11730, 0x0 },
+	{ 0x11830, 0x0 },
+	{ 0x12040, 0x0 },
+	{ 0x12140, 0x0 },
+	{ 0x12240, 0x0 },
+	{ 0x12340, 0x0 },
+	{ 0x12440, 0x0 },
+	{ 0x12540, 0x0 },
+	{ 0x12640, 0x0 },
+	{ 0x12740, 0x0 },
+	{ 0x12840, 0x0 },
+	{ 0x12030, 0x0 },
+	{ 0x12130, 0x0 },
+	{ 0x12230, 0x0 },
+	{ 0x12330, 0x0 },
+	{ 0x12430, 0x0 },
+	{ 0x12530, 0x0 },
+	{ 0x12630, 0x0 },
+	{ 0x12730, 0x0 },
+	{ 0x12830, 0x0 },
+	{ 0x13040, 0x0 },
+	{ 0x13140, 0x0 },
+	{ 0x13240, 0x0 },
+	{ 0x13340, 0x0 },
+	{ 0x13440, 0x0 },
+	{ 0x13540, 0x0 },
+	{ 0x13640, 0x0 },
+	{ 0x13740, 0x0 },
+	{ 0x13840, 0x0 },
+	{ 0x13030, 0x0 },
+	{ 0x13130, 0x0 },
+	{ 0x13230, 0x0 },
+	{ 0x13330, 0x0 },
+	{ 0x13430, 0x0 },
+	{ 0x13530, 0x0 },
+	{ 0x13630, 0x0 },
+	{ 0x13730, 0x0 },
+	{ 0x13830, 0x0 },
+};
+
+/* DRAM PHY init engine image */
+static struct dram_cfg_param ddr_phy_pie[] = {
+	{ 0xd0000, 0x0 },
+	{ 0x90000, 0x10 },
+	{ 0x90001, 0x400 },
+	{ 0x90002, 0x10e },
+	{ 0x90003, 0x0 },
+	{ 0x90004, 0x0 },
+	{ 0x90005, 0x8 },
+	{ 0x90029, 0xb },
+	{ 0x9002a, 0x480 },
+	{ 0x9002b, 0x109 },
+	{ 0x9002c, 0x8 },
+	{ 0x9002d, 0x448 },
+	{ 0x9002e, 0x139 },
+	{ 0x9002f, 0x8 },
+	{ 0x90030, 0x478 },
+	{ 0x90031, 0x109 },
+	{ 0x90032, 0x0 },
+	{ 0x90033, 0xe8 },
+	{ 0x90034, 0x109 },
+	{ 0x90035, 0x2 },
+	{ 0x90036, 0x10 },
+	{ 0x90037, 0x139 },
+	{ 0x90038, 0xb },
+	{ 0x90039, 0x7c0 },
+	{ 0x9003a, 0x139 },
+	{ 0x9003b, 0x44 },
+	{ 0x9003c, 0x633 },
+	{ 0x9003d, 0x159 },
+	{ 0x9003e, 0x14f },
+	{ 0x9003f, 0x630 },
+	{ 0x90040, 0x159 },
+	{ 0x90041, 0x47 },
+	{ 0x90042, 0x633 },
+	{ 0x90043, 0x149 },
+	{ 0x90044, 0x4f },
+	{ 0x90045, 0x633 },
+	{ 0x90046, 0x179 },
+	{ 0x90047, 0x8 },
+	{ 0x90048, 0xe0 },
+	{ 0x90049, 0x109 },
+	{ 0x9004a, 0x0 },
+	{ 0x9004b, 0x7c8 },
+	{ 0x9004c, 0x109 },
+	{ 0x9004d, 0x0 },
+	{ 0x9004e, 0x1 },
+	{ 0x9004f, 0x8 },
+	{ 0x90050, 0x0 },
+	{ 0x90051, 0x45a },
+	{ 0x90052, 0x9 },
+	{ 0x90053, 0x0 },
+	{ 0x90054, 0x448 },
+	{ 0x90055, 0x109 },
+	{ 0x90056, 0x40 },
+	{ 0x90057, 0x633 },
+	{ 0x90058, 0x179 },
+	{ 0x90059, 0x1 },
+	{ 0x9005a, 0x618 },
+	{ 0x9005b, 0x109 },
+	{ 0x9005c, 0x40c0 },
+	{ 0x9005d, 0x633 },
+	{ 0x9005e, 0x149 },
+	{ 0x9005f, 0x8 },
+	{ 0x90060, 0x4 },
+	{ 0x90061, 0x48 },
+	{ 0x90062, 0x4040 },
+	{ 0x90063, 0x633 },
+	{ 0x90064, 0x149 },
+	{ 0x90065, 0x0 },
+	{ 0x90066, 0x4 },
+	{ 0x90067, 0x48 },
+	{ 0x90068, 0x40 },
+	{ 0x90069, 0x633 },
+	{ 0x9006a, 0x149 },
+	{ 0x9006b, 0x10 },
+	{ 0x9006c, 0x4 },
+	{ 0x9006d, 0x18 },
+	{ 0x9006e, 0x0 },
+	{ 0x9006f, 0x4 },
+	{ 0x90070, 0x78 },
+	{ 0x90071, 0x549 },
+	{ 0x90072, 0x633 },
+	{ 0x90073, 0x159 },
+	{ 0x90074, 0xd49 },
+	{ 0x90075, 0x633 },
+	{ 0x90076, 0x159 },
+	{ 0x90077, 0x94a },
+	{ 0x90078, 0x633 },
+	{ 0x90079, 0x159 },
+	{ 0x9007a, 0x441 },
+	{ 0x9007b, 0x633 },
+	{ 0x9007c, 0x149 },
+	{ 0x9007d, 0x42 },
+	{ 0x9007e, 0x633 },
+	{ 0x9007f, 0x149 },
+	{ 0x90080, 0x1 },
+	{ 0x90081, 0x633 },
+	{ 0x90082, 0x149 },
+	{ 0x90083, 0x0 },
+	{ 0x90084, 0xe0 },
+	{ 0x90085, 0x109 },
+	{ 0x90086, 0xa },
+	{ 0x90087, 0x10 },
+	{ 0x90088, 0x109 },
+	{ 0x90089, 0x9 },
+	{ 0x9008a, 0x3c0 },
+	{ 0x9008b, 0x149 },
+	{ 0x9008c, 0x9 },
+	{ 0x9008d, 0x3c0 },
+	{ 0x9008e, 0x159 },
+	{ 0x9008f, 0x18 },
+	{ 0x90090, 0x10 },
+	{ 0x90091, 0x109 },
+	{ 0x90092, 0x0 },
+	{ 0x90093, 0x3c0 },
+	{ 0x90094, 0x109 },
+	{ 0x90095, 0x18 },
+	{ 0x90096, 0x4 },
+	{ 0x90097, 0x48 },
+	{ 0x90098, 0x18 },
+	{ 0x90099, 0x4 },
+	{ 0x9009a, 0x58 },
+	{ 0x9009b, 0xb },
+	{ 0x9009c, 0x10 },
+	{ 0x9009d, 0x109 },
+	{ 0x9009e, 0x1 },
+	{ 0x9009f, 0x10 },
+	{ 0x900a0, 0x109 },
+	{ 0x900a1, 0x5 },
+	{ 0x900a2, 0x7c0 },
+	{ 0x900a3, 0x109 },
+	{ 0x40000, 0x811 },
+	{ 0x40020, 0x880 },
+	{ 0x40040, 0x0 },
+	{ 0x40060, 0x0 },
+	{ 0x40001, 0x4008 },
+	{ 0x40021, 0x83 },
+	{ 0x40041, 0x4f },
+	{ 0x40061, 0x0 },
+	{ 0x40002, 0x4040 },
+	{ 0x40022, 0x83 },
+	{ 0x40042, 0x51 },
+	{ 0x40062, 0x0 },
+	{ 0x40003, 0x811 },
+	{ 0x40023, 0x880 },
+	{ 0x40043, 0x0 },
+	{ 0x40063, 0x0 },
+	{ 0x40004, 0x720 },
+	{ 0x40024, 0xf },
+	{ 0x40044, 0x1740 },
+	{ 0x40064, 0x0 },
+	{ 0x40005, 0x16 },
+	{ 0x40025, 0x83 },
+	{ 0x40045, 0x4b },
+	{ 0x40065, 0x0 },
+	{ 0x40006, 0x716 },
+	{ 0x40026, 0xf },
+	{ 0x40046, 0x2001 },
+	{ 0x40066, 0x0 },
+	{ 0x40007, 0x716 },
+	{ 0x40027, 0xf },
+	{ 0x40047, 0x2800 },
+	{ 0x40067, 0x0 },
+	{ 0x40008, 0x716 },
+	{ 0x40028, 0xf },
+	{ 0x40048, 0xf00 },
+	{ 0x40068, 0x0 },
+	{ 0x40009, 0x720 },
+	{ 0x40029, 0xf },
+	{ 0x40049, 0x1400 },
+	{ 0x40069, 0x0 },
+	{ 0x4000a, 0xe08 },
+	{ 0x4002a, 0xc15 },
+	{ 0x4004a, 0x0 },
+	{ 0x4006a, 0x0 },
+	{ 0x4000b, 0x625 },
+	{ 0x4002b, 0x15 },
+	{ 0x4004b, 0x0 },
+	{ 0x4006b, 0x0 },
+	{ 0x4000c, 0x4028 },
+	{ 0x4002c, 0x80 },
+	{ 0x4004c, 0x0 },
+	{ 0x4006c, 0x0 },
+	{ 0x4000d, 0xe08 },
+	{ 0x4002d, 0xc1a },
+	{ 0x4004d, 0x0 },
+	{ 0x4006d, 0x0 },
+	{ 0x4000e, 0x625 },
+	{ 0x4002e, 0x1a },
+	{ 0x4004e, 0x0 },
+	{ 0x4006e, 0x0 },
+	{ 0x4000f, 0x4040 },
+	{ 0x4002f, 0x80 },
+	{ 0x4004f, 0x0 },
+	{ 0x4006f, 0x0 },
+	{ 0x40010, 0x2604 },
+	{ 0x40030, 0x15 },
+	{ 0x40050, 0x0 },
+	{ 0x40070, 0x0 },
+	{ 0x40011, 0x708 },
+	{ 0x40031, 0x5 },
+	{ 0x40051, 0x0 },
+	{ 0x40071, 0x2002 },
+	{ 0x40012, 0x8 },
+	{ 0x40032, 0x80 },
+	{ 0x40052, 0x0 },
+	{ 0x40072, 0x0 },
+	{ 0x40013, 0x2604 },
+	{ 0x40033, 0x1a },
+	{ 0x40053, 0x0 },
+	{ 0x40073, 0x0 },
+	{ 0x40014, 0x708 },
+	{ 0x40034, 0xa },
+	{ 0x40054, 0x0 },
+	{ 0x40074, 0x2002 },
+	{ 0x40015, 0x4040 },
+	{ 0x40035, 0x80 },
+	{ 0x40055, 0x0 },
+	{ 0x40075, 0x0 },
+	{ 0x40016, 0x60a },
+	{ 0x40036, 0x15 },
+	{ 0x40056, 0x1200 },
+	{ 0x40076, 0x0 },
+	{ 0x40017, 0x61a },
+	{ 0x40037, 0x15 },
+	{ 0x40057, 0x1300 },
+	{ 0x40077, 0x0 },
+	{ 0x40018, 0x60a },
+	{ 0x40038, 0x1a },
+	{ 0x40058, 0x1200 },
+	{ 0x40078, 0x0 },
+	{ 0x40019, 0x642 },
+	{ 0x40039, 0x1a },
+	{ 0x40059, 0x1300 },
+	{ 0x40079, 0x0 },
+	{ 0x4001a, 0x4808 },
+	{ 0x4003a, 0x880 },
+	{ 0x4005a, 0x0 },
+	{ 0x4007a, 0x0 },
+	{ 0x900a4, 0x0 },
+	{ 0x900a5, 0x790 },
+	{ 0x900a6, 0x11a },
+	{ 0x900a7, 0x8 },
+	{ 0x900a8, 0x7aa },
+	{ 0x900a9, 0x2a },
+	{ 0x900aa, 0x10 },
+	{ 0x900ab, 0x7b2 },
+	{ 0x900ac, 0x2a },
+	{ 0x900ad, 0x0 },
+	{ 0x900ae, 0x7c8 },
+	{ 0x900af, 0x109 },
+	{ 0x900b0, 0x10 },
+	{ 0x900b1, 0x10 },
+	{ 0x900b2, 0x109 },
+	{ 0x900b3, 0x10 },
+	{ 0x900b4, 0x2a8 },
+	{ 0x900b5, 0x129 },
+	{ 0x900b6, 0x8 },
+	{ 0x900b7, 0x370 },
+	{ 0x900b8, 0x129 },
+	{ 0x900b9, 0xa },
+	{ 0x900ba, 0x3c8 },
+	{ 0x900bb, 0x1a9 },
+	{ 0x900bc, 0xc },
+	{ 0x900bd, 0x408 },
+	{ 0x900be, 0x199 },
+	{ 0x900bf, 0x14 },
+	{ 0x900c0, 0x790 },
+	{ 0x900c1, 0x11a },
+	{ 0x900c2, 0x8 },
+	{ 0x900c3, 0x4 },
+	{ 0x900c4, 0x18 },
+	{ 0x900c5, 0xe },
+	{ 0x900c6, 0x408 },
+	{ 0x900c7, 0x199 },
+	{ 0x900c8, 0x8 },
+	{ 0x900c9, 0x8568 },
+	{ 0x900ca, 0x108 },
+	{ 0x900cb, 0x18 },
+	{ 0x900cc, 0x790 },
+	{ 0x900cd, 0x16a },
+	{ 0x900ce, 0x8 },
+	{ 0x900cf, 0x1d8 },
+	{ 0x900d0, 0x169 },
+	{ 0x900d1, 0x10 },
+	{ 0x900d2, 0x8558 },
+	{ 0x900d3, 0x168 },
+	{ 0x900d4, 0x70 },
+	{ 0x900d5, 0x788 },
+	{ 0x900d6, 0x16a },
+	{ 0x900d7, 0x1ff8 },
+	{ 0x900d8, 0x85a8 },
+	{ 0x900d9, 0x1e8 },
+	{ 0x900da, 0x50 },
+	{ 0x900db, 0x798 },
+	{ 0x900dc, 0x16a },
+	{ 0x900dd, 0x60 },
+	{ 0x900de, 0x7a0 },
+	{ 0x900df, 0x16a },
+	{ 0x900e0, 0x8 },
+	{ 0x900e1, 0x8310 },
+	{ 0x900e2, 0x168 },
+	{ 0x900e3, 0x8 },
+	{ 0x900e4, 0xa310 },
+	{ 0x900e5, 0x168 },
+	{ 0x900e6, 0xa },
+	{ 0x900e7, 0x408 },
+	{ 0x900e8, 0x169 },
+	{ 0x900e9, 0x6e },
+	{ 0x900ea, 0x0 },
+	{ 0x900eb, 0x68 },
+	{ 0x900ec, 0x0 },
+	{ 0x900ed, 0x408 },
+	{ 0x900ee, 0x169 },
+	{ 0x900ef, 0x0 },
+	{ 0x900f0, 0x8310 },
+	{ 0x900f1, 0x168 },
+	{ 0x900f2, 0x0 },
+	{ 0x900f3, 0xa310 },
+	{ 0x900f4, 0x168 },
+	{ 0x900f5, 0x1ff8 },
+	{ 0x900f6, 0x85a8 },
+	{ 0x900f7, 0x1e8 },
+	{ 0x900f8, 0x68 },
+	{ 0x900f9, 0x798 },
+	{ 0x900fa, 0x16a },
+	{ 0x900fb, 0x78 },
+	{ 0x900fc, 0x7a0 },
+	{ 0x900fd, 0x16a },
+	{ 0x900fe, 0x68 },
+	{ 0x900ff, 0x790 },
+	{ 0x90100, 0x16a },
+	{ 0x90101, 0x8 },
+	{ 0x90102, 0x8b10 },
+	{ 0x90103, 0x168 },
+	{ 0x90104, 0x8 },
+	{ 0x90105, 0xab10 },
+	{ 0x90106, 0x168 },
+	{ 0x90107, 0xa },
+	{ 0x90108, 0x408 },
+	{ 0x90109, 0x169 },
+	{ 0x9010a, 0x58 },
+	{ 0x9010b, 0x0 },
+	{ 0x9010c, 0x68 },
+	{ 0x9010d, 0x0 },
+	{ 0x9010e, 0x408 },
+	{ 0x9010f, 0x169 },
+	{ 0x90110, 0x0 },
+	{ 0x90111, 0x8b10 },
+	{ 0x90112, 0x168 },
+	{ 0x90113, 0x1 },
+	{ 0x90114, 0xab10 },
+	{ 0x90115, 0x168 },
+	{ 0x90116, 0x0 },
+	{ 0x90117, 0x1d8 },
+	{ 0x90118, 0x169 },
+	{ 0x90119, 0x80 },
+	{ 0x9011a, 0x790 },
+	{ 0x9011b, 0x16a },
+	{ 0x9011c, 0x18 },
+	{ 0x9011d, 0x7aa },
+	{ 0x9011e, 0x6a },
+	{ 0x9011f, 0xa },
+	{ 0x90120, 0x0 },
+	{ 0x90121, 0x1e9 },
+	{ 0x90122, 0x8 },
+	{ 0x90123, 0x8080 },
+	{ 0x90124, 0x108 },
+	{ 0x90125, 0xf },
+	{ 0x90126, 0x408 },
+	{ 0x90127, 0x169 },
+	{ 0x90128, 0xc },
+	{ 0x90129, 0x0 },
+	{ 0x9012a, 0x68 },
+	{ 0x9012b, 0x9 },
+	{ 0x9012c, 0x0 },
+	{ 0x9012d, 0x1a9 },
+	{ 0x9012e, 0x0 },
+	{ 0x9012f, 0x408 },
+	{ 0x90130, 0x169 },
+	{ 0x90131, 0x0 },
+	{ 0x90132, 0x8080 },
+	{ 0x90133, 0x108 },
+	{ 0x90134, 0x8 },
+	{ 0x90135, 0x7aa },
+	{ 0x90136, 0x6a },
+	{ 0x90137, 0x0 },
+	{ 0x90138, 0x8568 },
+	{ 0x90139, 0x108 },
+	{ 0x9013a, 0xb7 },
+	{ 0x9013b, 0x790 },
+	{ 0x9013c, 0x16a },
+	{ 0x9013d, 0x1f },
+	{ 0x9013e, 0x0 },
+	{ 0x9013f, 0x68 },
+	{ 0x90140, 0x8 },
+	{ 0x90141, 0x8558 },
+	{ 0x90142, 0x168 },
+	{ 0x90143, 0xf },
+	{ 0x90144, 0x408 },
+	{ 0x90145, 0x169 },
+	{ 0x90146, 0xd },
+	{ 0x90147, 0x0 },
+	{ 0x90148, 0x68 },
+	{ 0x90149, 0x0 },
+	{ 0x9014a, 0x408 },
+	{ 0x9014b, 0x169 },
+	{ 0x9014c, 0x0 },
+	{ 0x9014d, 0x8558 },
+	{ 0x9014e, 0x168 },
+	{ 0x9014f, 0x8 },
+	{ 0x90150, 0x3c8 },
+	{ 0x90151, 0x1a9 },
+	{ 0x90152, 0x3 },
+	{ 0x90153, 0x370 },
+	{ 0x90154, 0x129 },
+	{ 0x90155, 0x20 },
+	{ 0x90156, 0x2aa },
+	{ 0x90157, 0x9 },
+	{ 0x90158, 0x8 },
+	{ 0x90159, 0xe8 },
+	{ 0x9015a, 0x109 },
+	{ 0x9015b, 0x0 },
+	{ 0x9015c, 0x8140 },
+	{ 0x9015d, 0x10c },
+	{ 0x9015e, 0x10 },
+	{ 0x9015f, 0x8138 },
+	{ 0x90160, 0x104 },
+	{ 0x90161, 0x8 },
+	{ 0x90162, 0x448 },
+	{ 0x90163, 0x109 },
+	{ 0x90164, 0xf },
+	{ 0x90165, 0x7c0 },
+	{ 0x90166, 0x109 },
+	{ 0x90167, 0x0 },
+	{ 0x90168, 0xe8 },
+	{ 0x90169, 0x109 },
+	{ 0x9016a, 0x47 },
+	{ 0x9016b, 0x630 },
+	{ 0x9016c, 0x109 },
+	{ 0x9016d, 0x8 },
+	{ 0x9016e, 0x618 },
+	{ 0x9016f, 0x109 },
+	{ 0x90170, 0x8 },
+	{ 0x90171, 0xe0 },
+	{ 0x90172, 0x109 },
+	{ 0x90173, 0x0 },
+	{ 0x90174, 0x7c8 },
+	{ 0x90175, 0x109 },
+	{ 0x90176, 0x8 },
+	{ 0x90177, 0x8140 },
+	{ 0x90178, 0x10c },
+	{ 0x90179, 0x0 },
+	{ 0x9017a, 0x478 },
+	{ 0x9017b, 0x109 },
+	{ 0x9017c, 0x0 },
+	{ 0x9017d, 0x1 },
+	{ 0x9017e, 0x8 },
+	{ 0x9017f, 0x8 },
+	{ 0x90180, 0x4 },
+	{ 0x90181, 0x0 },
+	{ 0x90006, 0x8 },
+	{ 0x90007, 0x7c8 },
+	{ 0x90008, 0x109 },
+	{ 0x90009, 0x0 },
+	{ 0x9000a, 0x400 },
+	{ 0x9000b, 0x106 },
+	{ 0xd00e7, 0x400 },
+	{ 0x90017, 0x0 },
+	{ 0x9001f, 0x29 },
+	{ 0x90026, 0x68 },
+	{ 0x400d0, 0x0 },
+	{ 0x400d1, 0x101 },
+	{ 0x400d2, 0x105 },
+	{ 0x400d3, 0x107 },
+	{ 0x400d4, 0x10f },
+	{ 0x400d5, 0x202 },
+	{ 0x400d6, 0x20a },
+	{ 0x400d7, 0x20b },
+	{ 0x2003a, 0x2 },
+	{ 0x200be, 0x3 },
+	{ 0x2000b, 0x34b },
+	{ 0x2000c, 0xbb },
+	{ 0x2000d, 0x753 },
+	{ 0x2000e, 0x2c },
+	{ 0x12000b, 0x70 },
+	{ 0x12000c, 0x19 },
+	{ 0x12000d, 0xfa },
+	{ 0x12000e, 0x10 },
+	{ 0x22000b, 0x1c },
+	{ 0x22000c, 0x6 },
+	{ 0x22000d, 0x3e },
+	{ 0x22000e, 0x10 },
+	{ 0x9000c, 0x0 },
+	{ 0x9000d, 0x173 },
+	{ 0x9000e, 0x60 },
+	{ 0x9000f, 0x6110 },
+	{ 0x90010, 0x2152 },
+	{ 0x90011, 0xdfbd },
+	{ 0x90012, 0x2060 },
+	{ 0x90013, 0x6152 },
+	{ 0x20010, 0x5a },
+	{ 0x20011, 0x3 },
+	{ 0x40080, 0xe0 },
+	{ 0x40081, 0x12 },
+	{ 0x40082, 0xe0 },
+	{ 0x40083, 0x12 },
+	{ 0x40084, 0xe0 },
+	{ 0x40085, 0x12 },
+	{ 0x140080, 0xe0 },
+	{ 0x140081, 0x12 },
+	{ 0x140082, 0xe0 },
+	{ 0x140083, 0x12 },
+	{ 0x140084, 0xe0 },
+	{ 0x140085, 0x12 },
+	{ 0x240080, 0xe0 },
+	{ 0x240081, 0x12 },
+	{ 0x240082, 0xe0 },
+	{ 0x240083, 0x12 },
+	{ 0x240084, 0xe0 },
+	{ 0x240085, 0x12 },
+	{ 0x400fd, 0xf },
+	{ 0x10011, 0x1 },
+	{ 0x10012, 0x1 },
+	{ 0x10013, 0x180 },
+	{ 0x10018, 0x1 },
+	{ 0x10002, 0x6209 },
+	{ 0x100b2, 0x1 },
+	{ 0x101b4, 0x1 },
+	{ 0x102b4, 0x1 },
+	{ 0x103b4, 0x1 },
+	{ 0x104b4, 0x1 },
+	{ 0x105b4, 0x1 },
+	{ 0x106b4, 0x1 },
+	{ 0x107b4, 0x1 },
+	{ 0x108b4, 0x1 },
+	{ 0x11011, 0x1 },
+	{ 0x11012, 0x1 },
+	{ 0x11013, 0x180 },
+	{ 0x11018, 0x1 },
+	{ 0x11002, 0x6209 },
+	{ 0x110b2, 0x1 },
+	{ 0x111b4, 0x1 },
+	{ 0x112b4, 0x1 },
+	{ 0x113b4, 0x1 },
+	{ 0x114b4, 0x1 },
+	{ 0x115b4, 0x1 },
+	{ 0x116b4, 0x1 },
+	{ 0x117b4, 0x1 },
+	{ 0x118b4, 0x1 },
+	{ 0x12011, 0x1 },
+	{ 0x12012, 0x1 },
+	{ 0x12013, 0x180 },
+	{ 0x12018, 0x1 },
+	{ 0x12002, 0x6209 },
+	{ 0x120b2, 0x1 },
+	{ 0x121b4, 0x1 },
+	{ 0x122b4, 0x1 },
+	{ 0x123b4, 0x1 },
+	{ 0x124b4, 0x1 },
+	{ 0x125b4, 0x1 },
+	{ 0x126b4, 0x1 },
+	{ 0x127b4, 0x1 },
+	{ 0x128b4, 0x1 },
+	{ 0x13011, 0x1 },
+	{ 0x13012, 0x1 },
+	{ 0x13013, 0x180 },
+	{ 0x13018, 0x1 },
+	{ 0x13002, 0x6209 },
+	{ 0x130b2, 0x1 },
+	{ 0x131b4, 0x1 },
+	{ 0x132b4, 0x1 },
+	{ 0x133b4, 0x1 },
+	{ 0x134b4, 0x1 },
+	{ 0x135b4, 0x1 },
+	{ 0x136b4, 0x1 },
+	{ 0x137b4, 0x1 },
+	{ 0x138b4, 0x1 },
+	{ 0x20089, 0x1 },
+	{ 0x20088, 0x19 },
+	{ 0xc0080, 0x2 },
+	{ 0xd0000, 0x1 }
+};
+
+/*
+ * Generated code from MX8M_DDR_tool v3.30 using MX8M Plus RPAv7
+ * - 4GiB: imx8mp-gw7401 1x Micron MT53D1024M32D4DT 2-ch dual-die per channel
+ */
+/* P0 message block paremeter for training firmware */
+static struct dram_cfg_param ddr_ddrc_cfg_4gb_dual_die[] = {
+	/** Initialize DDRC registers **/
+	{ 0x3d400304, 0x1 },
+	{ 0x3d400030, 0x1 },
+	{ 0x3d400000, 0xa3080020 },
+	{ 0x3d400020, 0x1203 },
+	{ 0x3d400024, 0x16e3600 },
+	{ 0x3d400064, 0x5b00d2 },
+	{ 0x3d400070, 0x7027f90 },
+	{ 0x3d400074, 0x790 },
+	{ 0x3d4000d0, 0xc00305ba },
+	{ 0x3d4000d4, 0x940000 },
+	{ 0x3d4000dc, 0xd4002d },
+	{ 0x3d4000e0, 0x310000 },
+	{ 0x3d4000e8, 0x660048 },
+	{ 0x3d4000ec, 0x160048 },
+	{ 0x3d400100, 0x191e1920 },
+	{ 0x3d400104, 0x60630 },
+	{ 0x3d40010c, 0xb0b000 },
+	{ 0x3d400110, 0xe04080e },
+	{ 0x3d400114, 0x2040c0c },
+	{ 0x3d400118, 0x1010007 },
+	{ 0x3d40011c, 0x401 },
+	{ 0x3d400130, 0x20600 },
+	{ 0x3d400134, 0xc100002 },
+	{ 0x3d400138, 0xd8 },
+	{ 0x3d400144, 0x96004b },
+	{ 0x3d400180, 0x2ee0017 },
+	{ 0x3d400184, 0x2605b8e },
+	{ 0x3d400188, 0x0 },
+	{ 0x3d400190, 0x497820a },
+	{ 0x3d400194, 0x80303 },
+	{ 0x3d4001b4, 0x170a },
+	{ 0x3d4001a0, 0xe0400018 },
+	{ 0x3d4001a4, 0xdf00e4 },
+	{ 0x3d4001a8, 0x80000000 },
+	{ 0x3d4001b0, 0x11 },
+	{ 0x3d4001c0, 0x1 },
+	{ 0x3d4001c4, 0x1 },
+	{ 0x3d4000f4, 0xc99 },
+	{ 0x3d400108, 0x70e1617 },
+	{ 0x3d400200, 0x17 },
+	{ 0x3d40020c, 0x0 },
+	{ 0x3d400210, 0x1f1f },
+	{ 0x3d400204, 0x80808 },
+	{ 0x3d400214, 0x7070707 },
+	{ 0x3d400218, 0x7070707 },
+	{ 0x3d40021c, 0xf0f },
+	{ 0x3d400250, 0x1705 },
+	{ 0x3d400254, 0x2c },
+	{ 0x3d40025c, 0x4000030 },
+	{ 0x3d400264, 0x900093e7 },
+	{ 0x3d40026c, 0x2005574 },
+	{ 0x3d400400, 0x111 },
+	{ 0x3d400404, 0x72ff },
+	{ 0x3d400408, 0x72ff },
+	{ 0x3d400494, 0x2100e07 },
+	{ 0x3d400498, 0x620096 },
+	{ 0x3d40049c, 0x1100e07 },
+	{ 0x3d4004a0, 0xc8012c },
+	{ 0x3d402020, 0x1001 },
+	{ 0x3d402024, 0x30d400 },
+	{ 0x3d402050, 0x20d000 },
+	{ 0x3d402064, 0xc001c },
+	{ 0x3d4020dc, 0x840000 },
+	{ 0x3d4020e0, 0x330000 },
+	{ 0x3d4020e8, 0x660048 },
+	{ 0x3d4020ec, 0x160048 },
+	{ 0x3d402100, 0xa040305 },
+	{ 0x3d402104, 0x30407 },
+	{ 0x3d402108, 0x203060b },
+	{ 0x3d40210c, 0x505000 },
+	{ 0x3d402110, 0x2040202 },
+	{ 0x3d402114, 0x2030202 },
+	{ 0x3d402118, 0x1010004 },
+	{ 0x3d40211c, 0x301 },
+	{ 0x3d402130, 0x20300 },
+	{ 0x3d402134, 0xa100002 },
+	{ 0x3d402138, 0x1d },
+	{ 0x3d402144, 0x14000a },
+	{ 0x3d402180, 0x640004 },
+	{ 0x3d402190, 0x3818200 },
+	{ 0x3d402194, 0x80303 },
+	{ 0x3d4021b4, 0x100 },
+	{ 0x3d4020f4, 0xc99 },
+	{ 0x3d403020, 0x1001 },
+	{ 0x3d403024, 0xc3500 },
+	{ 0x3d403050, 0x20d000 },
+	{ 0x3d403064, 0x30007 },
+	{ 0x3d4030dc, 0x840000 },
+	{ 0x3d4030e0, 0x330000 },
+	{ 0x3d4030e8, 0x660048 },
+	{ 0x3d4030ec, 0x160048 },
+	{ 0x3d403100, 0xa010102 },
+	{ 0x3d403104, 0x30404 },
+	{ 0x3d403108, 0x203060b },
+	{ 0x3d40310c, 0x505000 },
+	{ 0x3d403110, 0x2040202 },
+	{ 0x3d403114, 0x2030202 },
+	{ 0x3d403118, 0x1010004 },
+	{ 0x3d40311c, 0x301 },
+	{ 0x3d403130, 0x20300 },
+	{ 0x3d403134, 0xa100002 },
+	{ 0x3d403138, 0x8 },
+	{ 0x3d403144, 0x50003 },
+	{ 0x3d403180, 0x190004 },
+	{ 0x3d403190, 0x3818200 },
+	{ 0x3d403194, 0x80303 },
+	{ 0x3d4031b4, 0x100 },
+	{ 0x3d4030f4, 0xc99 },
+	{ 0x3d400028, 0x0 },
+};
+
+/* PHY Initialize Configuration */
+static struct dram_cfg_param ddr_ddrphy_cfg_4gb_dual_die[] = {
+	{ 0x100a0, 0x0 },
+	{ 0x100a1, 0x1 },
+	{ 0x100a2, 0x3 },
+	{ 0x100a3, 0x2 },
+	{ 0x100a4, 0x5 },
+	{ 0x100a5, 0x4 },
+	{ 0x100a6, 0x7 },
+	{ 0x100a7, 0x6 },
+	{ 0x110a0, 0x0 },
+	{ 0x110a1, 0x1 },
+	{ 0x110a2, 0x2 },
+	{ 0x110a3, 0x3 },
+	{ 0x110a4, 0x4 },
+	{ 0x110a5, 0x5 },
+	{ 0x110a6, 0x6 },
+	{ 0x110a7, 0x7 },
+	{ 0x120a0, 0x0 },
+	{ 0x120a1, 0x1 },
+	{ 0x120a2, 0x2 },
+	{ 0x120a3, 0x3 },
+	{ 0x120a4, 0x4 },
+	{ 0x120a5, 0x5 },
+	{ 0x120a6, 0x6 },
+	{ 0x120a7, 0x7 },
+	{ 0x130a0, 0x0 },
+	{ 0x130a1, 0x1 },
+	{ 0x130a2, 0x3 },
+	{ 0x130a3, 0x4 },
+	{ 0x130a4, 0x5 },
+	{ 0x130a5, 0x2 },
+	{ 0x130a6, 0x7 },
+	{ 0x130a7, 0x6 },
+	{ 0x1005f, 0x1ff },
+	{ 0x1015f, 0x1ff },
+	{ 0x1105f, 0x1ff },
+	{ 0x1115f, 0x1ff },
+	{ 0x1205f, 0x1ff },
+	{ 0x1215f, 0x1ff },
+	{ 0x1305f, 0x1ff },
+	{ 0x1315f, 0x1ff },
+	{ 0x11005f, 0x1ff },
+	{ 0x11015f, 0x1ff },
+	{ 0x11105f, 0x1ff },
+	{ 0x11115f, 0x1ff },
+	{ 0x11205f, 0x1ff },
+	{ 0x11215f, 0x1ff },
+	{ 0x11305f, 0x1ff },
+	{ 0x11315f, 0x1ff },
+	{ 0x21005f, 0x1ff },
+	{ 0x21015f, 0x1ff },
+	{ 0x21105f, 0x1ff },
+	{ 0x21115f, 0x1ff },
+	{ 0x21205f, 0x1ff },
+	{ 0x21215f, 0x1ff },
+	{ 0x21305f, 0x1ff },
+	{ 0x21315f, 0x1ff },
+	{ 0x55, 0x1ff },
+	{ 0x1055, 0x1ff },
+	{ 0x2055, 0x1ff },
+	{ 0x3055, 0x1ff },
+	{ 0x4055, 0x1ff },
+	{ 0x5055, 0x1ff },
+	{ 0x6055, 0x1ff },
+	{ 0x7055, 0x1ff },
+	{ 0x8055, 0x1ff },
+	{ 0x9055, 0x1ff },
+	{ 0x200c5, 0x19 },
+	{ 0x1200c5, 0x7 },
+	{ 0x2200c5, 0x7 },
+	{ 0x2002e, 0x2 },
+	{ 0x12002e, 0x2 },
+	{ 0x22002e, 0x2 },
+	{ 0x90204, 0x0 },
+	{ 0x190204, 0x0 },
+	{ 0x290204, 0x0 },
+	{ 0x20024, 0x1a3 },
+	{ 0x2003a, 0x2 },
+	{ 0x120024, 0x1a3 },
+	{ 0x2003a, 0x2 },
+	{ 0x220024, 0x1a3 },
+	{ 0x2003a, 0x2 },
+	{ 0x20056, 0x3 },
+	{ 0x120056, 0x3 },
+	{ 0x220056, 0x3 },
+	{ 0x1004d, 0xe00 },
+	{ 0x1014d, 0xe00 },
+	{ 0x1104d, 0xe00 },
+	{ 0x1114d, 0xe00 },
+	{ 0x1204d, 0xe00 },
+	{ 0x1214d, 0xe00 },
+	{ 0x1304d, 0xe00 },
+	{ 0x1314d, 0xe00 },
+	{ 0x11004d, 0xe00 },
+	{ 0x11014d, 0xe00 },
+	{ 0x11104d, 0xe00 },
+	{ 0x11114d, 0xe00 },
+	{ 0x11204d, 0xe00 },
+	{ 0x11214d, 0xe00 },
+	{ 0x11304d, 0xe00 },
+	{ 0x11314d, 0xe00 },
+	{ 0x21004d, 0xe00 },
+	{ 0x21014d, 0xe00 },
+	{ 0x21104d, 0xe00 },
+	{ 0x21114d, 0xe00 },
+	{ 0x21204d, 0xe00 },
+	{ 0x21214d, 0xe00 },
+	{ 0x21304d, 0xe00 },
+	{ 0x21314d, 0xe00 },
+	{ 0x10049, 0xeba },
+	{ 0x10149, 0xeba },
+	{ 0x11049, 0xeba },
+	{ 0x11149, 0xeba },
+	{ 0x12049, 0xeba },
+	{ 0x12149, 0xeba },
+	{ 0x13049, 0xeba },
+	{ 0x13149, 0xeba },
+	{ 0x110049, 0xeba },
+	{ 0x110149, 0xeba },
+	{ 0x111049, 0xeba },
+	{ 0x111149, 0xeba },
+	{ 0x112049, 0xeba },
+	{ 0x112149, 0xeba },
+	{ 0x113049, 0xeba },
+	{ 0x113149, 0xeba },
+	{ 0x210049, 0xeba },
+	{ 0x210149, 0xeba },
+	{ 0x211049, 0xeba },
+	{ 0x211149, 0xeba },
+	{ 0x212049, 0xeba },
+	{ 0x212149, 0xeba },
+	{ 0x213049, 0xeba },
+	{ 0x213149, 0xeba },
+	{ 0x43, 0x63 },
+	{ 0x1043, 0x63 },
+	{ 0x2043, 0x63 },
+	{ 0x3043, 0x63 },
+	{ 0x4043, 0x63 },
+	{ 0x5043, 0x63 },
+	{ 0x6043, 0x63 },
+	{ 0x7043, 0x63 },
+	{ 0x8043, 0x63 },
+	{ 0x9043, 0x63 },
+	{ 0x20018, 0x3 },
+	{ 0x20075, 0x4 },
+	{ 0x20050, 0x0 },
+	{ 0x20008, 0x2ee },
+	{ 0x120008, 0x64 },
+	{ 0x220008, 0x19 },
+	{ 0x20088, 0x9 },
+	{ 0x200b2, 0x104 },
+	{ 0x10043, 0x5a1 },
+	{ 0x10143, 0x5a1 },
+	{ 0x11043, 0x5a1 },
+	{ 0x11143, 0x5a1 },
+	{ 0x12043, 0x5a1 },
+	{ 0x12143, 0x5a1 },
+	{ 0x13043, 0x5a1 },
+	{ 0x13143, 0x5a1 },
+	{ 0x1200b2, 0x104 },
+	{ 0x110043, 0x5a1 },
+	{ 0x110143, 0x5a1 },
+	{ 0x111043, 0x5a1 },
+	{ 0x111143, 0x5a1 },
+	{ 0x112043, 0x5a1 },
+	{ 0x112143, 0x5a1 },
+	{ 0x113043, 0x5a1 },
+	{ 0x113143, 0x5a1 },
+	{ 0x2200b2, 0x104 },
+	{ 0x210043, 0x5a1 },
+	{ 0x210143, 0x5a1 },
+	{ 0x211043, 0x5a1 },
+	{ 0x211143, 0x5a1 },
+	{ 0x212043, 0x5a1 },
+	{ 0x212143, 0x5a1 },
+	{ 0x213043, 0x5a1 },
+	{ 0x213143, 0x5a1 },
+	{ 0x200fa, 0x1 },
+	{ 0x1200fa, 0x1 },
+	{ 0x2200fa, 0x1 },
+	{ 0x20019, 0x1 },
+	{ 0x120019, 0x1 },
+	{ 0x220019, 0x1 },
+	{ 0x200f0, 0x660 },
+	{ 0x200f1, 0x0 },
+	{ 0x200f2, 0x4444 },
+	{ 0x200f3, 0x8888 },
+	{ 0x200f4, 0x5665 },
+	{ 0x200f5, 0x0 },
+	{ 0x200f6, 0x0 },
+	{ 0x200f7, 0xf000 },
+	{ 0x20025, 0x0 },
+	{ 0x2002d, 0x0 },
+	{ 0x12002d, 0x0 },
+	{ 0x22002d, 0x0 },
+	{ 0x2007d, 0x212 },
+	{ 0x12007d, 0x212 },
+	{ 0x22007d, 0x212 },
+	{ 0x2007c, 0x61 },
+	{ 0x12007c, 0x61 },
+	{ 0x22007c, 0x61 },
+	{ 0x1004a, 0x500 },
+	{ 0x1104a, 0x500 },
+	{ 0x1204a, 0x500 },
+	{ 0x1304a, 0x500 },
+	{ 0x2002c, 0x0 },
+};
+
+static struct dram_cfg_param ddr_fsp0_cfg_4gb_dual_die[] = {
+	{ 0xd0000, 0x0 },
+	{ 0x54003, 0xbb8 },
+	{ 0x54004, 0x2 },
+	{ 0x54005, 0x2228 },
+	{ 0x54006, 0x14 },
+	{ 0x54008, 0x131f },
+	{ 0x54009, 0xc8 },
+	{ 0x5400b, 0x2 },
+	{ 0x5400f, 0x100 },
+	{ 0x54012, 0x310 },
+	{ 0x54019, 0x2dd4 },
+	{ 0x5401a, 0x31 },
+	{ 0x5401b, 0x4866 },
+	{ 0x5401c, 0x4800 },
+	{ 0x5401e, 0x16 },
+	{ 0x5401f, 0x2dd4 },
+	{ 0x54020, 0x31 },
+	{ 0x54021, 0x4866 },
+	{ 0x54022, 0x4800 },
+	{ 0x54024, 0x16 },
+	{ 0x5402b, 0x1000 },
+	{ 0x5402c, 0x3 },
+	{ 0x54032, 0xd400 },
+	{ 0x54033, 0x312d },
+	{ 0x54034, 0x6600 },
+	{ 0x54035, 0x48 },
+	{ 0x54036, 0x48 },
+	{ 0x54037, 0x1600 },
+	{ 0x54038, 0xd400 },
+	{ 0x54039, 0x312d },
+	{ 0x5403a, 0x6600 },
+	{ 0x5403b, 0x48 },
+	{ 0x5403c, 0x48 },
+	{ 0x5403d, 0x1600 },
+	{ 0xd0000, 0x1 },
+};
+
+/* P1 message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp1_cfg_4gb_dual_die[] = {
+	{ 0xd0000, 0x0 },
+	{ 0x54002, 0x101 },
+	{ 0x54003, 0x190 },
+	{ 0x54004, 0x2 },
+	{ 0x54005, 0x2228 },
+	{ 0x54006, 0x14 },
+	{ 0x54008, 0x121f },
+	{ 0x54009, 0xc8 },
+	{ 0x5400b, 0x2 },
+	{ 0x5400f, 0x100 },
+	{ 0x54012, 0x310 },
+	{ 0x54019, 0x84 },
+	{ 0x5401a, 0x33 },
+	{ 0x5401b, 0x4866 },
+	{ 0x5401c, 0x4800 },
+	{ 0x5401e, 0x16 },
+	{ 0x5401f, 0x84 },
+	{ 0x54020, 0x33 },
+	{ 0x54021, 0x4866 },
+	{ 0x54022, 0x4800 },
+	{ 0x54024, 0x16 },
+	{ 0x5402b, 0x1000 },
+	{ 0x5402c, 0x3 },
+	{ 0x54032, 0x8400 },
+	{ 0x54033, 0x3300 },
+	{ 0x54034, 0x6600 },
+	{ 0x54035, 0x48 },
+	{ 0x54036, 0x48 },
+	{ 0x54037, 0x1600 },
+	{ 0x54038, 0x8400 },
+	{ 0x54039, 0x3300 },
+	{ 0x5403a, 0x6600 },
+	{ 0x5403b, 0x48 },
+	{ 0x5403c, 0x48 },
+	{ 0x5403d, 0x1600 },
+	{ 0xd0000, 0x1 },
+};
+
+/* P2 message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp2_cfg_4gb_dual_die[] = {
+	{ 0xd0000, 0x0 },
+	{ 0x54002, 0x102 },
+	{ 0x54003, 0x64 },
+	{ 0x54004, 0x2 },
+	{ 0x54005, 0x2228 },
+	{ 0x54006, 0x14 },
+	{ 0x54008, 0x121f },
+	{ 0x54009, 0xc8 },
+	{ 0x5400b, 0x2 },
+	{ 0x5400f, 0x100 },
+	{ 0x54012, 0x310 },
+	{ 0x54019, 0x84 },
+	{ 0x5401a, 0x33 },
+	{ 0x5401b, 0x4866 },
+	{ 0x5401c, 0x4800 },
+	{ 0x5401e, 0x16 },
+	{ 0x5401f, 0x84 },
+	{ 0x54020, 0x33 },
+	{ 0x54021, 0x4866 },
+	{ 0x54022, 0x4800 },
+	{ 0x54024, 0x16 },
+	{ 0x5402b, 0x1000 },
+	{ 0x5402c, 0x3 },
+	{ 0x54032, 0x8400 },
+	{ 0x54033, 0x3300 },
+	{ 0x54034, 0x6600 },
+	{ 0x54035, 0x48 },
+	{ 0x54036, 0x48 },
+	{ 0x54037, 0x1600 },
+	{ 0x54038, 0x8400 },
+	{ 0x54039, 0x3300 },
+	{ 0x5403a, 0x6600 },
+	{ 0x5403b, 0x48 },
+	{ 0x5403c, 0x48 },
+	{ 0x5403d, 0x1600 },
+	{ 0xd0000, 0x1 },
+};
+
+/* P0 2D message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp0_2d_cfg_4gb_dual_die[] = {
+	{ 0xd0000, 0x0 },
+	{ 0x54003, 0xbb8 },
+	{ 0x54004, 0x2 },
+	{ 0x54005, 0x2228 },
+	{ 0x54006, 0x14 },
+	{ 0x54008, 0x61 },
+	{ 0x54009, 0xc8 },
+	{ 0x5400b, 0x2 },
+	{ 0x5400f, 0x100 },
+	{ 0x54010, 0x1f7f },
+	{ 0x54012, 0x310 },
+	{ 0x54019, 0x2dd4 },
+	{ 0x5401a, 0x31 },
+	{ 0x5401b, 0x4866 },
+	{ 0x5401c, 0x4800 },
+	{ 0x5401e, 0x16 },
+	{ 0x5401f, 0x2dd4 },
+	{ 0x54020, 0x31 },
+	{ 0x54021, 0x4866 },
+	{ 0x54022, 0x4800 },
+	{ 0x54024, 0x16 },
+	{ 0x5402b, 0x1000 },
+	{ 0x5402c, 0x3 },
+	{ 0x54032, 0xd400 },
+	{ 0x54033, 0x312d },
+	{ 0x54034, 0x6600 },
+	{ 0x54035, 0x48 },
+	{ 0x54036, 0x48 },
+	{ 0x54037, 0x1600 },
+	{ 0x54038, 0xd400 },
+	{ 0x54039, 0x312d },
+	{ 0x5403a, 0x6600 },
+	{ 0x5403b, 0x48 },
+	{ 0x5403c, 0x48 },
+	{ 0x5403d, 0x1600 },
+	{ 0xd0000, 0x1 },
+};
+
+static struct dram_fsp_msg ddr_dram_fsp_msg_4gb_dual_die[] = {
+	{
+		/* P0 3000mts 1D */
+		.drate = 3000,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = ddr_fsp0_cfg_4gb_dual_die,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg_4gb_dual_die),
+	},
+	{
+		/* P1 400mts 1D */
+		.drate = 400,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = ddr_fsp1_cfg_4gb_dual_die,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg_4gb_dual_die),
+	},
+	{
+		/* P2 100mts 1D */
+		.drate = 100,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = ddr_fsp2_cfg_4gb_dual_die,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg_4gb_dual_die),
+	},
+	{
+		/* P0 3000mts 2D */
+		.drate = 3000,
+		.fw_type = FW_2D_IMAGE,
+		.fsp_cfg = ddr_fsp0_2d_cfg_4gb_dual_die,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg_4gb_dual_die),
+	},
+};
+
+/* ddr timing config params */
+struct dram_timing_info dram_timing_4gb_dual_die = {
+	.ddrc_cfg = ddr_ddrc_cfg_4gb_dual_die,
+	.ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg_4gb_dual_die),
+	.ddrphy_cfg = ddr_ddrphy_cfg_4gb_dual_die,
+	.ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg_4gb_dual_die),
+	.fsp_msg = ddr_dram_fsp_msg_4gb_dual_die,
+	.fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg_4gb_dual_die),
+	.ddrphy_trained_csr = ddr_ddrphy_trained_csr,
+	.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
+	.ddrphy_pie = ddr_phy_pie,
+	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
+	.fsp_table = { 3000, 400, 100, },
+};
diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c
index b56e1b6..223f22d 100644
--- a/board/gateworks/venice/spl.c
+++ b/board/gateworks/venice/spl.c
@@ -7,36 +7,29 @@
 #include <cpu_func.h>
 #include <hang.h>
 #include <i2c.h>
-#include <image.h>
 #include <init.h>
-#include <log.h>
 #include <spl.h>
-#include <asm/io.h>
 #include <asm/mach-imx/gpio.h>
-#include <asm/mach-imx/iomux-v3.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx8mm_pins.h>
 #include <asm/arch/imx8mn_pins.h>
+#include <asm/arch/imx8mp_pins.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/mach-imx/boot_mode.h>
 #include <asm/arch/ddr.h>
 #include <asm-generic/gpio.h>
-
 #include <dm/uclass.h>
 #include <dm/device.h>
-#include <dm/uclass-internal.h>
-#include <dm/device-internal.h>
-
+#include <linux/delay.h>
 #include <power/bd71837.h>
 #include <power/mp5416.h>
+#include <power/pca9450.h>
 
-#include "gsc.h"
+#include "eeprom.h"
 #include "lpddr4_timing.h"
 
 #define PCIE_RSTN IMX_GPIO_NR(4, 6)
 
-DECLARE_GLOBAL_DATA_PTR;
-
 static void spl_dram_init(int size)
 {
 	struct dram_timing_info *dram_timing;
@@ -59,14 +52,13 @@ static void spl_dram_init(int size)
 		printf("Unknown DDR configuration: %d MiB\n", size);
 		dram_timing = &dram_timing_1gb;
 		size = 1024;
-#endif
-#ifdef CONFIG_IMX8MN
+#elif CONFIG_IMX8MN
 	case 1024:
 		dram_timing = &dram_timing_1gb_single_die;
 		break;
 	case 2048:
-		if (!strcmp(gsc_get_model(), "GW7902-SP466-A") ||
-		    !strcmp(gsc_get_model(), "GW7902-SP466-B")) {
+		if (!strcmp(eeprom_get_model(), "GW7902-SP466-A") ||
+		    !strcmp(eeprom_get_model(), "GW7902-SP466-B")) {
 			dram_timing = &dram_timing_2gb_dual_die;
 		} else {
 			dram_timing = &dram_timing_2gb_single_die;
@@ -76,6 +68,14 @@ static void spl_dram_init(int size)
 		printf("Unknown DDR configuration: %d MiB\n", size);
 		dram_timing = &dram_timing_2gb_dual_die;
 		size = 2048;
+#elif CONFIG_IMX8MP
+	case 4096:
+		dram_timing = &dram_timing_4gb_dual_die;
+		break;
+	default:
+		printf("Unknown DDR configuration: %d GiB\n", size);
+		dram_timing = &dram_timing_4gb_dual_die;
+		size = 4096;
 #endif
 	}
 
@@ -99,8 +99,7 @@ static iomux_v3_cfg_t const uart_pads[] = {
 static iomux_v3_cfg_t const wdog_pads[] = {
 	IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
-#endif
-#ifdef CONFIG_IMX8MN
+#elif CONFIG_IMX8MN
 static const iomux_v3_cfg_t uart_pads[] = {
 	IMX8MN_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
 	IMX8MN_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
@@ -109,6 +108,16 @@ static const iomux_v3_cfg_t uart_pads[] = {
 static const iomux_v3_cfg_t wdog_pads[] = {
 	IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
+#elif CONFIG_IMX8MP
+static const iomux_v3_cfg_t uart_pads[] = {
+	MX8MP_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+	MX8MP_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+static const iomux_v3_cfg_t wdog_pads[] = {
+	MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
+};
+
 #endif
 
 int board_early_init_f(void)
@@ -149,7 +158,7 @@ static int dm_i2c_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set)
 
 static int power_init_board(void)
 {
-	const char *model = gsc_get_model();
+	const char *model = eeprom_get_model();
 	struct udevice *bus;
 	struct udevice *dev;
 	int ret;
@@ -174,6 +183,41 @@ static int power_init_board(void)
 				 BIT(7) | MP5416_VSET_SW3_SVAL(920000));
 	}
 
+	else if (!strncmp(model, "GW74", 4)) {
+		ret = uclass_get_device_by_seq(UCLASS_I2C, 0, &bus);
+		if (ret) {
+			printf("PMIC    : failed I2C1 probe: %d\n", ret);
+			return ret;
+		}
+		ret = dm_i2c_probe(bus, 0x25, 0, &dev);
+		if (ret) {
+			printf("PMIC    : failed probe: %d\n", ret);
+			return ret;
+		}
+		puts("PMIC    : PCA9450\n");
+
+		/* BUCKxOUT_DVS0/1 control BUCK123 output */
+		dm_i2c_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
+
+		/* Buck 1 DVS control through PMIC_STBY_REQ */
+		dm_i2c_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
+
+		/* Set DVS1 to 0.8v for suspend */
+		dm_i2c_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x10);
+
+		/* increase VDD_DRAM to 0.95v for 3Ghz DDR */
+		dm_i2c_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x1C);
+
+		/* VDD_DRAM off in suspend: B1_ENMODE=10 */
+		dm_i2c_reg_write(dev, PCA9450_BUCK3CTRL, 0x4a);
+
+		/* set VDD_SNVS_0V8 from default 0.85V */
+		dm_i2c_reg_write(dev, PCA9450_LDO2CTRL, 0xC0);
+
+		/* set WDOG_B_CFG to cold reset */
+		dm_i2c_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
+	}
+
 	else if ((!strncmp(model, "GW7901", 6)) ||
 		 (!strncmp(model, "GW7902", 6))) {
 		if (!strncmp(model, "GW7901", 6))
@@ -243,22 +287,36 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 
-	ret = uclass_get_device_by_name(UCLASS_CLK,
-					"clock-controller@30380000",
-					&dev);
-	if (ret < 0) {
-		printf("Failed to find clock node. Check device tree\n");
-		hang();
-	}
-
 	enable_tzc380();
 
 	/* need to hold PCIe switch in reset otherwise it can lock i2c bus EEPROM is on */
 	gpio_request(PCIE_RSTN, "perst#");
 	gpio_direction_output(PCIE_RSTN, 0);
 
-	/* GSC */
-	dram_sz = gsc_init(0);
+	/*
+	 * probe GSC device
+	 *
+	 * On a board with a missing/depleted backup battery for GSC, the
+	 * board may be ready to probe the GSC before its firmware is
+	 * running. We will wait here indefinately for the GSC EEPROM.
+	 */
+#ifdef CONFIG_IMX8MN
+	/*
+	 * IMX8MN boots quicker than IMX8MM and exposes issue
+	 * where because GSC I2C state machine isn't running and its
+	 * SCL/SDA are driven low the I2C driver spams 'Arbitration lost'
+	 * I2C errors.
+	 *
+	 * TODO: Put a loop here that somehow waits for I2C CLK/DAT to be high
+	 */
+	mdelay(50);
+#endif
+	while (1) {
+		if (!uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(gsc), &dev))
+			break;
+		mdelay(1);
+	}
+	dram_sz = eeprom_init(0);
 
 	/* PMIC */
 	power_init_board();
@@ -272,15 +330,22 @@ void board_init_f(ulong dummy)
 /* determine prioritized order of boot devices to load U-Boot from */
 void board_boot_order(u32 *spl_boot_list)
 {
+	int i = 0;
+
 	/*
 	 * If the SPL was loaded via serial loader, we try to get
 	 * U-Boot proper via USB SDP.
 	 */
-	if (spl_boot_device() == BOOT_DEVICE_BOARD)
-		spl_boot_list[0] = BOOT_DEVICE_BOARD;
+	if (spl_boot_device() == BOOT_DEVICE_BOARD) {
+#ifdef CONFIG_IMX8MM
+		spl_boot_list[i++] = BOOT_DEVICE_BOARD;
+#else
+		spl_boot_list[i++] = BOOT_DEVICE_BOOTROM;
+#endif
+	}
 
 	/* we have only eMMC in default venice dt */
-	spl_boot_list[0] = BOOT_DEVICE_MMC1;
+	spl_boot_list[i++] = BOOT_DEVICE_MMC1;
 }
 
 /* return boot device based on where the SPL was loaded from */
diff --git a/board/gateworks/venice/venice.c b/board/gateworks/venice/venice.c
index 425c690..4290a69 100644
--- a/board/gateworks/venice/venice.c
+++ b/board/gateworks/venice/venice.c
@@ -3,21 +3,13 @@
  * Copyright 2021 Gateworks Corporation
  */
 
-#include <common.h>
 #include <init.h>
 #include <led.h>
-#include <linux/delay.h>
 #include <miiphy.h>
-#include <netdev.h>
-
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
-#include <asm/io.h>
-#include <asm/unaligned.h>
-
-#include "gsc.h"
 
-DECLARE_GLOBAL_DATA_PTR;
+#include "eeprom.h"
 
 int board_phys_sdram_size(phys_size_t *size)
 {
@@ -37,7 +29,7 @@ int board_fit_config_name_match(const char *name)
 	char buf[32];
 
 	do {
-		dtb = gsc_get_dtb_name(i++, buf, sizeof(buf));
+		dtb = eeprom_get_dtb_name(i++, buf, sizeof(buf));
 		if (!strcmp(dtb, name)) {
 			if (!init++)
 				printf("DTB     : %s\n", name);
@@ -48,18 +40,36 @@ int board_fit_config_name_match(const char *name)
 	return -1;
 }
 
-#if (IS_ENABLED(CONFIG_FEC_MXC))
+#if (IS_ENABLED(CONFIG_NET))
 static int setup_fec(void)
 {
 	struct iomuxc_gpr_base_regs *gpr =
 		(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
 
+#ifndef CONFIG_IMX8MP
 	/* Use 125M anatop REF_CLK1 for ENET1, not from external */
 	clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
+#else
+	/* Enable RGMII TX clk output */
+	setbits_le32(&gpr->gpr[1], BIT(22));
+#endif
 
 	return 0;
 }
 
+static int setup_eqos(void)
+{
+	struct iomuxc_gpr_base_regs *gpr =
+		(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
+
+	/* set INTF as RGMII, enable RGMII TXC clock */
+	clrsetbits_le32(&gpr->gpr[1],
+			IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK, BIT(16));
+	setbits_le32(&gpr->gpr[1], BIT(19) | BIT(21));
+
+	return set_clk_eqos(ENET_125MHZ);
+}
+
 int board_phy_config(struct phy_device *phydev)
 {
 	unsigned short val;
@@ -96,16 +106,16 @@ int board_phy_config(struct phy_device *phydev)
 
 	return 0;
 }
-#endif // IS_ENABLED(CONFIG_FEC_MXC)
+#endif // IS_ENABLED(CONFIG_NET)
 
 int board_init(void)
 {
-	gsc_init(1);
+	eeprom_init(1);
 
 	if (IS_ENABLED(CONFIG_FEC_MXC))
 		setup_fec();
-
-	gsc_hwmon();
+	if (IS_ENABLED(CONFIG_DWC_ETH_QOS))
+		setup_eqos();
 
 	return 0;
 }
@@ -122,13 +132,13 @@ int board_late_init(void)
 
 	/* Set board serial/model */
 	if (!env_get("serial#"))
-		env_set_ulong("serial#", gsc_get_serial());
-	env_set("model", gsc_get_model());
+		env_set_ulong("serial#", eeprom_get_serial());
+	env_set("model", eeprom_get_model());
 
 	/* Set fdt_file vars */
 	i = 0;
 	do {
-		str = gsc_get_dtb_name(i, fdt, sizeof(fdt));
+		str = eeprom_get_dtb_name(i, fdt, sizeof(fdt));
 		if (str) {
 			sprintf(env, "fdt_file%d", i + 1);
 			strcat(fdt, ".dtb");
@@ -146,7 +156,7 @@ int board_late_init(void)
 			sprintf(env, "ethaddr");
 		str = env_get(env);
 		if (!str) {
-			ret = gsc_getmac(i, enetaddr);
+			ret = eeprom_getmac(i, enetaddr);
 			if (!ret)
 				eth_env_set_enetaddr(env, enetaddr);
 		}
@@ -166,7 +176,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 	int off;
 
 	/* set board model dt prop */
-	fdt_setprop_string(blob, 0, "board", gsc_get_model());
+	fdt_setprop_string(blob, 0, "board", eeprom_get_model());
 
 	/* update temp thresholds */
 	off = fdt_path_offset(blob, "/thermal-zones/cpu-thermal/trips");
diff --git a/board/toradex/apalis-imx8x/Kconfig b/board/toradex/apalis-imx8x/Kconfig
deleted file mode 100644
index d6cda7e..0000000
--- a/board/toradex/apalis-imx8x/Kconfig
+++ /dev/null
@@ -1,33 +0,0 @@
-if TARGET_APALIS_IMX8X
-
-config SYS_BOARD
-	default "apalis-imx8x"
-
-config SYS_VENDOR
-	default "toradex"
-
-config SYS_CONFIG_NAME
-	default "apalis-imx8x"
-
-config TDX_CFG_BLOCK
-	default y
-
-config TDX_HAVE_MMC
-	default y
-
-config TDX_CFG_BLOCK_DEV
-	default "0"
-
-config TDX_CFG_BLOCK_PART
-	default "1"
-
-# Toradex config block in eMMC, at the end of 1st "boot sector"
-config TDX_CFG_BLOCK_OFFSET
-	default "-512"
-
-config IMX_CONFIG
-	default "board/toradex/apalis-imx8x/apalis-imx8x-imximage.cfg"
-
-source "board/toradex/common/Kconfig"
-
-endif
diff --git a/board/toradex/apalis-imx8x/MAINTAINERS b/board/toradex/apalis-imx8x/MAINTAINERS
deleted file mode 100644
index 93d6cdd..0000000
--- a/board/toradex/apalis-imx8x/MAINTAINERS
+++ /dev/null
@@ -1,10 +0,0 @@
-Apalis iMX8X
-M:	Marcel Ziswiler <marcel.ziswiler@toradex.com>
-W:	http://developer.toradex.com/software/linux/linux-software
-S:	Maintained
-F:	arch/arm/dts/fsl-imx8x-apalis.dts
-F:	arch/arm/dts/fsl-imx8x-apalis-u-boot.dtsi
-F:	board/toradex/apalis-imx8x/
-F:	configs/apalis-imx8x_defconfig
-F:	doc/board/toradex/apalis-imx8x.rst
-F:	include/configs/apalis-imx8x.h
diff --git a/board/toradex/apalis-imx8x/Makefile b/board/toradex/apalis-imx8x/Makefile
deleted file mode 100644
index 9d6e85b..0000000
--- a/board/toradex/apalis-imx8x/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright 2020 Toradex
-#
-
-obj-y += apalis-imx8x.o
diff --git a/board/toradex/apalis-imx8x/apalis-imx8x-imximage.cfg b/board/toradex/apalis-imx8x/apalis-imx8x-imximage.cfg
deleted file mode 100644
index c229706..0000000
--- a/board/toradex/apalis-imx8x/apalis-imx8x-imximage.cfg
+++ /dev/null
@@ -1,23 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2020 Toradex
- *
- * Refer doc/imx/mkimage/imx8image.txt for more details about how-to configure
- * and create imx8image boot image
- */
-
-
-/* Boot from SD, sector size 0x400 */
-BOOT_FROM EMMC_FASTBOOT 0x400
-/* SoC type IMX8QX */
-SOC_TYPE IMX8QX
-/* Append seco container image */
-APPEND mx8qx-ahab-container.img
-/* Create the 2nd container */
-CONTAINER
-/* Add scfw image with exec attribute */
-IMAGE SCU mx8qx-apalis-scfw-tcm.bin
-/* Add ATF image with exec attribute */
-IMAGE A35 bl31.bin 0x80000000
-/* Add U-Boot image with load attribute */
-DATA A35 u-boot-dtb.bin 0x80020000
diff --git a/board/toradex/apalis-imx8x/apalis-imx8x.c b/board/toradex/apalis-imx8x/apalis-imx8x.c
deleted file mode 100644
index ac3bac6..0000000
--- a/board/toradex/apalis-imx8x/apalis-imx8x.c
+++ /dev/null
@@ -1,155 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2020 Toradex
- */
-
-#include <common.h>
-#include <cpu_func.h>
-#include <init.h>
-
-#include <asm/arch/clock.h>
-#include <asm/arch/imx8-pins.h>
-#include <asm/arch/iomux.h>
-#include <asm/arch/sci/sci.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/global_data.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <env.h>
-#include <errno.h>
-#include <linux/libfdt.h>
-
-#include "../common/tdx-cfg-block.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define UART_PAD_CTRL	((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
-			 (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
-			 (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
-			 (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
-
-static iomux_cfg_t uart1_pads[] = {
-	SC_P_UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	SC_P_UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-static void setup_iomux_uart(void)
-{
-	imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
-}
-
-void board_mem_get_layout(u64 *phys_sdram_1_start,
-			  u64 *phys_sdram_1_size,
-			  u64 *phys_sdram_2_start,
-			  u64 *phys_sdram_2_size)
-{
-	u32 is_dualx = 0, val = 0;
-	sc_err_t scierr = sc_misc_otp_fuse_read(-1, 6, &val);
-
-	if (scierr == SC_ERR_NONE) {
-		/* DX has two A35 cores disabled */
-		is_dualx = (val & 0xf) != 0x0;
-	}
-
-	*phys_sdram_1_start = PHYS_SDRAM_1;
-	if (is_dualx)
-		/* Our DX based SKUs only have 1 GB RAM */
-		*phys_sdram_1_size = SZ_1G;
-	else
-		*phys_sdram_1_size = PHYS_SDRAM_1_SIZE;
-	*phys_sdram_2_start = PHYS_SDRAM_2;
-	*phys_sdram_2_size = PHYS_SDRAM_2_SIZE;
-}
-
-int board_early_init_f(void)
-{
-	sc_pm_clock_rate_t rate;
-	sc_err_t err = 0;
-
-	/*
-	 * This works around that having only UART3 up the baudrate is 1.2M
-	 * instead of 115.2k. Set UART0 clock root to 80 MHz
-	 */
-	rate = 80000000;
-	err = sc_pm_set_clock_rate(-1, SC_R_UART_0, SC_PM_CLK_PER, &rate);
-	if (err != SC_ERR_NONE)
-		return 0;
-
-	/* Set UART3 clock root to 80 MHz and enable it */
-	rate = SC_80MHZ;
-	err = sc_pm_setup_uart(SC_R_UART_1, rate);
-	if (err != SC_ERR_NONE)
-		return 0;
-
-	setup_iomux_uart();
-
-	return 0;
-}
-
-#if IS_ENABLED(CONFIG_DM_GPIO)
-static void board_gpio_init(void)
-{
-	/* TODO */
-}
-#else
-static inline void board_gpio_init(void) {}
-#endif
-
-#if IS_ENABLED(CONFIG_FEC_MXC)
-#include <miiphy.h>
-
-int board_phy_config(struct phy_device *phydev)
-{
-	if (phydev->drv->config)
-		phydev->drv->config(phydev);
-
-	return 0;
-}
-#endif
-
-int checkboard(void)
-{
-	puts("Model: Toradex Apalis iMX8X\n");
-
-	build_info();
-	print_bootinfo();
-
-	return 0;
-}
-
-int board_init(void)
-{
-	board_gpio_init();
-
-	return 0;
-}
-
-/*
- * Board specific reset that is system reset.
- */
-void reset_cpu(void)
-{
-	/* TODO */
-}
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, struct bd_info *bd)
-{
-	return ft_common_board_setup(blob, bd);
-}
-#endif
-
-int board_mmc_get_env_dev(int devno)
-{
-	return devno;
-}
-
-int board_late_init(void)
-{
-#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-/* TODO move to common */
-	env_set("board_name", "Apalis iMX8X");
-#endif
-
-	return 0;
-}
diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c
index a78d52d..5604c46 100644
--- a/board/toradex/apalis_imx6/apalis_imx6.c
+++ b/board/toradex/apalis_imx6/apalis_imx6.c
@@ -304,13 +304,6 @@ static void setup_dtemode_uart(void)
 	clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI);
 	clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI);
 }
-static void setup_dcemode_uart(void)
-{
-	clrbits_le32((u32 *)(UART1_BASE + UFCR), UFCR_DCEDTE);
-	clrbits_le32((u32 *)(UART2_BASE + UFCR), UFCR_DCEDTE);
-	clrbits_le32((u32 *)(UART4_BASE + UFCR), UFCR_DCEDTE);
-	clrbits_le32((u32 *)(UART5_BASE + UFCR), UFCR_DCEDTE);
-}
 
 static void setup_iomux_dte_uart(void)
 {
@@ -318,12 +311,6 @@ static void setup_iomux_dte_uart(void)
 	imx_iomux_v3_setup_multiple_pads(uart1_pads_dte,
 					 ARRAY_SIZE(uart1_pads_dte));
 }
-static void setup_iomux_dce_uart(void)
-{
-	setup_dcemode_uart();
-	imx_iomux_v3_setup_multiple_pads(uart1_pads_dce,
-					 ARRAY_SIZE(uart1_pads_dce));
-}
 
 #ifdef CONFIG_USB_EHCI_MX6
 int board_ehci_hcd_init(int port)
@@ -665,11 +652,8 @@ int board_early_init_f(void)
 {
 	imx_iomux_v3_setup_multiple_pads(pwr_intb_pads,
 					 ARRAY_SIZE(pwr_intb_pads));
-#ifndef CONFIG_TDX_APALIS_IMX6_V1_0
 	setup_iomux_dte_uart();
-#else
-	setup_iomux_dce_uart();
-#endif
+
 	return 0;
 }
 
@@ -714,23 +698,7 @@ int board_late_init(void)
 	rev = get_board_revision();
 	snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev);
 	env_set("board_rev", env_str);
-
-#ifndef CONFIG_TDX_APALIS_IMX6_V1_0
-	if ((rev & 0xfff0) == 0x0100) {
-		char *fdt_env;
-
-		/* reconfigure the UART to DCE mode dynamically if on V1.0 HW */
-		setup_iomux_dce_uart();
-
-		/* if using the default device tree, use version for V1.0 HW */
-		fdt_env = env_get("fdt_file");
-		if ((fdt_env != NULL) && (strcmp(FDT_FILE, fdt_env) == 0)) {
-			env_set("fdt_file", FDT_FILE_V1_0);
-			printf("patching fdt_file to " FDT_FILE_V1_0 "\n");
-		}
-	}
-#endif /* CONFIG_TDX_APALIS_IMX6_V1_0 */
-#endif /* CONFIG_REVISION_TAG */
+#endif /* CONFIG_BOARD_LATE_INIT */
 
 #ifdef CONFIG_CMD_USB_SDP
 	if (is_boot_from_usb()) {
@@ -1129,10 +1097,8 @@ void board_init_f(ulong dummy)
 	/* UART clocks enabled and gd valid - init serial console */
 	preloader_console_init();
 
-#ifndef CONFIG_TDX_APALIS_IMX6_V1_0
 	/* Make sure we use dte mode */
 	setup_dtemode_uart();
-#endif
 
 	/* DDR initialization */
 	spl_dram_init();
diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c
index 6822102..486299b 100644
--- a/board/toradex/colibri_imx7/colibri_imx7.c
+++ b/board/toradex/colibri_imx7/colibri_imx7.c
@@ -319,40 +319,16 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 #endif
 
 #ifdef CONFIG_USB_EHCI_MX7
-static iomux_v3_cfg_t const usb_otg2_pads[] = {
-	MX7D_PAD_UART3_CTS_B__USB_OTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-int board_ehci_hcd_init(int port)
+int board_fix_fdt(void *rw_fdt_blob)
 {
-	switch (port) {
-	case 0:
-		break;
-	case 1:
-		if (is_cpu_type(MXC_CPU_MX7S))
-			return -ENODEV;
-
-		imx_iomux_v3_setup_multiple_pads(usb_otg2_pads,
-						 ARRAY_SIZE(usb_otg2_pads));
-		break;
-	default:
-		return -EINVAL;
-	}
-	return 0;
-}
+	/* i.MX 7Solo has only one single USB OTG1 but no USB host port */
+	if (is_cpu_type(MXC_CPU_MX7S)) {
+		int offset = fdt_path_offset(rw_fdt_blob, "/soc/bus@30800000/usb@30b20000");
 
-int board_usb_phy_mode(int port)
-{
-	switch (port) {
-	case 0:
-		if (gpio_get_value(USB_CDET_GPIO))
-			return USB_INIT_DEVICE;
-		else
-			return USB_INIT_HOST;
-	case 1:
-	default:
-		return USB_INIT_HOST;
+		return fdt_status_disabled(rw_fdt_blob, offset);
 	}
+
+	return 0;
 }
 
 #if defined(CONFIG_BOARD_LATE_INIT)
@@ -373,4 +349,4 @@ int board_late_init(void)
 }
 #endif /* CONFIG_BOARD_LATE_INIT */
 
-#endif
+#endif /* CONFIG_USB_EHCI_MX7 */
diff --git a/board/toradex/colibri_pxa270/Kconfig b/board/toradex/colibri_pxa270/Kconfig
deleted file mode 100644
index f646baa..0000000
--- a/board/toradex/colibri_pxa270/Kconfig
+++ /dev/null
@@ -1,23 +0,0 @@
-if TARGET_COLIBRI_PXA270
-
-config SYS_BOARD
-	default "colibri_pxa270"
-
-config SYS_VENDOR
-	default "toradex"
-
-config SYS_CONFIG_NAME
-	default "colibri_pxa270"
-
-config TDX_CFG_BLOCK
-	default y
-
-config TDX_HAVE_NOR
-	default y
-
-config TDX_CFG_BLOCK_OFFSET
-	default "262144"
-
-source "board/toradex/common/Kconfig"
-
-endif
diff --git a/board/toradex/colibri_pxa270/MAINTAINERS b/board/toradex/colibri_pxa270/MAINTAINERS
deleted file mode 100644
index b378d7b..0000000
--- a/board/toradex/colibri_pxa270/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-COLIBRI_PXA270 BOARD
-M:	Marek Vasut <marek.vasut@gmail.com>
-S:	Maintained
-F:	board/toradex/colibri_pxa270/
-F:	include/configs/colibri_pxa270.h
-F:	configs/colibri_pxa270_defconfig
diff --git a/board/toradex/colibri_pxa270/Makefile b/board/toradex/colibri_pxa270/Makefile
deleted file mode 100644
index ea610cf..0000000
--- a/board/toradex/colibri_pxa270/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Toradex Colibri PXA270 Support
-#
-# Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
-
-obj-y	:= colibri_pxa270.o
diff --git a/board/toradex/colibri_pxa270/colibri_pxa270.c b/board/toradex/colibri_pxa270/colibri_pxa270.c
deleted file mode 100644
index 25fbf41..0000000
--- a/board/toradex/colibri_pxa270/colibri_pxa270.c
+++ /dev/null
@@ -1,153 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Toradex Colibri PXA270 Support
- *
- * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
- * Copyright (C) 2016-2019 Marcel Ziswiler <marcel.ziswiler@toradex.com>
- */
-
-#include <common.h>
-#include <cpu_func.h>
-#include <dm.h>
-#include <init.h>
-#include <net.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/pxa.h>
-#include <asm/arch/regs-mmc.h>
-#include <asm/arch/regs-uart.h>
-#include <asm/global_data.h>
-#include <asm/io.h>
-#include <dm/platdata.h>
-#include <dm/platform_data/pxa_mmc_gen.h>
-#include <dm/platform_data/serial_pxa.h>
-#include <netdev.h>
-#include <serial.h>
-#include <usb.h>
-#include <asm/mach-types.h>
-#include <linux/delay.h>
-#include "../common/tdx-common.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_init(void)
-{
-	/* We have RAM, disable cache */
-	dcache_disable();
-	icache_disable();
-
-	/* arch number of Toradex Colibri PXA270 */
-	gd->bd->bi_arch_number = MACH_TYPE_COLIBRI;
-
-	/* address of boot parameters */
-	gd->bd->bi_boot_params = 0xa0000100;
-
-	return 0;
-}
-
-int checkboard(void)
-{
-	puts("Model: Toradex Colibri PXA270\n");
-
-	return 0;
-}
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, struct bd_info *bd)
-{
-	return ft_common_board_setup(blob, bd);
-}
-#endif
-
-int dram_init(void)
-{
-	pxa2xx_dram_init();
-	gd->ram_size = PHYS_SDRAM_1_SIZE;
-	return 0;
-}
-
-#ifdef	CONFIG_CMD_USB
-int board_usb_init(int index, enum usb_init_type init)
-{
-	writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
-		~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
-		UHCHR);
-
-	writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
-
-	while (UHCHR & UHCHR_FSBIR)
-		;
-
-	writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
-	writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
-
-	/* Clear any OTG Pin Hold */
-	if (readl(PSSR) & PSSR_OTGPH)
-		writel(readl(PSSR) | PSSR_OTGPH, PSSR);
-
-	writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
-	writel(readl(UHCRHDA) | 0x100, UHCRHDA);
-
-	/* Set port power control mask bits, only 3 ports. */
-	writel(readl(UHCRHDB) | (0x7 << 17), UHCRHDB);
-
-	/* enable port 2 */
-	writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
-		UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
-
-	return 0;
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return 0;
-}
-
-void usb_board_stop(void)
-{
-	writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
-	udelay(11);
-	writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
-
-	writel(readl(UHCCOMS) | 1, UHCCOMS);
-	udelay(10);
-
-	writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
-}
-#endif
-
-#ifdef CONFIG_DRIVER_DM9000
-int board_eth_init(struct bd_info *bis)
-{
-	return dm9000_initialize(bis);
-}
-#endif
-
-#ifdef	CONFIG_CMD_MMC
-#if !CONFIG_IS_ENABLED(DM_MMC)
-int board_mmc_init(struct bd_info *bis)
-{
-	pxa_mmc_register(0);
-	return 0;
-}
-#else /* !CONFIG_IS_ENABLED(DM_MMC) */
-static const struct pxa_mmc_plat mmc_plat = {
-	.base = (struct pxa_mmc_regs *)MMC0_BASE,
-};
-
-U_BOOT_DRVINFO(pxa_mmcs) = {
-	.name = "pxa_mmc",
-	.plat = &mmc_plat,
-};
-#endif /* !CONFIG_IS_ENABLED(DM_MMC) */
-#endif
-
-static const struct pxa_serial_plat serial_plat = {
-	.base = (struct pxa_uart_regs *)FFUART_BASE,
-	.port = FFUART_INDEX,
-	.baudrate = CONFIG_BAUDRATE,
-};
-
-U_BOOT_DRVINFO(pxa_serials) = {
-	.name = "serial_pxa",
-	.plat = &serial_plat,
-};
diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c
index 7cadd05..9c87289 100644
--- a/board/toradex/common/tdx-cfg-block.c
+++ b/board/toradex/common/tdx-cfg-block.c
@@ -13,7 +13,6 @@
 
 #if defined(CONFIG_TARGET_APALIS_IMX6) || \
 	defined(CONFIG_TARGET_APALIS_IMX8) || \
-	defined(CONFIG_TARGET_APALIS_IMX8X) || \
 	defined(CONFIG_TARGET_COLIBRI_IMX6) || \
 	defined(CONFIG_TARGET_COLIBRI_IMX8X) || \
 	defined(CONFIG_TARGET_VERDIN_IMX8MM) || \
@@ -23,11 +22,6 @@
 #else
 #define is_cpu_type(cpu) (0)
 #endif
-#if defined(CONFIG_CPU_PXA27X)
-#include <asm/arch-pxa/pxa.h>
-#else
-#define cpu_is_pxa27x(cpu) (0)
-#endif
 #include <cli.h>
 #include <console.h>
 #include <env.h>
@@ -370,16 +364,12 @@ static int get_cfgblock_interactive(void)
 	/* Unknown module by default */
 	tdx_hw_tag.prodid = 0;
 
-	if (cpu_is_pxa27x())
-		sprintf(message, "Is the module the 312 MHz version? [y/N] ");
-	else
-		sprintf(message, "Is the module an IT version? [y/N] ");
+	sprintf(message, "Is the module an IT version? [y/N] ");
 
 	len = cli_readline(message);
 	it = console_buffer[0];
 
 #if defined(CONFIG_TARGET_APALIS_IMX8) || \
-		defined(CONFIG_TARGET_APALIS_IMX8X) || \
 		defined(CONFIG_TARGET_COLIBRI_IMX6ULL) || \
 		defined(CONFIG_TARGET_COLIBRI_IMX8X) || \
 		defined(CONFIG_TARGET_VERDIN_IMX8MM) || \
@@ -451,16 +441,7 @@ static int get_cfgblock_interactive(void)
 				tdx_hw_tag.prodid = APALIS_IMX8QP;
 		}
 	} else if (is_cpu_type(MXC_CPU_IMX8QXP)) {
-#ifdef CONFIG_TARGET_APALIS_IMX8X
-		if (it == 'y' || it == 'Y' || wb == 'y' || wb == 'Y') {
-				tdx_hw_tag.prodid = APALIS_IMX8QXP_WIFI_BT_IT;
-		} else {
-			if (gd->ram_size == 0x40000000)
-				tdx_hw_tag.prodid = APALIS_IMX8DXP;
-			else
-				tdx_hw_tag.prodid = APALIS_IMX8QXP;
-		}
-#elif CONFIG_TARGET_COLIBRI_IMX8X
+#ifdef CONFIG_TARGET_COLIBRI_IMX8X
 		if (it == 'y' || it == 'Y') {
 			if (wb == 'y' || wb == 'Y')
 				tdx_hw_tag.prodid = COLIBRI_IMX8QXP_WIFI_BT_IT;
@@ -511,11 +492,6 @@ static int get_cfgblock_interactive(void)
 				tdx_hw_tag.prodid = COLIBRI_T20_256MB;
 			else
 				tdx_hw_tag.prodid = COLIBRI_T20_512MB;
-	} else if (cpu_is_pxa27x()) {
-		if (it == 'y' || it == 'Y')
-			tdx_hw_tag.prodid = COLIBRI_PXA270_312MHZ;
-		else
-			tdx_hw_tag.prodid = COLIBRI_PXA270_520MHZ;
 	}
 #if defined(CONFIG_TARGET_APALIS_T30) || defined(CONFIG_TARGET_COLIBRI_T30)
 	else if (!strcmp("tegra30", soc)) {
@@ -563,10 +539,6 @@ static int get_cfgblock_interactive(void)
 	tdx_hw_tag.ver_minor = console_buffer[2] - '0';
 	tdx_hw_tag.ver_assembly = console_buffer[3] - 'A';
 
-	if (cpu_is_pxa27x() && tdx_hw_tag.ver_major == 1)
-		tdx_hw_tag.prodid -= (COLIBRI_PXA270_312MHZ -
-				       COLIBRI_PXA270_V1_312MHZ);
-
 	while (len < 8) {
 		sprintf(message, "Enter module serial number: ");
 		len = cli_readline(message);