Merge tag 'ti-v2021.04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti

- DM support for OMAP PWM backlight
- USB host mode support for AM654
- Minor SPI fixes
- Add support k2g ice board with 1GHz silicon
- Fix GTC programming for K3 devices

10 files changed, 37 insertions, 10 deletions

diff --git a/board/BuR/common/bur_common.h b/board/BuR/common/bur_common.h
index c64ebe9..79c9af1 100644
--- a/board/BuR/common/bur_common.h
+++ b/board/BuR/common/bur_common.h
@@ -12,7 +12,7 @@
 #define _BUR_COMMON_H_
 
 #if !CONFIG_IS_ENABLED(DM_VIDEO)
-#include <../../../drivers/video/am335x-fb.h>
+#include <../../../drivers/video/ti/am335x-fb.h>
 
 int load_lcdtiming(struct am335x_lcdpanel *panel);
 #endif
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index 0a5104a..f676d7b 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #include <asm/arch/cpu.h>
 #include <asm/gpio.h>
 #include <power/tps65217.h>
-#include "../../../drivers/video/am335x-fb.h"
+#include "../../../drivers/video/ti/am335x-fb.h"
 
 void lcdbacklight(int on)
 {
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 40d2e02..3cc0e4b 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -879,7 +879,7 @@ int board_late_init(void)
 	}
 
 	/* Just probe the potentially supported cdce913 device */
-	uclass_get_device(UCLASS_CLK, 0, &dev);
+	uclass_get_device_by_name(UCLASS_CLK, "cdce913@65", &dev);
 
 	return 0;
 }
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index de49590..62ed37c 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -744,7 +744,7 @@ int board_late_init(void)
 #endif
 
 	/* Just probe the potentially supported cdce913 device */
-	uclass_get_device(UCLASS_CLK, 0, &dev);
+	uclass_get_device_by_name(UCLASS_CLK, "cdce913@65", &dev);
 
 	return 0;
 }
diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c
index 36063b1..4438f14 100644
--- a/board/ti/am65x/evm.c
+++ b/board/ti/am65x/evm.c
@@ -38,6 +38,10 @@ enum {
 /* Max number of MAC addresses that are parsed/processed per daughter card */
 #define DAUGHTER_CARD_NO_OF_MAC_ADDR	8
 
+/* Regiter that controls the SERDES0 lane and clock assignment */
+#define CTRLMMR_SERDES0_CTRL    0x00104080
+#define PCIE_LANE0              0x1
+
 DECLARE_GLOBAL_DATA_PTR;
 
 int board_init(void)
@@ -312,6 +316,18 @@ static int probe_daughtercards(void)
 						      (uchar *)mac_addr[j]);
 		}
 
+		/*
+		 * It has been observed that setting SERDES0 lane mux to USB prevents USB
+		 * 2.0 operation on USB0. Setting SERDES0 lane mux to non-USB when USB0 is
+		 * used in USB 2.0 only mode solves this issue. For USB3.0+2.0 operation
+		 * this issue is not present.
+		 *
+		 * Implement this workaround by writing 1 to LANE_FUNC_SEL field in
+		 * CTRLMMR_SERDES0_CTRL register.
+		 */
+		if (!strncmp(ep.name, "SER-PCIE2LEVM", sizeof(ep.name)))
+			writel(PCIE_LANE0, CTRLMMR_SERDES0_CTRL);
+
 		/* Skip if no overlays are to be added */
 		if (!strlen(cards[i].dtbo_name))
 			continue;
diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c
index c7be540..53bc127 100644
--- a/board/ti/ks2_evm/board.c
+++ b/board/ti/ks2_evm/board.c
@@ -48,11 +48,11 @@ int dram_init(void)
 	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
 				    CONFIG_MAX_RAM_BANK_SIZE);
 #if defined(CONFIG_TI_AEMIF)
-	if (!board_is_k2g_ice())
+	if (!(board_is_k2g_ice() || board_is_k2g_i1()))
 		aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
 #endif
 
-	if (!board_is_k2g_ice()) {
+	if (!(board_is_k2g_ice() || board_is_k2g_i1())) {
 		if (ddr3_size)
 			ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size);
 		else
diff --git a/board/ti/ks2_evm/board.h b/board/ti/ks2_evm/board.h
index d0cfbf5..93fc388 100644
--- a/board/ti/ks2_evm/board.h
+++ b/board/ti/ks2_evm/board.h
@@ -25,6 +25,10 @@ static inline int board_is_k2g_ice(void)
 {
 	return board_ti_is("66AK2GIC");
 }
+static inline int board_is_k2g_i1(void)
+{
+	return board_ti_is("66AK2GI1");
+}
 #else
 static inline int board_is_k2g_gp(void)
 {
@@ -34,6 +38,10 @@ static inline int board_is_k2g_ice(void)
 {
 	return false;
 }
+static inline int board_is_k2g_i1(void)
+{
+	return false;
+}
 #endif
 
 void spl_init_keystone_plls(void);
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index a71024b..2be86d6 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -248,7 +248,8 @@ int board_fit_config_name_match(const char *name)
 	else if (!strcmp(name, "keystone-k2g-evm") &&
 		(board_ti_is("66AK2GGP") || board_ti_is("66AK2GG1")))
 		return 0;
-	else if (!strcmp(name, "keystone-k2g-ice") && board_ti_is("66AK2GIC"))
+	else if (!strcmp(name, "keystone-k2g-ice") &&
+		 (board_ti_is("66AK2GIC") || board_is_k2g_i1()))
 		return 0;
 	else
 		return -1;
@@ -322,7 +323,7 @@ int embedded_dtb_select(void)
 			     BIT(9));
 		setbits_le32(K2G_GPIO1_BANK2_BASE + K2G_GPIO_SETDATA_OFFSET,
 			     BIT(9));
-	} else if (board_is_k2g_ice()) {
+	} else if (board_is_k2g_ice() || board_is_k2g_i1()) {
 		/* GBE Phy workaround. For Phy to latch the input
 		 * configuration, a GPIO reset is asserted at the
 		 * Phy reset pin to latch configuration correctly after SoC
@@ -364,6 +365,8 @@ int board_late_init(void)
 		env_set("board_name", "66AK2GG1\0");
 	else if (board_is_k2g_ice())
 		env_set("board_name", "66AK2GIC\0");
+	else if (board_is_k2g_i1())
+		env_set("board_name", "66AK2GI1\0");
 #endif
 	return 0;
 }
diff --git a/board/ti/ks2_evm/ddr3_k2g.c b/board/ti/ks2_evm/ddr3_k2g.c
index 563c5e9..3000d724 100644
--- a/board/ti/ks2_evm/ddr3_k2g.c
+++ b/board/ti/ks2_evm/ddr3_k2g.c
@@ -174,7 +174,7 @@ u32 ddr3_init(void)
 	} else if (board_is_k2g_gp()) {
 		ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_800_2g);
 		ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_800_2g);
-	} else if (board_is_k2g_ice()) {
+	} else if (board_is_k2g_ice() || board_is_k2g_i1()) {
 		ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_800_512mb);
 		ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_800_512mb);
 	}
diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h
index 3ecf571..fa6c92c 100644
--- a/board/ti/ks2_evm/mux-k2g.h
+++ b/board/ti/ks2_evm/mux-k2g.h
@@ -377,7 +377,7 @@ void k2g_mux_config(void)
 		configure_pin_mux(k2g_generic_pin_cfg);
 	} else if (board_is_k2g_gp() || board_is_k2g_g1()) {
 		configure_pin_mux(k2g_evm_pin_cfg);
-	} else if (board_is_k2g_ice()) {
+	} else if (board_is_k2g_ice() || board_is_k2g_i1()) {
 		configure_pin_mux(k2g_ice_evm_pin_cfg);
 	} else {
 		puts("Unknown board, cannot configure pinmux.");