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| author | Tom Rini <trini@konsulko.com> | 2018-04-04 09:18:38 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-04-04 14:10:39 -0400 |
| commit | e294ba0678359bc32085c1714329af37e33e8f16 (patch) | |
| tree | a2b490c6e62c63436ce660fe6986749db69d974c /board | |
| parent | 948071bab44d3cbb0e1f4828739fcf0f27312d37 (diff) | |
| parent | f3fed05e095439b3fd24990e20dbea1d4b03c121 (diff) | |
| download | u-boot-e294ba0678359bc32085c1714329af37e33e8f16.zip u-boot-e294ba0678359bc32085c1714329af37e33e8f16.tar.gz u-boot-e294ba0678359bc32085c1714329af37e33e8f16.tar.bz2 | |
Merge git://git.denx.de/u-boot-sunxi
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/sunxi/README.sunxi64 | 6 | ||||
| -rw-r--r-- | board/sunxi/board.c | 7 |
2 files changed, 9 insertions, 4 deletions
diff --git a/board/sunxi/README.sunxi64 b/board/sunxi/README.sunxi64 index 5a363d2..df1dbc8 100644 --- a/board/sunxi/README.sunxi64 +++ b/board/sunxi/README.sunxi64 @@ -38,6 +38,12 @@ the root of your U-Boot build directory (or create a symbolic link). $ export BL31=/src/arm-trusted-firmware/build/sun50iw1p1/debug/bl31.bin (adjust the actual path accordingly) +If you run into size issues with the resulting U-Boot image file, it might +help to use a release build, by using "DEBUG=0" when building bl31.bin. +As sometimes the ATF build process is a bit picky about the toolchain used, +or if you can't be bothered with building ATF, there are known working +binaries in the firmware repository[3], purely for convenience reasons. + SPL/U-Boot ------------ Both U-Boot proper and the SPL are using the 64-bit mode. As the boot ROM diff --git a/board/sunxi/board.c b/board/sunxi/board.c index e08e22f..322dd9e 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -286,10 +286,9 @@ static void nand_clock_setup(void) (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0)); -#ifdef CONFIG_MACH_SUN9I - setbits_le32(&ccm->ahb_gate1, (1 << AHB_GATE_OFFSET_DMA)); -#else - setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_DMA)); +#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I || \ + defined CONFIG_MACH_SUN9I || defined CONFIG_MACH_SUN50I + setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_NAND0)); #endif setbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1); } |