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| author | Andrew Davis <afd@ti.com> | 2023-11-30 08:49:11 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-12-15 15:39:42 -0500 |
| commit | a213289953addc09fe35b2ddf34e1cfb51cff697 (patch) | |
| tree | bc5b24633687da9c47d53a8fbd1ec6653525a7fb /board | |
| parent | 58a277c207927530469f0ae56eff7d5f702d5486 (diff) | |
| download | u-boot-a213289953addc09fe35b2ddf34e1cfb51cff697.zip u-boot-a213289953addc09fe35b2ddf34e1cfb51cff697.tar.gz u-boot-a213289953addc09fe35b2ddf34e1cfb51cff697.tar.bz2 | |
board: ti: k3: Remove need for CFG_SYS_SDRAM_BASEWIP/2023-12-15-assorted-TI-platform-updates
The base address of extended DDR does not change across the K3 family.
Setting this per SoC is not needed. Remove this definition to help
remove the last bits from K3 include/configs/*.h files.
Signed-off-by: Andrew Davis <afd@ti.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/ti/am65x/evm.c | 4 | ||||
| -rw-r--r-- | board/ti/j721e/evm.c | 4 | ||||
| -rw-r--r-- | board/ti/j721s2/evm.c | 4 |
3 files changed, 6 insertions, 6 deletions
diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c index 975eb17..df20902 100644 --- a/board/ti/am65x/evm.c +++ b/board/ti/am65x/evm.c @@ -73,13 +73,13 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) int dram_init_banksize(void) { /* Bank 0 declares the memory available in the DDR low region */ - gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].start = 0x80000000; gd->bd->bi_dram[0].size = 0x80000000; gd->ram_size = 0x80000000; #ifdef CONFIG_PHYS_64BIT /* Bank 1 declares the memory available in the DDR high region */ - gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1; + gd->bd->bi_dram[1].start = 0x880000000; gd->bd->bi_dram[1].size = 0x80000000; gd->ram_size = 0x100000000; #endif diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c index 0768385..c541880 100644 --- a/board/ti/j721e/evm.c +++ b/board/ti/j721e/evm.c @@ -61,13 +61,13 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) int dram_init_banksize(void) { /* Bank 0 declares the memory available in the DDR low region */ - gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].start = 0x80000000; gd->bd->bi_dram[0].size = 0x80000000; gd->ram_size = 0x80000000; #ifdef CONFIG_PHYS_64BIT /* Bank 1 declares the memory available in the DDR high region */ - gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1; + gd->bd->bi_dram[1].start = 0x880000000; gd->bd->bi_dram[1].size = 0x80000000; gd->ram_size = 0x100000000; #endif diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c index db71739..1220cd8 100644 --- a/board/ti/j721s2/evm.c +++ b/board/ti/j721s2/evm.c @@ -56,13 +56,13 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) int dram_init_banksize(void) { /* Bank 0 declares the memory available in the DDR low region */ - gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].start = 0x80000000; gd->bd->bi_dram[0].size = 0x7fffffff; gd->ram_size = 0x80000000; #ifdef CONFIG_PHYS_64BIT /* Bank 1 declares the memory available in the DDR high region */ - gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1; + gd->bd->bi_dram[1].start = 0x880000000; gd->bd->bi_dram[1].size = 0x37fffffff; gd->ram_size = 0x400000000; #endif |