Merge branch '2022-02-08-TI-platform-updates'

- J721S2 support, IPU support on DRA7, SIERRA PHY mulitlink
  configuration support, Nokia RX-51 DM_KEYBOARD conversion

6 files changed, 336 insertions, 5 deletions

diff --git a/board/nokia/rx51/rx51.c b/board/nokia/rx51/rx51.c
index 99ca36f..a526915 100644
--- a/board/nokia/rx51/rx51.c
+++ b/board/nokia/rx51/rx51.c
@@ -31,6 +31,7 @@
 #include <twl4030.h>
 #include <i2c.h>
 #include <video_fb.h>
+#include <keyboard.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
 #include <asm/setup.h>
@@ -579,10 +580,10 @@ static u8 keybuf_head;
 static u8 keybuf_tail;
 
 /*
- * Routine: rx51_kp_init
+ * Routine: rx51_kp_start
  * Description: Initialize HW keyboard.
  */
-int rx51_kp_init(void)
+static int rx51_kp_start(struct udevice *dev)
 {
 	int ret = 0;
 	u8 ctrl;
@@ -656,7 +657,7 @@ static void rx51_kp_fill(u8 k, u8 mods)
  * Routine: rx51_kp_tstc
  * Description: Test if key was pressed (from buffer).
  */
-int rx51_kp_tstc(struct stdio_dev *sdev)
+static int rx51_kp_tstc(struct udevice *dev)
 {
 	u8 c, r, dk, i;
 	u8 intr;
@@ -712,14 +713,36 @@ int rx51_kp_tstc(struct stdio_dev *sdev)
  * Routine: rx51_kp_getc
  * Description: Get last pressed key (from buffer).
  */
-int rx51_kp_getc(struct stdio_dev *sdev)
+static int rx51_kp_getc(struct udevice *dev)
 {
 	keybuf_head %= KEYBUF_SIZE;
-	while (!rx51_kp_tstc(sdev))
+	while (!rx51_kp_tstc(dev))
 		WATCHDOG_RESET();
 	return keybuf[keybuf_head++];
 }
 
+static int rx51_kp_probe(struct udevice *dev)
+{
+	struct keyboard_priv *uc_priv = dev_get_uclass_priv(dev);
+	struct stdio_dev *sdev = &uc_priv->sdev;
+
+	strcpy(sdev->name, "keyboard");
+	return input_stdio_register(sdev);
+}
+
+static const struct keyboard_ops rx51_kp_ops = {
+	.start = rx51_kp_start,
+	.tstc = rx51_kp_tstc,
+	.getc = rx51_kp_getc,
+};
+
+U_BOOT_DRIVER(rx51_kp) = {
+	.name = "rx51_kp",
+	.id = UCLASS_KEYBOARD,
+	.probe = rx51_kp_probe,
+	.ops = &rx51_kp_ops,
+};
+
 static const struct mmc_config rx51_mmc_cfg = {
 	.host_caps = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS,
 	.f_min = 400000,
@@ -753,3 +776,7 @@ U_BOOT_DRVINFOS(rx51_i2c) = {
 U_BOOT_DRVINFOS(rx51_watchdog) = {
 	{ "rx51_watchdog" },
 };
+
+U_BOOT_DRVINFOS(rx51_kp) = {
+	{ "rx51_kp" },
+};
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index 077d834..ad85b9d 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -413,6 +413,40 @@ void configure_serdes_torrent(void)
 		printf("phy_power_on failed !!\n");
 }
 
+void configure_serdes_sierra(void)
+{
+	struct udevice *dev, *lnk_dev;
+	struct phy serdes;
+	int ret, count, i;
+
+	if (!IS_ENABLED(CONFIG_PHY_CADENCE_SIERRA))
+		return;
+
+	ret = uclass_get_device_by_driver(UCLASS_PHY,
+					  DM_DRIVER_GET(sierra_phy_provider),
+					  &dev);
+	if (ret)
+		printf("Sierra init failed:%d\n", ret);
+
+	serdes.dev = dev;
+	serdes.id = 0;
+
+	count = device_get_child_count(dev);
+	for (i = 0; i < count; i++) {
+		ret = device_get_child(dev, i, &lnk_dev);
+		if (ret)
+			printf("probe of sierra child node %d failed\n", i);
+	}
+
+	ret = generic_phy_init(&serdes);
+	if (ret)
+		printf("phy_init failed!!\n");
+
+	ret = generic_phy_power_on(&serdes);
+	if (ret)
+		printf("phy_power_on failed !!\n");
+}
+
 int board_late_init(void)
 {
 	if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) {
@@ -426,6 +460,9 @@ int board_late_init(void)
 	if (board_is_j7200_som())
 		configure_serdes_torrent();
 
+	if (board_is_j721e_som())
+		configure_serdes_sierra();
+
 	return 0;
 }
 
diff --git a/board/ti/j721s2/Kconfig b/board/ti/j721s2/Kconfig
new file mode 100644
index 0000000..2e115f1
--- /dev/null
+++ b/board/ti/j721s2/Kconfig
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
+#	David Huang <d-huang@ti.com>
+
+choice
+	prompt "K3 J721S2 board"
+	optional
+
+config TARGET_J721S2_A72_EVM
+	bool "TI K3 based J721S2 EVM running on A72"
+	select ARM64
+	select SOC_K3_J721S2
+	select BOARD_LATE_INIT
+	imply TI_I2C_BOARD_DETECT
+	select SYS_DISABLE_DCACHE_OPS
+
+config TARGET_J721S2_R5_EVM
+	bool "TI K3 based J721S2 EVM running on R5"
+	select CPU_V7R
+	select SYS_THUMB_BUILD
+	select SOC_K3_J721S2
+	select K3_LOAD_SYSFW
+	select RAM
+	select SPL_RAM
+	select K3_DDRSS
+	imply SYS_K3_SPL_ATF
+	imply TI_I2C_BOARD_DETECT
+
+endchoice
+
+if TARGET_J721S2_A72_EVM
+
+config SYS_BOARD
+       default "j721s2"
+
+config SYS_VENDOR
+       default "ti"
+
+config SYS_CONFIG_NAME
+       default "j721s2_evm"
+
+source "board/ti/common/Kconfig"
+
+endif
+
+if TARGET_J721S2_R5_EVM
+
+config SYS_BOARD
+       default "j721s2"
+
+config SYS_VENDOR
+       default "ti"
+
+config SYS_CONFIG_NAME
+       default "j721s2_evm"
+
+config SPL_LDSCRIPT
+	default "arch/arm/mach-omap2/u-boot-spl.lds"
+
+source "board/ti/common/Kconfig"
+
+endif
diff --git a/board/ti/j721s2/MAINTAINERS b/board/ti/j721s2/MAINTAINERS
new file mode 100644
index 0000000..323bd23
--- /dev/null
+++ b/board/ti/j721s2/MAINTAINERS
@@ -0,0 +1,16 @@
+J721S2 BOARD
+M:	Aswath Govindraju <a-govindraju@ti.com>
+S:	Maintained
+F:	board/ti/j721s2
+F:	include/configs/j721s2_evm.h
+F:	configs/j721s2_evm_r5_defconfig
+F:	configs/j721s2_evm_a72_defconfig
+F:	arch/arm/dts/k3-j721s2.dtsi
+F:	arch/arm/dts/k3-j721s2-main.dtsi
+F:	arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
+F:	arch/arm/dts/k3-j721s2-som-p0.dtsi
+F:	arch/arm/dts/k3-j721s2-common-proc-board.dts
+F:	arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
+F:	arch/arm/dts//k3-j721s2-r5-common-proc-board.dts
+F:	arch/arm/dts/k3-j721s2-ddr.dtsi
+F:	arch/arm/dts/k3-j721s2-ddr-evm-lp4-4266.dtsi
diff --git a/board/ti/j721s2/Makefile b/board/ti/j721s2/Makefile
new file mode 100644
index 0000000..9dced12
--- /dev/null
+++ b/board/ti/j721s2/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
+#	David Huang <d-huang@ti.com>
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= evm.o
diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c
new file mode 100644
index 0000000..3c75ecf
--- /dev/null
+++ b/board/ti/j721s2/evm.c
@@ -0,0 +1,180 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Board specific initialization for J721S2 EVM
+ *
+ * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
+ *	David Huang <d-huang@ti.com>
+ *
+ */
+
+#include <common.h>
+#include <env.h>
+#include <fdt_support.h>
+#include <generic-phy.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
+#include <net.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/hardware.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <spl.h>
+#include <asm/arch/sys_proto.h>
+#include <dm.h>
+#include <dm/uclass-internal.h>
+
+#include "../common/board_detect.h"
+
+#define board_is_j721s2_som()	board_ti_k3_is("J721S2X-PM1-SOM")
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+	return 0;
+}
+
+int dram_init(void)
+{
+#ifdef CONFIG_PHYS_64BIT
+	gd->ram_size = 0x100000000;
+#else
+	gd->ram_size = 0x80000000;
+#endif
+
+	return 0;
+}
+
+ulong board_get_usable_ram_top(ulong total_size)
+{
+#ifdef CONFIG_PHYS_64BIT
+	/* Limit RAM used by U-Boot to the DDR low region */
+	if (gd->ram_top > 0x100000000)
+		return 0x100000000;
+#endif
+
+	return gd->ram_top;
+}
+
+int dram_init_banksize(void)
+{
+	/* Bank 0 declares the memory available in the DDR low region */
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = 0x7fffffff;
+	gd->ram_size = 0x80000000;
+
+#ifdef CONFIG_PHYS_64BIT
+	/* Bank 1 declares the memory available in the DDR high region */
+	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1;
+	gd->bd->bi_dram[1].size = 0x37fffffff;
+	gd->ram_size = 0x400000000;
+#endif
+
+	return 0;
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	if (!strcmp(name, "k3-j721s2-common-proc-board"))
+		return 0;
+
+	return -1;
+}
+#endif
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+	int ret;
+
+	ret = fdt_fixup_msmc_ram(blob, "/bus@100000", "sram@70000000");
+	if (ret < 0)
+		ret = fdt_fixup_msmc_ram(blob, "/interconnect@100000",
+					 "sram@70000000");
+	if (ret)
+		printf("%s: fixing up msmc ram failed %d\n", __func__, ret);
+
+	return ret;
+}
+#endif
+
+#ifdef CONFIG_TI_I2C_BOARD_DETECT
+int do_board_detect(void)
+{
+	int ret;
+
+	ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
+					 CONFIG_EEPROM_CHIP_ADDRESS);
+	if (ret)
+		pr_err("Reading on-board EEPROM at 0x%02x failed %d\n",
+		       CONFIG_EEPROM_CHIP_ADDRESS, ret);
+
+	return ret;
+}
+
+int checkboard(void)
+{
+	struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
+
+	if (do_board_detect())
+		/* EEPROM not populated */
+		printf("Board: %s rev %s\n", "J721S2X-PM1-SOM", "E1");
+	else
+		printf("Board: %s rev %s\n", ep->name, ep->version);
+
+	return 0;
+}
+
+static void setup_board_eeprom_env(void)
+{
+	char *name = "j721s2";
+
+	if (do_board_detect())
+		goto invalid_eeprom;
+
+	if (board_is_j721s2_som())
+		name = "j721s2";
+	else
+		printf("Unidentified board claims %s in eeprom header\n",
+		       board_ti_get_name());
+
+invalid_eeprom:
+	set_board_info_env_am6(name);
+}
+
+static void setup_serial(void)
+{
+	struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
+	unsigned long board_serial;
+	char *endp;
+	char serial_string[17] = { 0 };
+
+	if (env_get("serial#"))
+		return;
+
+	board_serial = simple_strtoul(ep->serial, &endp, 16);
+	if (*endp != '\0') {
+		pr_err("Error: Can't set serial# to %s\n", ep->serial);
+		return;
+	}
+
+	snprintf(serial_string, sizeof(serial_string), "%016lx", board_serial);
+	env_set("serial#", serial_string);
+}
+#endif
+
+int board_late_init(void)
+{
+	if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) {
+		setup_board_eeprom_env();
+		setup_serial();
+	}
+
+	return 0;
+}
+
+void spl_board_init(void)
+{
+}