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author | Masahisa Kojima <masahisa.kojima@linaro.org> | 2023-10-03 11:29:57 +0900 |
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committer | Tom Rini <trini@konsulko.com> | 2023-10-11 10:35:24 -0400 |
commit | 357f4fb0bdc5ca1e6e881638b7089444f07b99d3 (patch) | |
tree | afccf1685335fb01dea508570e1c636af67bfe59 /board | |
parent | 2d307fb9ed2065cc1596a3c4263e55d1cae6799d (diff) | |
download | u-boot-357f4fb0bdc5ca1e6e881638b7089444f07b99d3.zip u-boot-357f4fb0bdc5ca1e6e881638b7089444f07b99d3.tar.gz u-boot-357f4fb0bdc5ca1e6e881638b7089444f07b99d3.tar.bz2 |
board: synquacer: set actual gd->ram_top and gd->ram_size
Current gd->ram_size and gd->ram_top reflect only the
first DRAM bank even if the SynQuacer Developerbox could
have up to three DRAM banks.
With the commit 06d514d77c37 ("lmb: consider EFI memory map"),
the first DRAM bank indicates <4GB address, so whole >4GB memory
is marked as EFI_BOOT_SERVICES_DATA and it results that
U-Boot can not access >4GB memory.
Since 64-bits DRAM address is fully available on the SynQuacer
Developerbox, let's set the installed DIMM information to
gd->ram_top and gd->ram_size.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Diffstat (limited to 'board')
-rw-r--r-- | board/socionext/developerbox/developerbox.c | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/board/socionext/developerbox/developerbox.c b/board/socionext/developerbox/developerbox.c index 204e5a4..9585944 100644 --- a/board/socionext/developerbox/developerbox.c +++ b/board/socionext/developerbox/developerbox.c @@ -145,13 +145,27 @@ int dram_init(void) { struct draminfo *synquacer_draminfo = (void *)SQ_DRAMINFO_BASE; struct draminfo_entry *ent = synquacer_draminfo->entry; + unsigned long size = 0; + int i; + + for (i = 0; i < synquacer_draminfo->nr_regions; i++) + size += ent[i].size; - gd->ram_size = ent[0].size; + gd->ram_size = size; gd->ram_base = ent[0].base; return 0; } +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) +{ + struct draminfo *synquacer_draminfo = (void *)SQ_DRAMINFO_BASE; + struct draminfo_entry *ent = synquacer_draminfo->entry; + + return ent[synquacer_draminfo->nr_regions - 1].base + + ent[synquacer_draminfo->nr_regions - 1].size; +} + int dram_init_banksize(void) { struct draminfo *synquacer_draminfo = (void *)SQ_DRAMINFO_BASE; |