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author | Camelia Groza <camelia.groza@nxp.com> | 2022-07-28 17:28:11 +0300 |
---|---|---|
committer | Peng Fan <peng.fan@nxp.com> | 2022-08-16 17:07:33 +0800 |
commit | dfea459f20133c89d666f3778e551b50c7e966f0 (patch) | |
tree | 655abd75a777a938e5156a97d8a1b9adc3d58ffb /board | |
parent | 47465877a5b9d6dbc3a068faf24551e2cb3a4911 (diff) | |
download | u-boot-dfea459f20133c89d666f3778e551b50c7e966f0.zip u-boot-dfea459f20133c89d666f3778e551b50c7e966f0.tar.gz u-boot-dfea459f20133c89d666f3778e551b50c7e966f0.tar.bz2 |
board: ls1043ardb: fdt fixups for revision v7.0 boards
The LS1043ARDB rev v7.0 board replaces the AQR105 PHY on MAC9 with an
AQR113C PHY. The address of the PHY on the MDIO bus changes from 0x1 to
0x8. Enable CONFIG_OF_BOARD_FIXUP and update both u-boot and Linux device
trees to reflect this change.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Diffstat (limited to 'board')
-rw-r--r-- | board/freescale/ls1043ardb/ls1043ardb.c | 44 |
1 files changed, 43 insertions, 1 deletions
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c index 002869f..f388eb4 100644 --- a/board/freescale/ls1043ardb/ls1043ardb.c +++ b/board/freescale/ls1043ardb/ls1043ardb.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2015 Freescale Semiconductor, Inc. - * Copyright 2021 NXP + * Copyright 2021-2022 NXP */ #include <common.h> @@ -272,6 +272,39 @@ void fdt_del_qe(void *blob) } } +/* Update the address of the Aquantia PHY on the MDIO bus for boards revision + * v7.0 and up. Also rename the PHY node to align with the address change. + */ +void fdt_fixup_phy_addr(void *blob) +{ + const char phy_path[] = + "/soc/fman@1a00000/mdio@fd000/ethernet-phy@1"; + int ret, offset, new_addr = AQR113C_PHY_ADDR; + char new_name[] = "ethernet-phy@00"; + + if (CPLD_READ(pcba_ver) < 0x7) + return; + + offset = fdt_path_offset(blob, phy_path); + if (offset < 0) { + printf("ethernet-phy@1 node not found in the dts\n"); + return; + } + + ret = fdt_setprop_u32(blob, offset, "reg", new_addr); + if (ret < 0) { + printf("Unable to set 'reg' for node ethernet-phy@1: %s\n", + fdt_strerror(ret)); + return; + } + + sprintf(new_name, "ethernet-phy@%x", new_addr); + ret = fdt_set_name(blob, offset, new_name); + if (ret < 0) + printf("Unable to rename node ethernet-phy@1: %s\n", + fdt_strerror(ret)); +} + int ft_board_setup(void *blob, struct bd_info *bd) { u64 base[CONFIG_NR_DRAM_BANKS]; @@ -290,6 +323,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) #ifndef CONFIG_DM_ETH fdt_fixup_fman_ethernet(blob); #endif + fdt_fixup_phy_addr(blob); #endif fdt_fixup_icid(blob); @@ -313,6 +347,14 @@ int ft_board_setup(void *blob, struct bd_info *bd) return 0; } +#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP) +int board_fix_fdt(void *blob) +{ + fdt_fixup_phy_addr(blob); + return 0; +} +#endif + u8 flash_read8(void *addr) { return __raw_readb(addr + 1); |