arm: Remove overo board

OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Drop it.

Cc: Ash Charles <ash@gumstix.com>
Cc: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

12 files changed, 0 insertions, 1529 deletions

diff --git a/board/gumstix/duovero/Kconfig b/board/gumstix/duovero/Kconfig
deleted file mode 100644
index 2f8558a..0000000
--- a/board/gumstix/duovero/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_DUOVERO
-
-config SYS_BOARD
-	default "duovero"
-
-config SYS_VENDOR
-	default "gumstix"
-
-config SYS_CONFIG_NAME
-	default "duovero"
-
-endif
diff --git a/board/gumstix/duovero/MAINTAINERS b/board/gumstix/duovero/MAINTAINERS
deleted file mode 100644
index 87cd4e6..0000000
--- a/board/gumstix/duovero/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-DUOVERO BOARD
-M:	Ash Charles <ash@gumstix.com>
-S:	Maintained
-F:	board/gumstix/duovero/
-F:	include/configs/duovero.h
-F:	configs/duovero_defconfig
diff --git a/board/gumstix/duovero/Makefile b/board/gumstix/duovero/Makefile
deleted file mode 100644
index d6eff47..0000000
--- a/board/gumstix/duovero/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2000, 2001, 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-
-obj-y	:= duovero.o
diff --git a/board/gumstix/duovero/duovero.c b/board/gumstix/duovero/duovero.c
deleted file mode 100644
index 0df03a5..0000000
--- a/board/gumstix/duovero/duovero.c
+++ /dev/null
@@ -1,273 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2013
- * Gumstix Inc. <www.gumstix.com>
- * Maintainer: Ash Charles  <ash@gumstix.com>
- */
-#include <common.h>
-#include <init.h>
-#include <net.h>
-#include <netdev.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/mmc_host_def.h>
-#include <twl6030.h>
-#include <asm/emif.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/gpio.h>
-#include <asm/gpio.h>
-#include <asm/mach-types.h>
-#include <linux/delay.h>
-
-#include "duovero_mux_data.h"
-
-#define WIFI_EN	43
-
-#if defined(CONFIG_CMD_NET)
-#define SMSC_NRESET	45
-static void setup_net_chip(void);
-#endif
-
-#ifdef CONFIG_USB_EHCI_HCD
-#include <usb.h>
-#include <asm/arch/ehci.h>
-#include <asm/ehci-omap.h>
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-const struct omap_sysinfo sysinfo = {
-	"Board: duovero\n"
-};
-
-struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000;
-
-/**
- * @brief board_init
- *
- * @return 0
- */
-int board_init(void)
-{
-	gpmc_init();
-
-	gd->bd->bi_arch_number = MACH_TYPE_DUOVERO;
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
-	return 0;
-}
-
-/**
- * @brief misc_init_r - Configure board specific configurations
- * such as power configurations, ethernet initialization as phase2 of
- * boot sequence
- *
- * @return 0
- */
-int misc_init_r(void)
-{
-	int ret = 0;
-	u8 val;
-
-	/* wifi setup: first enable 32Khz clock from 6030 pmic */
-	val = 0xe1;
-	ret = i2c_write(TWL6030_CHIP_PM, 0xbe, 1, &val, 1);
-	if (ret)
-		printf("Failed to enable 32Khz clock to wifi module\n");
-
-	/* then setup WIFI_EN as an output pin and send reset pulse */
-	if (!gpio_request(WIFI_EN, "")) {
-		gpio_direction_output(WIFI_EN, 0);
-		gpio_set_value(WIFI_EN, 1);
-		udelay(1);
-		gpio_set_value(WIFI_EN, 0);
-		udelay(1);
-		gpio_set_value(WIFI_EN, 1);
-	}
-
-#if defined(CONFIG_CMD_NET)
-	setup_net_chip();
-#endif
-	return 0;
-}
-
-void set_muxconf_regs(void)
-{
-	do_set_mux((*ctrl)->control_padconf_core_base,
-		   core_padconf_array_essential,
-		   sizeof(core_padconf_array_essential) /
-		   sizeof(struct pad_conf_entry));
-
-	do_set_mux((*ctrl)->control_padconf_wkup_base,
-		   wkup_padconf_array_essential,
-		   sizeof(wkup_padconf_array_essential) /
-		   sizeof(struct pad_conf_entry));
-
-	do_set_mux((*ctrl)->control_padconf_core_base,
-		   core_padconf_array_non_essential,
-		   sizeof(core_padconf_array_non_essential) /
-		   sizeof(struct pad_conf_entry));
-
-	do_set_mux((*ctrl)->control_padconf_wkup_base,
-		   wkup_padconf_array_non_essential,
-		   sizeof(wkup_padconf_array_non_essential) /
-		   sizeof(struct pad_conf_entry));
-}
-
-#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
-{
-	return omap_mmc_init(0, 0, 0, -1, -1);
-}
-
-#if !defined(CONFIG_SPL_BUILD)
-void board_mmc_power_init(void)
-{
-	twl6030_power_mmc_init(0);
-}
-#endif
-#endif
-
-#if defined(CONFIG_CMD_NET)
-
-#define GPMC_SIZE_16M	0xF
-#define GPMC_BASEADDR_MASK	0x3F
-#define GPMC_CS_ENABLE		0x1
-
-static void enable_gpmc_net_config(const u32 *gpmc_config, const struct gpmc_cs *cs,
-		u32 base, u32 size)
-{
-	writel(0, &cs->config7);
-	sdelay(1000);
-	/* Delay for settling */
-	writel(gpmc_config[0], &cs->config1);
-	writel(gpmc_config[1], &cs->config2);
-	writel(gpmc_config[2], &cs->config3);
-	writel(gpmc_config[3], &cs->config4);
-	writel(gpmc_config[4], &cs->config5);
-	writel(gpmc_config[5], &cs->config6);
-
-	/*
-	 * Enable the config.  size is the CS size and goes in
-	 * bits 11:8.  We set bit 6 to enable this CS and the base
-	 * address goes into bits 5:0.
-	 */
-	writel((size << 8) | (GPMC_CS_ENABLE << 6) |
-				 ((base >> 24) & GPMC_BASEADDR_MASK),
-				 &cs->config7);
-
-	sdelay(2000);
-}
-
-/* GPMC CS configuration for an SMSC LAN9221 ethernet controller */
-#define NET_LAN9221_GPMC_CONFIG1    0x2a001203
-#define NET_LAN9221_GPMC_CONFIG2    0x000a0a02
-#define NET_LAN9221_GPMC_CONFIG3    0x00020200
-#define NET_LAN9221_GPMC_CONFIG4    0x0a030a03
-#define NET_LAN9221_GPMC_CONFIG5    0x000a0a0a
-#define NET_LAN9221_GPMC_CONFIG6    0x8a070707
-#define NET_LAN9221_GPMC_CONFIG7    0x00000f6c
-
-/* GPMC definitions for LAN9221 chips on expansion boards */
-static const u32 gpmc_lan_config[] = {
-	NET_LAN9221_GPMC_CONFIG1,
-	NET_LAN9221_GPMC_CONFIG2,
-	NET_LAN9221_GPMC_CONFIG3,
-	NET_LAN9221_GPMC_CONFIG4,
-	NET_LAN9221_GPMC_CONFIG5,
-	NET_LAN9221_GPMC_CONFIG6,
-	/*CONFIG7- computed as params */
-};
-
-/*
- * Routine: setup_net_chip
- * Description: Setting up the configuration GPMC registers specific to the
- *	      Ethernet hardware.
- */
-static void setup_net_chip(void)
-{
-	enable_gpmc_net_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000,
-			      GPMC_SIZE_16M);
-
-	/* Make GPIO SMSC_NRESET as output pin and send reset pulse */
-	if (!gpio_request(SMSC_NRESET, "")) {
-		gpio_direction_output(SMSC_NRESET, 0);
-		gpio_set_value(SMSC_NRESET, 1);
-		udelay(1);
-		gpio_set_value(SMSC_NRESET, 0);
-		udelay(1);
-		gpio_set_value(SMSC_NRESET, 1);
-	}
-}
-#endif
-
-int board_eth_init(bd_t *bis)
-{
-	int rc = 0;
-#ifdef CONFIG_SMC911X
-	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
-#endif
-	return rc;
-}
-
-#ifdef CONFIG_USB_EHCI_HCD
-
-static struct omap_usbhs_board_data usbhs_bdata = {
-	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
-	.port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
-	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
-};
-
-int ehci_hcd_init(int index, enum usb_init_type init,
-		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
-{
-	int ret;
-	unsigned int utmi_clk;
-	u32 auxclk, altclksrc;
-
-	/* Now we can enable our port clocks */
-	utmi_clk = readl((void *)CM_L3INIT_HSUSBHOST_CLKCTRL);
-	utmi_clk |= HSUSBHOST_CLKCTRL_CLKSEL_UTMI_P1_MASK;
-	setbits_le32((void *)CM_L3INIT_HSUSBHOST_CLKCTRL, utmi_clk);
-
-	auxclk = readl(&scrm->auxclk3);
-	/* Select sys_clk */
-	auxclk &= ~AUXCLK_SRCSELECT_MASK;
-	auxclk |=  AUXCLK_SRCSELECT_SYS_CLK << AUXCLK_SRCSELECT_SHIFT;
-	/* Set the divisor to 2 */
-	auxclk &= ~AUXCLK_CLKDIV_MASK;
-	auxclk |= AUXCLK_CLKDIV_2 << AUXCLK_CLKDIV_SHIFT;
-	/* Request auxilary clock #3 */
-	auxclk |= AUXCLK_ENABLE_MASK;
-	writel(auxclk, &scrm->auxclk3);
-
-	altclksrc = readl(&scrm->altclksrc);
-
-	/* Activate alternate system clock supplier */
-	altclksrc &= ~ALTCLKSRC_MODE_MASK;
-	altclksrc |= ALTCLKSRC_MODE_ACTIVE;
-
-	/* enable clocks */
-	altclksrc |= ALTCLKSRC_ENABLE_INT_MASK | ALTCLKSRC_ENABLE_EXT_MASK;
-
-	writel(altclksrc, &scrm->altclksrc);
-
-	ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
-	if (ret < 0)
-		return ret;
-
-	return 0;
-}
-
-int ehci_hcd_stop(int index)
-{
-	return omap_ehci_hcd_stop();
-}
-#endif
-
-/*
- * get_board_rev() - get board revision
- */
-u32 get_board_rev(void)
-{
-	return 0x20;
-}
diff --git a/board/gumstix/duovero/duovero_mux_data.h b/board/gumstix/duovero/duovero_mux_data.h
deleted file mode 100644
index b56bffe..0000000
--- a/board/gumstix/duovero/duovero_mux_data.h
+++ /dev/null
@@ -1,198 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2012
- * Gumstix Incorporated, <www.gumstix.com>
- * Maintainer: Ash Charles <ash@gumstix.com>
- */
-#ifndef _DUOVERO_MUX_DATA_H_
-#define _DUOVERO_MUX_DATA_H_
-
-#include <asm/arch/mux_omap4.h>
-
-const struct pad_conf_entry core_padconf_array_essential[] = {
-	{SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)},	 /* sdmmc1_clk */
-	{SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */
-	{SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */
-	{SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */
-	{SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */
-	{SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */
-	{I2C1_SCL, (PTU | IEN | M0)},				/* i2c1_scl */
-	{I2C1_SDA, (PTU | IEN | M0)},				/* i2c1_sda */
-	{I2C2_SCL, (PTU | IEN | M0)},				/* i2c2_scl */
-	{I2C2_SDA, (PTU | IEN | M0)},				/* i2c2_sda */
-	{I2C3_SCL, (PTU | IEN | M0)},				/* i2c3_scl */
-	{I2C3_SDA, (PTU | IEN | M0)},				/* i2c3_sda */
-	{I2C4_SCL, (PTU | IEN | M0)},				/* i2c4_scl */
-	{I2C4_SDA, (PTU | IEN | M0)},				/* i2c4_sda */
-	{UART3_CTS_RCTX, (PTU | IEN | M0)},			/* uart3_tx */
-	{UART3_RTS_SD, (M0)},					/* uart3_rts_sd */
-	{UART3_RX_IRRX, (PTU | IEN | M0)},			/* uart3_rx */
-	{UART3_TX_IRTX, (M0)}					/* uart3_tx */
-};
-
-const struct pad_conf_entry wkup_padconf_array_essential[] = {
-	{PAD1_SR_SCL, (PTU | IEN | M0)},			/* sr_scl */
-	{PAD0_SR_SDA, (PTU | IEN | M0)},			/* sr_sda */
-	{PAD1_SYS_32K, (IEN | M0)}				/* sys_32k */
-};
-
-const struct pad_conf_entry core_padconf_array_non_essential[] = {
-	{GPMC_AD0, (PTU | IEN | M0)},				/* gpmc_ad0 */
-	{GPMC_AD1, (PTU | IEN | M0)},				/* gpmc_ad1 */
-	{GPMC_AD2, (PTU | IEN | M0)},				/* gpmc_ad2 */
-	{GPMC_AD3, (PTU | IEN | M0)},				/* gpmc_ad3 */
-	{GPMC_AD4, (PTU | IEN | M0)},				/* gpmc_ad4 */
-	{GPMC_AD5, (PTU | IEN | M0)},				/* gpmc_ad5 */
-	{GPMC_AD6, (PTU | IEN | M0)},				/* gpmc_ad6 */
-	{GPMC_AD7, (PTU | IEN | M0)},				/* gpmc_ad7 */
-	{GPMC_AD8, (PTU | IEN | M0)},				/* gpmc_ad8 */
-	{GPMC_AD9, (PTU | IEN | M0)},				/* gpmc_ad9 */
-	{GPMC_AD10, (PTU | IEN | M0)},				/* gpmc_ad10 */
-	{GPMC_AD11, (PTU | IEN | M0)},				/* gpmc_ad11 */
-	{GPMC_AD12, (PTU | IEN | M0)},				/* gpmc_ad12 */
-	{GPMC_AD13, (PTU | IEN | M0)},				/* gpmc_ad13 */
-	{GPMC_AD14, (PTU | IEN | M0)},				/* gpmc_ad14 */
-	{GPMC_AD15, (PTU | IEN | M0)},				/* gpmc_ad15 */
-	{GPMC_A16, (PTU | IEN | M3)},				/* gpio_40 */
-	{GPMC_A17, (PTU | IEN | M3)},				/* gpio_41 - hdmi_ls_oe */
-	{GPMC_A18, (PTU | IEN | M3)},				/* gpio_42 */
-	{GPMC_A19, (PTU | IEN | M3)},				/* gpio_43 - wifi_en */
-	{GPMC_A20, (PTU | IEN | M3)},				/* gpio_44 - eth_irq */
-	{GPMC_A21, (PTU | IEN | M3)},				/* gpio_45 - eth_nreset */
-	{GPMC_A22, (PTU | IEN | M3)},				/* gpio_46 - eth_pme */
-	{GPMC_A23, (PTU | IEN | M3)},				/* gpio_47 */
-	{GPMC_A24, (PTU | IEN | M3)},				/* gpio_48 - eth_mdix */
-	{GPMC_A25, (PTU | IEN | M3)},				/* gpio_49 - bt_wakeup */
-	{GPMC_NCS0, (PTU | M0)},				/* gpmc_ncs0 */
-	{GPMC_NCS1, (PTU | M0)},				/* gpmc_ncs1 */
-	{GPMC_NCS2, (PTU | M0)},				/* gpmc_ncs2 */
-	{GPMC_NCS3, (PTU | IEN | M3)},				/* gpio_53  */
-	{C2C_DATA12, (PTU | M0)},				/* gpmc_ncs4 */
-	{C2C_DATA13, (PTU | M0)},				/* gpmc_ncs5 - eth_cs */
-	{GPMC_NWP, (PTU | IEN | M0)},				/* gpmc_nwp */
-	{GPMC_CLK, (PTU | IEN | M0)},				/* gpmc_clk */
-	{GPMC_NADV_ALE, (PTU | M0)},				/* gpmc_nadv_ale */
-	{GPMC_NBE0_CLE, (PTU | M0)},				/* gpmc_nbe0_cle */
-	{GPMC_NBE1, (PTU | M0)},				/* gpmc_nbe1 */
-	{GPMC_WAIT0, (PTU | IEN | M0)},				/* gpmc_wait0 */
-	{GPMC_WAIT1,  (PTU | IEN | M0)},			/* gpio_62 - usbh_nreset */
-	{GPMC_NOE, (PTU | M0)},					/* gpmc_noe */
-	{GPMC_NWE, (PTU | M0)},					/* gpmc_nwe */
-	{HDMI_HPD, (PTD | IEN | M3)},				/* gpio_63 - hdmi_hpd */
-	{HDMI_CEC, (PTU | IEN | M0)},				/* hdmi_cec */
-	{HDMI_DDC_SCL, (M0)},					/* hdmi_ddc_scl */
-	{HDMI_DDC_SDA, (IEN | M0)},				/* hdmi_ddc_sda */
-	{CSI21_DX0, (IEN | M0)},				/* csi21_dx0 */
-	{CSI21_DY0, (IEN | M0)},				/* csi21_dy0 */
-	{CSI21_DX1, (IEN | M0)},				/* csi21_dx1 */
-	{CSI21_DY1, (IEN | M0)},				/* csi21_dy1 */
-	{CSI21_DX2, (IEN | M0)},				/* csi21_dx2 */
-	{CSI21_DY2, (IEN | M0)},				/* csi21_dy2 */
-	{CSI21_DX3, (IEN | M0)},				/* csi21_dx3 */
-	{CSI21_DY3, (IEN | M0)},				/* csi21_dy3 */
-	{CSI21_DX4, (IEN | M0)},				/* csi21_dx4 */
-	{CSI21_DY4, (IEN | M0)},				/* csi21_dy4 */
-	{CSI22_DX0, (IEN | M0)},				/* csi22_dx0 */
-	{CSI22_DY0, (IEN | M0)},				/* csi22_dy0 */
-	{CSI22_DX1, (IEN | M0)},				/* csi22_dx1 */
-	{CSI22_DY1, (IEN | M0)},				/* csi22_dy1 */
-	{USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */
-	{USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)},		/* usbb1_ulpiphy_stp */
-	{USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dir */
-	{USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_nxt */
-	{USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat0 */
-	{USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat1 */
-	{USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat2 */
-	{USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat3 */
-	{USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat4 */
-	{USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat5 */
-	{USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat6 */
-	{USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat7 */
-	{USBB1_HSIC_DATA, (PTU | IEN | M3)},				/* gpio_96 - usbh_cpen */
-	{USBB1_HSIC_STROBE, (PTU | IEN | M3)},				/* gpio_97 - usbh_reset */
-	{ABE_MCBSP2_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_mcbsp2_clkx */
-	{ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)},		/* abe_mcbsp2_dr */
-	{ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)},			/* abe_mcbsp2_dx */
-	{ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_mcbsp2_fsx */
-	{ABE_PDM_UL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_pdm_ul_data */
-	{ABE_PDM_DL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_pdm_dl_data */
-	{ABE_PDM_FRAME, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_pdm_frame */
-	{ABE_PDM_LB_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_pdm_lb_clk */
-	{ABE_CLKS, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_clks */
-	{ABE_DMIC_CLK1, (M0)},						/* abe_dmic_clk1 */
-	{ABE_DMIC_DIN1, (IEN | M0)},					/* abe_dmic_din1 */
-	{ABE_DMIC_DIN2, (IEN | M0)},					/* abe_dmic_din2 */
-	{ABE_DMIC_DIN3, (IEN | M0)},					/* abe_dmic_din3 */
-	{UART2_CTS, (PTU | IEN | M0)},					/* uart2_cts */
-	{UART2_RTS, (M0)},						/* uart2_rts */
-	{UART2_RX, (PTU | IEN | M0)},					/* uart2_rx */
-	{UART2_TX, (M0)},						/* uart2_tx */
-	{HDQ_SIO, (M0)},						/* hdq-sio */
-	{MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi1_clk */
-	{MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi1_somi */
-	{MCSPI1_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi1_simo */
-	{MCSPI1_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* mcspi1_cs0 */
-	{MCSPI1_CS1, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* mcspi1_cs1 */
-	{SDMMC5_CLK, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_clk */
-	{SDMMC5_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_cmd */
-	{SDMMC5_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_dat0 */
-	{SDMMC5_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_dat1 */
-	{SDMMC5_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_dat2 */
-	{SDMMC5_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_dat3 */
-	{MCSPI4_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi4_clk */
-	{MCSPI4_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi4_simo */
-	{MCSPI4_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi4_somi */
-	{MCSPI4_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* mcspi4_cs0 */
-	{UART4_RX, (IEN | PTU | M0)},					/* uart4_rx */
-	{UART4_TX, (M0)},						/* uart4_tx */
-	{USBB2_ULPITLL_CLK, (PTU | IEN | M3)},				/* gpio_157 - start_adc */
-	{USBB2_ULPITLL_STP, (PTU | IEN | M3)},				/* gpio_158 - spi_nirq */
-	{USBB2_ULPITLL_DIR, (PTU | IEN | M3)},				/* gpio_159 - bt_nreset */
-	{USBB2_ULPITLL_NXT, (PTU | IEN | M3)},				/* gpio_160 - audio_pwron*/
-	{USBB2_ULPITLL_DAT0, (PTU | IEN | M3)},				/* gpio_161 - bid_0 */
-	{USBB2_ULPITLL_DAT1, (PTU | IEN | M3)},				/* gpio_162 - bid_1 */
-	{USBB2_ULPITLL_DAT2, (PTU | IEN | M3)},				/* gpio_163 - bid_2 */
-	{USBB2_ULPITLL_DAT3, (PTU | IEN | M3)},				/* gpio_164 - bid_3 */
-	{USBB2_ULPITLL_DAT4, (PTU | IEN | M3)},				/* gpio_165 - bid_4 */
-	{USBB2_ULPITLL_DAT5, (PTU | IEN | M3)},				/* gpio_166 - ts_irq*/
-	{USBB2_ULPITLL_DAT6, (PTU | IEN | M3)},				/* gpio_167 - gps_pps */
-	{USBB2_ULPITLL_DAT7, (PTU | IEN | M3)},				/* gpio_168 */
-	{USBB2_HSIC_DATA, (PTU | IEN | M3)},				/* gpio_169 */
-	{USBB2_HSIC_STROBE, (PTU | IEN | M3)},				/* gpio_170 */
-	{UNIPRO_TX1, (PTU | IEN | M3)},					/* gpio_173 */
-	{USBA0_OTG_CE, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M0)},	/* usba0_otg_ce */
-	{USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* usba0_otg_dp */
-	{USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* usba0_otg_dm */
-	{SYS_NIRQ1, (PTU | IEN | M0)},					/* sys_nirq1 */
-	{SYS_NIRQ2, (PTU | IEN | M0)},					/* sys_nirq2 */
-	{SYS_BOOT0, (M0)},						/* sys_boot0 */
-	{SYS_BOOT1, (M0)},						/* sys_boot1 */
-	{SYS_BOOT2, (M0)},						/* sys_boot2 */
-	{SYS_BOOT3, (M0)},						/* sys_boot3 */
-	{SYS_BOOT4, (M0)},						/* sys_boot4 */
-	{SYS_BOOT5, (M0)},						/* sys_boot5 */
-	{DPM_EMU0, (IEN | M0)},						/* dpm_emu0 */
-	{DPM_EMU1, (IEN | M0)},						/* dpm_emu1 */
-	{DPM_EMU16, (PTU | IEN | M3)},					/* gpio_27 */
-	{DPM_EMU17, (PTU | IEN | M3)},					/* gpio_28 */
-	{DPM_EMU18, (PTU | IEN | M3)},					/* gpio_29 */
-	{DPM_EMU19, (PTU | IEN | M3)},					/* gpio_30 */
-};
-
-const struct pad_conf_entry wkup_padconf_array_non_essential[] = {
-	{PAD1_FREF_XTAL_IN, (M0)},					/* fref_xtal_in  */
-	{PAD0_FREF_SLICER_IN, (M0)},					/* fref_slicer_in */
-	{PAD1_FREF_CLK_IOREQ, (M0)},					/* fref_clk_ioreq */
-	{PAD0_FREF_CLK0_OUT, (M7)},					/* safe mode */
-	{PAD1_FREF_CLK3_REQ, M7},					/* safe mode */
-	{PAD0_FREF_CLK3_OUT, (M0)},					/* fref_clk3_out */
-	{PAD0_SYS_NRESPWRON, (M0)},					/* sys_nrespwron */
-	{PAD1_SYS_NRESWARM, (M0)},					/* sys_nreswarm */
-	{PAD0_SYS_PWR_REQ, (PTU | M0)},					/* sys_pwr_req */
-	{PAD1_SYS_PWRON_RESET, (M3)},					/* gpio_wk29 */
-	{PAD0_SYS_BOOT6, (M0)},						/* sys_boot6 */
-	{PAD1_SYS_BOOT7, (M0)},						/* sys_boot7 */
-};
-
-
-#endif /* _DUOVERO_MUX_DATA_H_ */
diff --git a/board/overo/Kconfig b/board/overo/Kconfig
deleted file mode 100644
index 74572a6..0000000
--- a/board/overo/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_OMAP3_OVERO
-
-config SYS_BOARD
-	default "overo"
-
-config SYS_CONFIG_NAME
-	default "omap3_overo"
-
-endif
diff --git a/board/overo/MAINTAINERS b/board/overo/MAINTAINERS
deleted file mode 100644
index 8f089e8..0000000
--- a/board/overo/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-OVERO BOARD
-M:	Steve Sakoman <sakoman@gmail.com>
-S:	Maintained
-F:	board/overo/
-F:	include/configs/omap3_overo.h
-F:	configs/omap3_overo_defconfig
diff --git a/board/overo/Makefile b/board/overo/Makefile
deleted file mode 100644
index b62bab9..0000000
--- a/board/overo/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2000, 2001, 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-
-ifdef CONFIG_SPL_BUILD
-obj-y	:= spl.o common.o
-else
-obj-y	:= overo.o common.o
-endif
diff --git a/board/overo/common.c b/board/overo/common.c
deleted file mode 100644
index 67823e6..0000000
--- a/board/overo/common.c
+++ /dev/null
@@ -1,368 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Maintainer : Steve Sakoman <steve@sakoman.com>
- *
- * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
- *      Richard Woodruff <r-woodruff2@ti.com>
- *      Syed Mohammed Khasim <khasim@ti.com>
- *      Sunil Kumar <sunilsaini05@gmail.com>
- *      Shashi Ranjan <shashiranjanmca05@gmail.com>
- *
- * (C) Copyright 2004-2008
- * Texas Instruments, <www.ti.com>
- */
-#include <serial.h>
-#include <twl4030.h>
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/mux.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/gpio.h>
-#include <asm/omap_mmc.h>
-#include <asm/mach-types.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define TWL4030_I2C_BUS                 0
-
-/*
- * Routine: board_init
- * Description: Early hardware init.
- */
-int board_init(void)
-{
-	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
-	/* board id for Linux */
-	gd->bd->bi_arch_number = MACH_TYPE_OVERO;
-	/* boot param addr */
-	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
-
-	return 0;
-}
-
-#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
-{
-	return omap_mmc_init(0, 0, 0, -1, -1);
-}
-#endif
-
-#if defined(CONFIG_MMC)
-void board_mmc_power_init(void)
-{
-	twl4030_power_mmc_init(0);
-}
-#endif
-
-#if defined(CONFIG_SPL_OS_BOOT)
-int spl_start_uboot(void)
-{
-	/* break into full u-boot on 'c' */
-	if (serial_tstc() && serial_getc() == 'c')
-		return 1;
-
-	return 0;
-}
-#endif /* CONFIG_SPL_OS_BOOT */
-
-#define MUX_OVERO() \
- /*SDRC*/\
-	MUX_VAL(CP(SDRC_D0),		(IEN  | PTD | DIS | M0)) /*SDRC_D0*/\
-	MUX_VAL(CP(SDRC_D1),		(IEN  | PTD | DIS | M0)) /*SDRC_D1*/\
-	MUX_VAL(CP(SDRC_D2),		(IEN  | PTD | DIS | M0)) /*SDRC_D2*/\
-	MUX_VAL(CP(SDRC_D3),		(IEN  | PTD | DIS | M0)) /*SDRC_D3*/\
-	MUX_VAL(CP(SDRC_D4),		(IEN  | PTD | DIS | M0)) /*SDRC_D4*/\
-	MUX_VAL(CP(SDRC_D5),		(IEN  | PTD | DIS | M0)) /*SDRC_D5*/\
-	MUX_VAL(CP(SDRC_D6),		(IEN  | PTD | DIS | M0)) /*SDRC_D6*/\
-	MUX_VAL(CP(SDRC_D7),		(IEN  | PTD | DIS | M0)) /*SDRC_D7*/\
-	MUX_VAL(CP(SDRC_D8),		(IEN  | PTD | DIS | M0)) /*SDRC_D8*/\
-	MUX_VAL(CP(SDRC_D9),		(IEN  | PTD | DIS | M0)) /*SDRC_D9*/\
-	MUX_VAL(CP(SDRC_D10),		(IEN  | PTD | DIS | M0)) /*SDRC_D10*/\
-	MUX_VAL(CP(SDRC_D11),		(IEN  | PTD | DIS | M0)) /*SDRC_D11*/\
-	MUX_VAL(CP(SDRC_D12),		(IEN  | PTD | DIS | M0)) /*SDRC_D12*/\
-	MUX_VAL(CP(SDRC_D13),		(IEN  | PTD | DIS | M0)) /*SDRC_D13*/\
-	MUX_VAL(CP(SDRC_D14),		(IEN  | PTD | DIS | M0)) /*SDRC_D14*/\
-	MUX_VAL(CP(SDRC_D15),		(IEN  | PTD | DIS | M0)) /*SDRC_D15*/\
-	MUX_VAL(CP(SDRC_D16),		(IEN  | PTD | DIS | M0)) /*SDRC_D16*/\
-	MUX_VAL(CP(SDRC_D17),		(IEN  | PTD | DIS | M0)) /*SDRC_D17*/\
-	MUX_VAL(CP(SDRC_D18),		(IEN  | PTD | DIS | M0)) /*SDRC_D18*/\
-	MUX_VAL(CP(SDRC_D19),		(IEN  | PTD | DIS | M0)) /*SDRC_D19*/\
-	MUX_VAL(CP(SDRC_D20),		(IEN  | PTD | DIS | M0)) /*SDRC_D20*/\
-	MUX_VAL(CP(SDRC_D21),		(IEN  | PTD | DIS | M0)) /*SDRC_D21*/\
-	MUX_VAL(CP(SDRC_D22),		(IEN  | PTD | DIS | M0)) /*SDRC_D22*/\
-	MUX_VAL(CP(SDRC_D23),		(IEN  | PTD | DIS | M0)) /*SDRC_D23*/\
-	MUX_VAL(CP(SDRC_D24),		(IEN  | PTD | DIS | M0)) /*SDRC_D24*/\
-	MUX_VAL(CP(SDRC_D25),		(IEN  | PTD | DIS | M0)) /*SDRC_D25*/\
-	MUX_VAL(CP(SDRC_D26),		(IEN  | PTD | DIS | M0)) /*SDRC_D26*/\
-	MUX_VAL(CP(SDRC_D27),		(IEN  | PTD | DIS | M0)) /*SDRC_D27*/\
-	MUX_VAL(CP(SDRC_D28),		(IEN  | PTD | DIS | M0)) /*SDRC_D28*/\
-	MUX_VAL(CP(SDRC_D29),		(IEN  | PTD | DIS | M0)) /*SDRC_D29*/\
-	MUX_VAL(CP(SDRC_D30),		(IEN  | PTD | DIS | M0)) /*SDRC_D30*/\
-	MUX_VAL(CP(SDRC_D31),		(IEN  | PTD | DIS | M0)) /*SDRC_D31*/\
-	MUX_VAL(CP(SDRC_CLK),		(IEN  | PTD | DIS | M0)) /*SDRC_CLK*/\
-	MUX_VAL(CP(SDRC_DQS0),		(IEN  | PTD | DIS | M0)) /*SDRC_DQS0*/\
-	MUX_VAL(CP(SDRC_DQS1),		(IEN  | PTD | DIS | M0)) /*SDRC_DQS1*/\
-	MUX_VAL(CP(SDRC_DQS2),		(IEN  | PTD | DIS | M0)) /*SDRC_DQS2*/\
-	MUX_VAL(CP(SDRC_DQS3),		(IEN  | PTD | DIS | M0)) /*SDRC_DQS3*/\
- /*GPMC*/\
-	MUX_VAL(CP(GPMC_A1),		(IDIS | PTU | EN  | M0)) /*GPMC_A1*/\
-	MUX_VAL(CP(GPMC_A2),		(IDIS | PTU | EN  | M0)) /*GPMC_A2*/\
-	MUX_VAL(CP(GPMC_A3),		(IDIS | PTU | EN  | M0)) /*GPMC_A3*/\
-	MUX_VAL(CP(GPMC_A4),		(IDIS | PTU | EN  | M0)) /*GPMC_A4*/\
-	MUX_VAL(CP(GPMC_A5),		(IDIS | PTU | EN  | M0)) /*GPMC_A5*/\
-	MUX_VAL(CP(GPMC_A6),		(IDIS | PTU | EN  | M0)) /*GPMC_A6*/\
-	MUX_VAL(CP(GPMC_A7),		(IDIS | PTU | EN  | M0)) /*GPMC_A7*/\
-	MUX_VAL(CP(GPMC_A8),		(IDIS | PTU | EN  | M0)) /*GPMC_A8*/\
-	MUX_VAL(CP(GPMC_A9),		(IDIS | PTU | EN  | M0)) /*GPMC_A9*/\
-	MUX_VAL(CP(GPMC_A10),		(IDIS | PTU | EN  | M0)) /*GPMC_A10*/\
-	MUX_VAL(CP(GPMC_D0),		(IEN  | PTU | EN  | M0)) /*GPMC_D0*/\
-	MUX_VAL(CP(GPMC_D1),		(IEN  | PTU | EN  | M0)) /*GPMC_D1*/\
-	MUX_VAL(CP(GPMC_D2),		(IEN  | PTU | EN  | M0)) /*GPMC_D2*/\
-	MUX_VAL(CP(GPMC_D3),		(IEN  | PTU | EN  | M0)) /*GPMC_D3*/\
-	MUX_VAL(CP(GPMC_D4),		(IEN  | PTU | EN  | M0)) /*GPMC_D4*/\
-	MUX_VAL(CP(GPMC_D5),		(IEN  | PTU | EN  | M0)) /*GPMC_D5*/\
-	MUX_VAL(CP(GPMC_D6),		(IEN  | PTU | EN  | M0)) /*GPMC_D6*/\
-	MUX_VAL(CP(GPMC_D7),		(IEN  | PTU | EN  | M0)) /*GPMC_D7*/\
-	MUX_VAL(CP(GPMC_D8),		(IEN  | PTU | EN  | M0)) /*GPMC_D8*/\
-	MUX_VAL(CP(GPMC_D9),		(IEN  | PTU | EN  | M0)) /*GPMC_D9*/\
-	MUX_VAL(CP(GPMC_D10),		(IEN  | PTU | EN  | M0)) /*GPMC_D10*/\
-	MUX_VAL(CP(GPMC_D11),		(IEN  | PTU | EN  | M0)) /*GPMC_D11*/\
-	MUX_VAL(CP(GPMC_D12),		(IEN  | PTU | EN  | M0)) /*GPMC_D12*/\
-	MUX_VAL(CP(GPMC_D13),		(IEN  | PTU | EN  | M0)) /*GPMC_D13*/\
-	MUX_VAL(CP(GPMC_D14),		(IEN  | PTU | EN  | M0)) /*GPMC_D14*/\
-	MUX_VAL(CP(GPMC_D15),		(IEN  | PTU | EN  | M0)) /*GPMC_D15*/\
-	MUX_VAL(CP(GPMC_NCS0),		(IDIS | PTU | EN  | M0)) /*GPMC_nCS0*/\
-	MUX_VAL(CP(GPMC_NCS2),		(IDIS | PTU | EN  | M0)) /*GPMC_nCS2*/\
-	MUX_VAL(CP(GPMC_NCS3),		(IEN  | PTU | EN  | M4)) /*GPIO_54*/\
-								 /* - MMC1_WP*/\
-	MUX_VAL(CP(GPMC_NCS7),		(IEN  | PTU | EN  | M0)) /*GPMC_nCS7*/\
-	MUX_VAL(CP(GPMC_NBE1),		(IEN  | PTD | DIS | M0)) /*GPMC_nCS3*/\
-	MUX_VAL(CP(GPMC_CLK),		(IEN  | PTU | EN  | M0)) /*GPMC_CLK*/\
-	MUX_VAL(CP(GPMC_NADV_ALE),	(IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\
-	MUX_VAL(CP(GPMC_NOE),		(IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\
-	MUX_VAL(CP(GPMC_NWE),		(IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\
-	MUX_VAL(CP(GPMC_NBE0_CLE),	(IDIS | PTD | DIS | M0)) /*GPMC_nBE0_CLE*/\
-	MUX_VAL(CP(GPMC_NWP),		(IEN  | PTD | DIS | M0)) /*GPMC_nWP*/\
-	MUX_VAL(CP(GPMC_WAIT0),		(IEN  | PTU | EN  | M0)) /*GPMC_WAIT0*/\
- /*CAMERA*/\
-	MUX_VAL(CP(CAM_HS),		(IEN  | PTU | DIS | M0)) /*CAM_HS */\
-	MUX_VAL(CP(CAM_VS),		(IEN  | PTU | DIS | M0)) /*CAM_VS */\
-	MUX_VAL(CP(CAM_XCLKA),		(IDIS | PTD | DIS | M0)) /*CAM_XCLKA*/\
-	MUX_VAL(CP(CAM_PCLK),		(IEN  | PTU | DIS | M0)) /*CAM_PCLK*/\
-	MUX_VAL(CP(CAM_D0),		(IEN  | PTD | DIS | M0)) /*CAM_D0*/\
-	MUX_VAL(CP(CAM_D1),		(IEN  | PTD | DIS | M0)) /*CAM_D1*/\
-	MUX_VAL(CP(CAM_D2),		(IEN  | PTD | DIS | M0)) /*CAM_D2*/\
-	MUX_VAL(CP(CAM_D3),		(IEN  | PTD | DIS | M0)) /*CAM_D3*/\
-	MUX_VAL(CP(CAM_D4),		(IEN  | PTD | DIS | M0)) /*CAM_D4*/\
-	MUX_VAL(CP(CAM_D5),		(IEN  | PTD | DIS | M0)) /*CAM_D5*/\
-	MUX_VAL(CP(CAM_D6),		(IEN  | PTD | DIS | M0)) /*CAM_D6*/\
-	MUX_VAL(CP(CAM_D7),		(IEN  | PTD | DIS | M0)) /*CAM_D7*/\
-	MUX_VAL(CP(CAM_D8),		(IEN  | PTD | DIS | M0)) /*CAM_D8*/\
-	MUX_VAL(CP(CAM_D9),		(IEN  | PTD | DIS | M0)) /*CAM_D9*/\
-	MUX_VAL(CP(CAM_D10),		(IEN  | PTD | DIS | M0)) /*CAM_D10*/\
-	MUX_VAL(CP(CAM_D11),		(IEN  | PTD | DIS | M0)) /*CAM_D11*/\
-	MUX_VAL(CP(CSI2_DX0),		(IEN  | PTD | EN  | M4)) /*GPIO_112*/\
-	MUX_VAL(CP(CSI2_DY0),		(IEN  | PTD | EN  | M4)) /*GPIO_113*/\
-	MUX_VAL(CP(CSI2_DY1),		(IEN  | PTD | EN  | M4)) /*GPIO_115*/\
- /*Audio Interface */\
-	MUX_VAL(CP(MCBSP2_FSX),		(IEN  | PTD | DIS | M0)) /*McBSP2_FSX*/\
-	MUX_VAL(CP(MCBSP2_CLKX),	(IEN  | PTD | DIS | M0)) /*McBSP2_CLKX*/\
-	MUX_VAL(CP(MCBSP2_DR),		(IEN  | PTD | DIS | M0)) /*McBSP2_DR*/\
-	MUX_VAL(CP(MCBSP2_DX),		(IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\
- /*Expansion card */\
-	MUX_VAL(CP(MMC1_CLK),		(IEN  | PTU | EN  | M0)) /*MMC1_CLK*/\
-	MUX_VAL(CP(MMC1_CMD),		(IEN  | PTU | EN  | M0)) /*MMC1_CMD*/\
-	MUX_VAL(CP(MMC1_DAT0),		(IEN  | PTU | EN  | M0)) /*MMC1_DAT0*/\
-	MUX_VAL(CP(MMC1_DAT1),		(IEN  | PTU | EN  | M0)) /*MMC1_DAT1*/\
-	MUX_VAL(CP(MMC1_DAT2),		(IEN  | PTU | EN  | M0)) /*MMC1_DAT2*/\
-	MUX_VAL(CP(MMC1_DAT3),		(IEN  | PTU | EN  | M0)) /*MMC1_DAT3*/\
-	MUX_VAL(CP(MMC1_DAT4),		(IEN  | PTU | EN  | M0)) /*MMC1_DAT4*/\
-	MUX_VAL(CP(MMC1_DAT5),		(IEN  | PTU | EN  | M0)) /*MMC1_DAT5*/\
-	MUX_VAL(CP(MMC1_DAT6),		(IEN  | PTU | EN  | M0)) /*MMC1_DAT6*/\
-	MUX_VAL(CP(MMC1_DAT7),		(IEN  | PTU | EN  | M0)) /*MMC1_DAT7*/\
- /*Wireless LAN */\
-	MUX_VAL(CP(MMC2_CLK),		(IEN  | PTU | EN  | M4)) /*GPIO_130*/\
-	MUX_VAL(CP(MMC2_CMD),		(IEN  | PTU | EN  | M0)) /*MMC2_CMD*/\
-	MUX_VAL(CP(MMC2_DAT0),		(IEN  | PTU | EN  | M0)) /*MMC2_DAT0*/\
-	MUX_VAL(CP(MMC2_DAT1),		(IEN  | PTU | EN  | M0)) /*MMC2_DAT1*/\
-	MUX_VAL(CP(MMC2_DAT2),		(IEN  | PTU | EN  | M0)) /*MMC2_DAT2*/\
-	MUX_VAL(CP(MMC2_DAT3),		(IEN  | PTU | EN  | M0)) /*MMC2_DAT3*/\
-	MUX_VAL(CP(MMC2_DAT4),		(IEN  | PTU | EN  | M1)) /*MMC2_DIR_DAT0*/\
-	MUX_VAL(CP(MMC2_DAT5),		(IEN  | PTU | EN  | M1)) /*MMC2_DIR_DAT1*/\
-	MUX_VAL(CP(MMC2_DAT6),		(IEN  | PTU | EN  | M1)) /*MMC2_DIR_CMD*/\
-	MUX_VAL(CP(MMC2_DAT7),		(IEN  | PTU | EN  | M4)) /*GPIO_139*/\
- /*Bluetooth*/\
-	MUX_VAL(CP(MCBSP3_DX),		(IEN  | PTD | DIS | M1)) /*UART2_CTS*/\
-	MUX_VAL(CP(MCBSP3_DR),		(IDIS | PTD | DIS | M1)) /*UART2_RTS*/\
-	MUX_VAL(CP(MCBSP3_CLKX),	(IDIS | PTD | DIS | M1)) /*UART2_TX*/\
-	MUX_VAL(CP(MCBSP3_FSX),		(IEN  | PTD | DIS | M1)) /*UART2_RX*/\
-	MUX_VAL(CP(UART1_RTS),		(IEN  | PTU | DIS | M4)) /*GPIO_149*/ \
-	MUX_VAL(CP(MCBSP4_CLKX),	(IEN  | PTD | DIS | M0)) /*McBSP4_CLKX*/\
-	MUX_VAL(CP(MCBSP4_DR),		(IEN  | PTD | DIS | M0)) /*McBSP4_DR*/\
-	MUX_VAL(CP(MCBSP4_DX),		(IEN  | PTD | DIS | M0)) /*McBSP4_DX*/\
-	MUX_VAL(CP(MCBSP4_FSX),		(IEN  | PTD | DIS | M0)) /*McBSP4_FSX*/\
-	MUX_VAL(CP(MCBSP1_CLKR),	(IEN  | PTD | DIS | M0)) /*McBSP1_CLKR*/\
-	MUX_VAL(CP(MCBSP1_FSR),		(IEN  | PTD | DIS | M0)) /*McBSP1_FSR*/\
-	MUX_VAL(CP(MCBSP1_DX),		(IEN  | PTD | DIS | M0)) /*McBSP1_DX*/\
-	MUX_VAL(CP(MCBSP1_DR),		(IEN  | PTD | DIS | M0)) /*McBSP1_DR*/\
-	MUX_VAL(CP(MCBSP_CLKS),		(IEN  | PTU | DIS | M0)) /*McBSP_CLKS*/\
-	MUX_VAL(CP(MCBSP1_FSX),		(IEN  | PTD | DIS | M0)) /*McBSP1_FSX*/\
-	MUX_VAL(CP(MCBSP1_CLKX),	(IEN  | PTD | DIS | M0)) /*McBSP1_CLKX*/\
- /*Serial Interface*/\
-	MUX_VAL(CP(UART3_RTS_SD),	(IEN  | PTU | EN  | M4)) /*GPIO_164 W2W_*/\
-								 /* BT_NRESET*/\
-	MUX_VAL(CP(UART3_RX_IRRX),	(IEN  | PTU | EN  | M0)) /*UART3_RX_IRRX*/\
-	MUX_VAL(CP(UART3_TX_IRTX),	(IDIS | PTD | DIS | M0)) /*UART3_TX_IRTX*/\
-	MUX_VAL(CP(HSUSB0_CLK),		(IEN  | PTD | DIS | M0)) /*HSUSB0_CLK*/\
-	MUX_VAL(CP(HSUSB0_STP),		(IDIS | PTU | EN  | M0)) /*HSUSB0_STP*/\
-	MUX_VAL(CP(HSUSB0_DIR),		(IEN  | PTD | DIS | M0)) /*HSUSB0_DIR*/\
-	MUX_VAL(CP(HSUSB0_NXT),		(IEN  | PTD | DIS | M0)) /*HSUSB0_NXT*/\
-	MUX_VAL(CP(HSUSB0_DATA0),	(IEN  | PTD | DIS | M0)) /*HSUSB0_DATA0*/\
-	MUX_VAL(CP(HSUSB0_DATA1),	(IEN  | PTD | DIS | M0)) /*HSUSB0_DATA1*/\
-	MUX_VAL(CP(HSUSB0_DATA2),	(IEN  | PTD | DIS | M0)) /*HSUSB0_DATA2*/\
-	MUX_VAL(CP(HSUSB0_DATA3),	(IEN  | PTD | DIS | M0)) /*HSUSB0_DATA3*/\
-	MUX_VAL(CP(HSUSB0_DATA4),	(IEN  | PTD | DIS | M0)) /*HSUSB0_DATA4*/\
-	MUX_VAL(CP(HSUSB0_DATA5),	(IEN  | PTD | DIS | M0)) /*HSUSB0_DATA5*/\
-	MUX_VAL(CP(HSUSB0_DATA6),	(IEN  | PTD | DIS | M0)) /*HSUSB0_DATA6*/\
-	MUX_VAL(CP(HSUSB0_DATA7),	(IEN  | PTD | DIS | M0)) /*HSUSB0_DATA7*/\
-	MUX_VAL(CP(I2C1_SCL),		(IEN  | PTU | EN  | M0)) /*I2C1_SCL*/\
-	MUX_VAL(CP(I2C1_SDA),		(IEN  | PTU | EN  | M0)) /*I2C1_SDA*/\
-	MUX_VAL(CP(I2C2_SCL),		(IEN  | PTU | EN  | M4)) /*GPIO_168*/\
-								 /* - USBH_CPEN*/\
-	MUX_VAL(CP(I2C2_SDA),		(IEN  | PTU | EN  | M4)) /*GPIO_183*/\
-								 /* - USBH_RESET*/\
-	MUX_VAL(CP(I2C3_SCL),		(IEN  | PTU | EN  | M0)) /*I2C3_SCL*/\
-	MUX_VAL(CP(I2C3_SDA),		(IEN  | PTU | EN  | M0)) /*I2C3_SDA*/\
-	MUX_VAL(CP(I2C4_SCL),		(IEN  | PTU | EN  | M0)) /*I2C4_SCL*/\
-	MUX_VAL(CP(I2C4_SDA),		(IEN  | PTU | EN  | M0)) /*I2C4_SDA*/\
-	MUX_VAL(CP(MCSPI1_CS3),		(IEN  | PTD | DIS | M3)) /*HSUSB2_DATA2*/\
-	MUX_VAL(CP(MCSPI2_CLK),		(IEN  | PTD | DIS | M3)) /*HSUSB2_DATA7*/\
-	MUX_VAL(CP(MCSPI2_SIMO),	(IEN  | PTD | DIS | M3)) /*HSUSB2_DATA4*/\
-	MUX_VAL(CP(MCSPI2_SOMI),	(IEN  | PTD | DIS | M3)) /*HSUSB2_DATA5*/\
-	MUX_VAL(CP(MCSPI2_CS0),		(IEN  | PTD | DIS | M3)) /*HSUSB2_DATA6*/\
-	MUX_VAL(CP(MCSPI2_CS1),		(IEN  | PTD | DIS | M3)) /*HSUSB2_DATA3*/\
- /*Control and debug */\
-	MUX_VAL(CP(SYS_32K),		(IEN  | PTD | DIS | M0)) /*SYS_32K*/\
-	MUX_VAL(CP(SYS_CLKREQ),		(IEN  | PTD | DIS | M0)) /*SYS_CLKREQ*/\
-	MUX_VAL(CP(SYS_NIRQ),		(IEN  | PTU | EN  | M0)) /*SYS_nIRQ*/\
-	MUX_VAL(CP(SYS_BOOT0),		(IEN  | PTD | DIS | M4)) /*GPIO_2*/\
-	MUX_VAL(CP(SYS_BOOT1),		(IEN  | PTD | DIS | M4)) /*GPIO_3 */\
-	MUX_VAL(CP(SYS_BOOT2),		(IEN  | PTD | DIS | M4)) /*GPIO_4 - MMC1_WP*/\
-	MUX_VAL(CP(SYS_BOOT3),		(IEN  | PTD | DIS | M4)) /*GPIO_5*/\
-	MUX_VAL(CP(SYS_BOOT4),		(IEN  | PTD | DIS | M4)) /*GPIO_6*/\
-	MUX_VAL(CP(SYS_BOOT5),		(IEN  | PTD | DIS | M4)) /*GPIO_7*/\
-	MUX_VAL(CP(SYS_BOOT6),		(IDIS | PTD | DIS | M4)) /*GPIO_8*/\
-	MUX_VAL(CP(SYS_OFF_MODE),	(IEN  | PTD | DIS | M0)) /*SYS_OFF_MODE*/\
-	MUX_VAL(CP(ETK_D1_ES2),		(IEN  | PTD | EN  | M4)) /*GPIO_15 - X_GATE*/\
-	MUX_VAL(CP(ETK_D2_ES2),		(IEN  | PTU | EN  | M4)) /*GPIO_16*/\
-								 /* - W2W_NRESET*/\
-	MUX_VAL(CP(ETK_D10_ES2),	(IDIS | PTD | DIS | M3)) /*HSUSB2_CLK*/\
-	MUX_VAL(CP(ETK_D11_ES2),	(IDIS | PTD | DIS | M3)) /*HSUSB2_STP*/\
-	MUX_VAL(CP(ETK_D12_ES2),	(IEN  | PTD | DIS | M3)) /*HSUSB2_DIR*/\
-	MUX_VAL(CP(ETK_D13_ES2),	(IEN  | PTD | DIS | M3)) /*HSUSB2_NXT*/\
-	MUX_VAL(CP(ETK_D14_ES2),	(IEN  | PTD | DIS | M3)) /*HSUSB2_DATA0*/\
-	MUX_VAL(CP(ETK_D15_ES2),	(IEN  | PTD | DIS | M3)) /*HSUSB2_DATA1*/\
- /* die to die */\
-	MUX_VAL(CP(D2D_MCAD1),		(IEN  | PTD | EN  | M0)) /*d2d_mcad1*/\
-	MUX_VAL(CP(D2D_MCAD2),		(IEN  | PTD | EN  | M0)) /*d2d_mcad2*/\
-	MUX_VAL(CP(D2D_MCAD3),		(IEN  | PTD | EN  | M0)) /*d2d_mcad3*/\
-	MUX_VAL(CP(D2D_MCAD4),		(IEN  | PTD | EN  | M0)) /*d2d_mcad4*/\
-	MUX_VAL(CP(D2D_MCAD5),		(IEN  | PTD | EN  | M0)) /*d2d_mcad5*/\
-	MUX_VAL(CP(D2D_MCAD6),		(IEN  | PTD | EN  | M0)) /*d2d_mcad6*/\
-	MUX_VAL(CP(D2D_MCAD7),		(IEN  | PTD | EN  | M0)) /*d2d_mcad7*/\
-	MUX_VAL(CP(D2D_MCAD8),		(IEN  | PTD | EN  | M0)) /*d2d_mcad8*/\
-	MUX_VAL(CP(D2D_MCAD9),		(IEN  | PTD | EN  | M0)) /*d2d_mcad9*/\
-	MUX_VAL(CP(D2D_MCAD10),		(IEN  | PTD | EN  | M0)) /*d2d_mcad10*/\
-	MUX_VAL(CP(D2D_MCAD11),		(IEN  | PTD | EN  | M0)) /*d2d_mcad11*/\
-	MUX_VAL(CP(D2D_MCAD12),		(IEN  | PTD | EN  | M0)) /*d2d_mcad12*/\
-	MUX_VAL(CP(D2D_MCAD13),		(IEN  | PTD | EN  | M0)) /*d2d_mcad13*/\
-	MUX_VAL(CP(D2D_MCAD14),		(IEN  | PTD | EN  | M0)) /*d2d_mcad14*/\
-	MUX_VAL(CP(D2D_MCAD15),		(IEN  | PTD | EN  | M0)) /*d2d_mcad15*/\
-	MUX_VAL(CP(D2D_MCAD16),		(IEN  | PTD | EN  | M0)) /*d2d_mcad16*/\
-	MUX_VAL(CP(D2D_MCAD17),		(IEN  | PTD | EN  | M0)) /*d2d_mcad17*/\
-	MUX_VAL(CP(D2D_MCAD18),		(IEN  | PTD | EN  | M0)) /*d2d_mcad18*/\
-	MUX_VAL(CP(D2D_MCAD19),		(IEN  | PTD | EN  | M0)) /*d2d_mcad19*/\
-	MUX_VAL(CP(D2D_MCAD20),		(IEN  | PTD | EN  | M0)) /*d2d_mcad20*/\
-	MUX_VAL(CP(D2D_MCAD21),		(IEN  | PTD | EN  | M0)) /*d2d_mcad21*/\
-	MUX_VAL(CP(D2D_MCAD22),		(IEN  | PTD | EN  | M0)) /*d2d_mcad22*/\
-	MUX_VAL(CP(D2D_MCAD23),		(IEN  | PTD | EN  | M0)) /*d2d_mcad23*/\
-	MUX_VAL(CP(D2D_MCAD24),		(IEN  | PTD | EN  | M0)) /*d2d_mcad24*/\
-	MUX_VAL(CP(D2D_MCAD25),		(IEN  | PTD | EN  | M0)) /*d2d_mcad25*/\
-	MUX_VAL(CP(D2D_MCAD26),		(IEN  | PTD | EN  | M0)) /*d2d_mcad26*/\
-	MUX_VAL(CP(D2D_MCAD27),		(IEN  | PTD | EN  | M0)) /*d2d_mcad27*/\
-	MUX_VAL(CP(D2D_MCAD28),		(IEN  | PTD | EN  | M0)) /*d2d_mcad28*/\
-	MUX_VAL(CP(D2D_MCAD29),		(IEN  | PTD | EN  | M0)) /*d2d_mcad29*/\
-	MUX_VAL(CP(D2D_MCAD30),		(IEN  | PTD | EN  | M0)) /*d2d_mcad30*/\
-	MUX_VAL(CP(D2D_MCAD31),		(IEN  | PTD | EN  | M0)) /*d2d_mcad31*/\
-	MUX_VAL(CP(D2D_MCAD32),		(IEN  | PTD | EN  | M0)) /*d2d_mcad32*/\
-	MUX_VAL(CP(D2D_MCAD33),		(IEN  | PTD | EN  | M0)) /*d2d_mcad33*/\
-	MUX_VAL(CP(D2D_MCAD34),		(IEN  | PTD | EN  | M0)) /*d2d_mcad34*/\
-	MUX_VAL(CP(D2D_MCAD35),		(IEN  | PTD | EN  | M0)) /*d2d_mcad35*/\
-	MUX_VAL(CP(D2D_MCAD36),		(IEN  | PTD | EN  | M0)) /*d2d_mcad36*/\
-	MUX_VAL(CP(D2D_CLK26MI),	(IEN  | PTD | DIS | M0)) /*d2d_clk26mi*/\
-	MUX_VAL(CP(D2D_NRESPWRON),	(IEN  | PTD | EN  | M0)) /*d2d_nrespwron*/\
-	MUX_VAL(CP(D2D_NRESWARM),	(IEN  | PTU | EN  | M0)) /*d2d_nreswarm */\
-	MUX_VAL(CP(D2D_ARM9NIRQ),	(IEN  | PTD | DIS | M0)) /*d2d_arm9nirq */\
-	MUX_VAL(CP(D2D_UMA2P6FIQ),	(IEN  | PTD | DIS | M0)) /*d2d_uma2p6fiq*/\
-	MUX_VAL(CP(D2D_SPINT),		(IEN  | PTD | EN  | M0)) /*d2d_spint*/\
-	MUX_VAL(CP(D2D_FRINT),		(IEN  | PTD | EN  | M0)) /*d2d_frint*/\
-	MUX_VAL(CP(D2D_DMAREQ0),	(IEN  | PTD | DIS | M0)) /*d2d_dmareq0*/\
-	MUX_VAL(CP(D2D_DMAREQ1),	(IEN  | PTD | DIS | M0)) /*d2d_dmareq1*/\
-	MUX_VAL(CP(D2D_DMAREQ2),	(IEN  | PTD | DIS | M0)) /*d2d_dmareq2*/\
-	MUX_VAL(CP(D2D_DMAREQ3),	(IEN  | PTD | DIS | M0)) /*d2d_dmareq3*/\
-	MUX_VAL(CP(D2D_N3GTRST),	(IEN  | PTD | DIS | M0)) /*d2d_n3gtrst*/\
-	MUX_VAL(CP(D2D_N3GTDI),		(IEN  | PTD | DIS | M0)) /*d2d_n3gtdi*/\
-	MUX_VAL(CP(D2D_N3GTDO),		(IEN  | PTD | DIS | M0)) /*d2d_n3gtdo*/\
-	MUX_VAL(CP(D2D_N3GTMS),		(IEN  | PTD | DIS | M0)) /*d2d_n3gtms*/\
-	MUX_VAL(CP(D2D_N3GTCK),		(IEN  | PTD | DIS | M0)) /*d2d_n3gtck*/\
-	MUX_VAL(CP(D2D_N3GRTCK),	(IEN  | PTD | DIS | M0)) /*d2d_n3grtck*/\
-	MUX_VAL(CP(D2D_MSTDBY),		(IEN  | PTU | EN  | M0)) /*d2d_mstdby*/\
-	MUX_VAL(CP(D2D_SWAKEUP),	(IEN  | PTD | EN  | M0)) /*d2d_swakeup*/\
-	MUX_VAL(CP(D2D_IDLEREQ),	(IEN  | PTD | DIS | M0)) /*d2d_idlereq*/\
-	MUX_VAL(CP(D2D_IDLEACK),	(IEN  | PTU | EN  | M0)) /*d2d_idleack*/\
-	MUX_VAL(CP(D2D_MWRITE),		(IEN  | PTD | DIS | M0)) /*d2d_mwrite*/\
-	MUX_VAL(CP(D2D_SWRITE),		(IEN  | PTD | DIS | M0)) /*d2d_swrite*/\
-	MUX_VAL(CP(D2D_MREAD),		(IEN  | PTD | DIS | M0)) /*d2d_mread*/\
-	MUX_VAL(CP(D2D_SREAD),		(IEN  | PTD | DIS | M0)) /*d2d_sread*/\
-	MUX_VAL(CP(D2D_MBUSFLAG),	(IEN  | PTD | DIS | M0)) /*d2d_mbusflag*/\
-	MUX_VAL(CP(D2D_SBUSFLAG),	(IEN  | PTD | DIS | M0)) /*d2d_sbusflag*/\
-	MUX_VAL(CP(SDRC_CKE0),		(IDIS | PTU | EN  | M0)) /*sdrc_cke0*/\
-	MUX_VAL(CP(SDRC_CKE1),		(IDIS | PTU | EN  | M0)) /*sdrc_cke1*/
-
-/*
- * Routine: get_board_revision
- * Description: Returns the board revision
- */
-int get_board_revision(void)
-{
-	int revision;
-
-	if (!gpio_request(112, "") &&
-	    !gpio_request(113, "") &&
-	    !gpio_request(115, "")) {
-
-		gpio_direction_input(112);
-		gpio_direction_input(113);
-		gpio_direction_input(115);
-
-		revision = gpio_get_value(115) << 2 |
-			   gpio_get_value(113) << 1 |
-			   gpio_get_value(112);
-	} else {
-		puts("Error: unable to acquire board revision GPIOs\n");
-		revision = -1;
-	}
-
-	return revision;
-}
-
-/*
- * Routine: set_muxconf_regs
- * Description: Setting up the configuration Mux registers specific to the
- *              hardware. Many pins need to be moved from protect to primary
- *              mode.
- */
-void set_muxconf_regs(void)
-{
-	MUX_OVERO();
-}
diff --git a/board/overo/overo.c b/board/overo/overo.c
deleted file mode 100644
index 5450f5d..0000000
--- a/board/overo/overo.c
+++ /dev/null
@@ -1,411 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Maintainer : Steve Sakoman <steve@sakoman.com>
- *
- * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
- *	Richard Woodruff <r-woodruff2@ti.com>
- *	Syed Mohammed Khasim <khasim@ti.com>
- *	Sunil Kumar <sunilsaini05@gmail.com>
- *	Shashi Ranjan <shashiranjanmca05@gmail.com>
- *
- * (C) Copyright 2004-2008
- * Texas Instruments, <www.ti.com>
- */
-#include <common.h>
-#include <dm.h>
-#include <env.h>
-#include <init.h>
-#include <malloc.h>
-#include <net.h>
-#include <ns16550.h>
-#include <netdev.h>
-#include <twl4030.h>
-#include <linux/delay.h>
-#include <linux/mtd/rawnand.h>
-#include <asm/io.h>
-#include <asm/arch/mmc_host_def.h>
-#include <asm/arch/mux.h>
-#include <asm/arch/mem.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/gpio.h>
-#include <asm/mach-types.h>
-#include "overo.h"
-
-#ifdef CONFIG_USB_EHCI_HCD
-#include <usb.h>
-#include <asm/ehci-omap.h>
-#endif
-
-#define TWL4030_I2C_BUS			0
-#define EXPANSION_EEPROM_I2C_BUS	2
-#define EXPANSION_EEPROM_I2C_ADDRESS	0x51
-
-#define GUMSTIX_EMPTY_EEPROM		0x0
-
-#define GUMSTIX_SUMMIT			0x01000200
-#define GUMSTIX_TOBI			0x02000200
-#define GUMSTIX_TOBI_DUO		0x03000200
-#define GUMSTIX_PALO35			0x04000200
-#define GUMSTIX_PALO43			0x05000200
-#define GUMSTIX_CHESTNUT43		0x06000200
-#define GUMSTIX_PINTO			0x07000200
-#define GUMSTIX_GALLOP43		0x08000200
-#define GUMSTIX_ALTO35			0x09000200
-#define GUMSTIX_STAGECOACH		0x0A000200
-#define GUMSTIX_THUMBO			0x0B000200
-#define GUMSTIX_TURTLECORE		0x0C000200
-#define GUMSTIX_ARBOR43C		0x0D000200
-
-#define ETTUS_USRP_E			0x01000300
-
-#define GUMSTIX_NO_EEPROM		0xffffffff
-
-static struct {
-	unsigned int device_vendor;
-	unsigned char revision;
-	unsigned char content;
-	char fab_revision[8];
-	char env_var[16];
-	char env_setting[64];
-} expansion_config = {0x0};
-
-static const struct ns16550_platdata overo_serial = {
-	.base = OMAP34XX_UART3,
-	.reg_shift = 2,
-	.clock = V_NS16550_CLK,
-	.fcr = UART_FCR_DEFVAL,
-};
-
-U_BOOT_DEVICE(overo_uart) = {
-	"ns16550_serial",
-	&overo_serial
-};
-
-/*
- * Routine: get_sdio2_config
- * Description: Return information about the wifi module connection
- *              Returns 0 if the module connects though a level translator
- *              Returns 1 if the module connects directly
- */
-int get_sdio2_config(void)
-{
-	int sdio_direct;
-
-	if (!gpio_request(130, "") && !gpio_request(139, "")) {
-
-		gpio_direction_output(130, 0);
-		gpio_direction_input(139);
-
-		sdio_direct = 1;
-		gpio_set_value(130, 0);
-		if (gpio_get_value(139) == 0) {
-			gpio_set_value(130, 1);
-			if (gpio_get_value(139) == 1)
-				sdio_direct = 0;
-		}
-
-		gpio_direction_input(130);
-	} else {
-		puts("Error: unable to acquire sdio2 clk GPIOs\n");
-		sdio_direct = -1;
-	}
-
-	return sdio_direct;
-}
-
-/*
- * Routine: get_expansion_id
- * Description: This function checks for expansion board by checking I2C
- *		bus 2 for the availability of an AT24C01B serial EEPROM.
- *		returns the device_vendor field from the EEPROM
- */
-unsigned int get_expansion_id(void)
-{
-	if (expansion_config.device_vendor != 0x0)
-		return expansion_config.device_vendor;
-
-	i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
-
-	/* return GUMSTIX_NO_EEPROM if eeprom doesn't respond */
-	if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
-		i2c_set_bus_num(TWL4030_I2C_BUS);
-		return GUMSTIX_NO_EEPROM;
-	}
-
-	/* read configuration data */
-	i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
-		 sizeof(expansion_config));
-
-	i2c_set_bus_num(TWL4030_I2C_BUS);
-
-	return expansion_config.device_vendor;
-}
-
-/*
- * Routine: misc_init_r
- * Description: Configure board specific parts
- */
-int misc_init_r(void)
-{
-	unsigned int expansion_id;
-
-	twl4030_power_init();
-	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
-
-	printf("Board revision: %d\n", get_board_revision());
-
-	switch (get_sdio2_config()) {
-	case 0:
-		puts("Tranceiver detected on mmc2\n");
-		MUX_OVERO_SDIO2_TRANSCEIVER();
-		break;
-	case 1:
-		puts("Direct connection on mmc2\n");
-		MUX_OVERO_SDIO2_DIRECT();
-		break;
-	default:
-		puts("Unable to detect mmc2 connection type\n");
-	}
-
-	expansion_id = get_expansion_id();
-	switch (expansion_id) {
-	case GUMSTIX_SUMMIT:
-		printf("Recognized Summit expansion board (rev %d %s)\n",
-			expansion_config.revision,
-			expansion_config.fab_revision);
-		MUX_GUMSTIX();
-		env_set("defaultdisplay", "dvi");
-		env_set("expansionname", "summit");
-		break;
-	case GUMSTIX_TOBI:
-		printf("Recognized Tobi expansion board (rev %d %s)\n",
-			expansion_config.revision,
-			expansion_config.fab_revision);
-		MUX_GUMSTIX();
-		env_set("defaultdisplay", "dvi");
-		env_set("expansionname", "tobi");
-		break;
-	case GUMSTIX_TOBI_DUO:
-		printf("Recognized Tobi Duo expansion board (rev %d %s)\n",
-			expansion_config.revision,
-			expansion_config.fab_revision);
-		MUX_GUMSTIX();
-		env_set("expansionname", "tobiduo");
-		break;
-	case GUMSTIX_PALO35:
-		printf("Recognized Palo35 expansion board (rev %d %s)\n",
-			expansion_config.revision,
-			expansion_config.fab_revision);
-		MUX_GUMSTIX();
-		env_set("defaultdisplay", "lcd35");
-		env_set("expansionname", "palo35");
-		break;
-	case GUMSTIX_PALO43:
-		printf("Recognized Palo43 expansion board (rev %d %s)\n",
-			expansion_config.revision,
-			expansion_config.fab_revision);
-		MUX_GUMSTIX();
-		env_set("defaultdisplay", "lcd43");
-		env_set("expansionname", "palo43");
-		break;
-	case GUMSTIX_CHESTNUT43:
-		printf("Recognized Chestnut43 expansion board (rev %d %s)\n",
-			expansion_config.revision,
-			expansion_config.fab_revision);
-		MUX_GUMSTIX();
-		env_set("defaultdisplay", "lcd43");
-		env_set("expansionname", "chestnut43");
-		break;
-	case GUMSTIX_PINTO:
-		printf("Recognized Pinto expansion board (rev %d %s)\n",
-			expansion_config.revision,
-			expansion_config.fab_revision);
-		MUX_GUMSTIX();
-		break;
-	case GUMSTIX_GALLOP43:
-		printf("Recognized Gallop43 expansion board (rev %d %s)\n",
-			expansion_config.revision,
-			expansion_config.fab_revision);
-		MUX_GUMSTIX();
-		env_set("defaultdisplay", "lcd43");
-		env_set("expansionname", "gallop43");
-		break;
-	case GUMSTIX_ALTO35:
-		printf("Recognized Alto35 expansion board (rev %d %s)\n",
-			expansion_config.revision,
-			expansion_config.fab_revision);
-		MUX_GUMSTIX();
-		MUX_ALTO35();
-		env_set("defaultdisplay", "lcd35");
-		env_set("expansionname", "alto35");
-		break;
-	case GUMSTIX_STAGECOACH:
-		printf("Recognized Stagecoach expansion board (rev %d %s)\n",
-			expansion_config.revision,
-			expansion_config.fab_revision);
-		MUX_GUMSTIX();
-		break;
-	case GUMSTIX_THUMBO:
-		printf("Recognized Thumbo expansion board (rev %d %s)\n",
-			expansion_config.revision,
-			expansion_config.fab_revision);
-		MUX_GUMSTIX();
-		break;
-	case GUMSTIX_TURTLECORE:
-		printf("Recognized Turtlecore expansion board (rev %d %s)\n",
-			expansion_config.revision,
-			expansion_config.fab_revision);
-		MUX_GUMSTIX();
-		break;
-	case GUMSTIX_ARBOR43C:
-		printf("Recognized Arbor43C expansion board (rev %d %s)\n",
-			expansion_config.revision,
-			expansion_config.fab_revision);
-		MUX_GUMSTIX();
-		MUX_ARBOR43C();
-		env_set("defaultdisplay", "lcd43");
-		env_set("expansionname", "arbor43c");
-		break;
-	case ETTUS_USRP_E:
-		printf("Recognized Ettus Research USRP-E (rev %d %s)\n",
-			expansion_config.revision,
-			expansion_config.fab_revision);
-		MUX_GUMSTIX();
-		MUX_USRP_E();
-		env_set("defaultdisplay", "dvi");
-		break;
-	case GUMSTIX_NO_EEPROM:
-	case GUMSTIX_EMPTY_EEPROM:
-		puts("No or empty EEPROM on expansion board\n");
-		MUX_GUMSTIX();
-		env_set("expansionname", "tobi");
-		break;
-	default:
-		printf("Unrecognized expansion board 0x%08x\n", expansion_id);
-		break;
-	}
-
-	if (expansion_config.content == 1)
-		env_set(expansion_config.env_var, expansion_config.env_setting);
-
-	omap_die_id_display();
-
-	if (get_cpu_family() == CPU_OMAP34XX)
-		env_set("boardname", "overo");
-	else
-		env_set("boardname", "overo-storm");
-
-	return 0;
-}
-
-#if defined(CONFIG_CMD_NET)
-/* GPMC definitions for LAN9221 chips on Tobi expansion boards */
-static const u32 gpmc_lan_config[] = {
-	NET_LAN9221_GPMC_CONFIG1,
-	NET_LAN9221_GPMC_CONFIG2,
-	NET_LAN9221_GPMC_CONFIG3,
-	NET_LAN9221_GPMC_CONFIG4,
-	NET_LAN9221_GPMC_CONFIG5,
-	NET_LAN9221_GPMC_CONFIG6,
-	/*CONFIG7- computed as params */
-};
-
-/*
- * Routine: setup_net_chip
- * Description: Setting up the configuration GPMC registers specific to the
- *	      Ethernet hardware.
- */
-static void setup_net_chip(void)
-{
-	struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
-
-	/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
-	writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
-	/* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
-	writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
-	/* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
-	writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
-		&ctrl_base->gpmc_nadv_ale);
-}
-
-/*
- * Routine: reset_net_chip
- * Description: Reset the Ethernet hardware.
- */
-static void reset_net_chip(void)
-{
-	/* Make GPIO 64 as output pin and send a magic pulse through it */
-	if (!gpio_request(64, "")) {
-		gpio_direction_output(64, 0);
-		gpio_set_value(64, 1);
-		udelay(1);
-		gpio_set_value(64, 0);
-		udelay(1);
-		gpio_set_value(64, 1);
-	}
-}
-
-int board_eth_init(bd_t *bis)
-{
-	unsigned int expansion_id;
-	int rc = 0;
-
-#ifdef CONFIG_SMC911X
-	expansion_id = get_expansion_id();
-	switch (expansion_id) {
-	case GUMSTIX_TOBI_DUO:
-		/* second lan chip */
-		enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4],
-				      0x2B000000, GPMC_SIZE_16M);
-		/* no break */
-	case GUMSTIX_TOBI:
-	case GUMSTIX_CHESTNUT43:
-	case GUMSTIX_STAGECOACH:
-	case GUMSTIX_NO_EEPROM:
-	case GUMSTIX_EMPTY_EEPROM:
-		/* first lan chip */
-		enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
-				      0x2C000000, GPMC_SIZE_16M);
-
-		setup_net_chip();
-		reset_net_chip();
-
-		rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
-		break;
-	default:
-		break;
-	}
-#endif
-
-	return rc;
-}
-#endif
-
-#if defined(CONFIG_USB_EHCI_HCD)
-static struct omap_usbhs_board_data usbhs_bdata = {
-	.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
-	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
-	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
-};
-
-#define GUMSTIX_GPIO_USBH_CPEN		168
-int ehci_hcd_init(int index, enum usb_init_type init,
-		  struct ehci_hccr **hccr, struct ehci_hcor **hcor)
-{
-	/* Enable USB power */
-	if (!gpio_request(GUMSTIX_GPIO_USBH_CPEN, "usbh_cpen"))
-		gpio_direction_output(GUMSTIX_GPIO_USBH_CPEN, 1);
-
-	return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
-}
-
-int ehci_hcd_stop(void)
-{
-	/* Disable USB power */
-	gpio_set_value(GUMSTIX_GPIO_USBH_CPEN, 0);
-	gpio_free(GUMSTIX_GPIO_USBH_CPEN);
-
-	return omap_ehci_hcd_stop();
-}
-
-#endif /* CONFIG_USB_EHCI_HCD */
diff --git a/board/overo/overo.h b/board/overo/overo.h
deleted file mode 100644
index 513a3e3..0000000
--- a/board/overo/overo.h
+++ /dev/null
@@ -1,169 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2008
- * Steve Sakoman <steve@sakoman.com>
- */
-#ifndef _OVERO_H_
-#define _OVERO_H_
-
-const omap3_sysinfo sysinfo = {
-	DDR_STACKED,
-	"Gumstix Overo board",
-#if defined(CONFIG_ENV_IS_IN_ONENAND)
-	"OneNAND",
-#else
-	"NAND",
-#endif
-};
-
-int get_board_revision(void);
-
-/* overo revisions */
-#define REVISION_0	0x0
-#define REVISION_1	0x1
-#define REVISION_2	0x2
-#define REVISION_3	0x3
-#define REVISION_4	0x4
-
-/*
- * IEN  - Input Enable
- * IDIS - Input Disable
- * PTD  - Pull type Down
- * PTU  - Pull type Up
- * DIS  - Pull type selection is inactive
- * EN   - Pull type selection is active
- * M0   - Mode 0
- * The commented string gives the final mux configuration for that pin
- */
-#define MUX_GUMSTIX() \
-  /*GPMC*/\
-	MUX_VAL(CP(GPMC_NCS1),		(IDIS | PTU | EN  | M0)) /*GPMC_nCS1*/\
-	MUX_VAL(CP(GPMC_NCS4),		(IDIS | PTU | EN  | M0)) /*GPMC_nCS4*/\
-	MUX_VAL(CP(GPMC_NCS5),		(IDIS | PTU | EN  | M0)) /*GPMC_nCS5*/\
-	MUX_VAL(CP(GPMC_NCS6),		(IEN  | PTD | DIS | M0)) /*GPMC_nCS6*/\
-	MUX_VAL(CP(GPMC_WAIT1),		(IEN  | PTU | EN  | M4)) /*GPIO_63*/\
-								 /* - CAM_IRQ*/\
-	MUX_VAL(CP(GPMC_WAIT2),		(IEN  | PTU | EN  | M4)) /*GPIO_64*/\
-								 /* - SMSC911X_NRES*/\
-	MUX_VAL(CP(GPMC_WAIT3),		(IEN  | PTU | DIS | M4)) /*GPIO_65*/\
- /*DSS*/\
-	MUX_VAL(CP(DSS_PCLK),		(IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\
-	MUX_VAL(CP(DSS_HSYNC),		(IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\
-	MUX_VAL(CP(DSS_VSYNC),		(IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\
-	MUX_VAL(CP(DSS_ACBIAS),		(IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\
-	MUX_VAL(CP(DSS_DATA0),		(IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\
-	MUX_VAL(CP(DSS_DATA1),		(IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\
-	MUX_VAL(CP(DSS_DATA2),		(IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\
-	MUX_VAL(CP(DSS_DATA3),		(IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\
-	MUX_VAL(CP(DSS_DATA4),		(IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\
-	MUX_VAL(CP(DSS_DATA5),		(IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\
-	MUX_VAL(CP(DSS_DATA6),		(IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\
-	MUX_VAL(CP(DSS_DATA7),		(IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\
-	MUX_VAL(CP(DSS_DATA8),		(IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\
-	MUX_VAL(CP(DSS_DATA9),		(IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\
-	MUX_VAL(CP(DSS_DATA10),		(IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\
-	MUX_VAL(CP(DSS_DATA11),		(IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\
-	MUX_VAL(CP(DSS_DATA12),		(IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\
-	MUX_VAL(CP(DSS_DATA13),		(IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\
-	MUX_VAL(CP(DSS_DATA14),		(IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\
-	MUX_VAL(CP(DSS_DATA15),		(IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\
-	MUX_VAL(CP(DSS_DATA16),		(IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\
-	MUX_VAL(CP(DSS_DATA17),		(IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\
-	MUX_VAL(CP(DSS_DATA18),		(IDIS | PTD | DIS | M0)) /*DSS_DATA18*/\
-	MUX_VAL(CP(DSS_DATA19),		(IDIS | PTD | DIS | M0)) /*DSS_DATA19*/\
-	MUX_VAL(CP(DSS_DATA20),		(IDIS | PTD | DIS | M0)) /*DSS_DATA20*/\
-	MUX_VAL(CP(DSS_DATA21),		(IDIS | PTD | DIS | M0)) /*DSS_DATA21*/\
-	MUX_VAL(CP(DSS_DATA22),		(IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\
-	MUX_VAL(CP(DSS_DATA23),		(IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\
- /*CAMERA*/\
-	MUX_VAL(CP(CAM_FLD),		(IDIS | PTD | DIS | M4)) /*CAM_FLD*/\
-	MUX_VAL(CP(CAM_XCLKB),		(IDIS | PTD | DIS | M0)) /*CAM_XCLKB*/\
-	MUX_VAL(CP(CAM_WEN),		(IEN  | PTD | DIS | M0)) /*CAM_WEN*/\
-	MUX_VAL(CP(CAM_STROBE),		(IDIS | PTD | DIS | M0)) /*CAM_STROBE*/\
-	MUX_VAL(CP(CSI2_DX1),		(IEN  | PTD | EN  | M4)) /*GPIO_114*/\
-								 /* - PEN_DOWN*/\
- /*Bluetooth*/\
-	MUX_VAL(CP(UART2_CTS),		(IEN  | PTD | DIS | M4)) /*GPIO_144 - LCD_EN*/\
-	MUX_VAL(CP(UART2_RTS),		(IEN  | PTD | DIS | M4)) /*GPIO_145*/\
-	MUX_VAL(CP(UART2_TX),		(IEN  | PTD | DIS | M4)) /*GPIO_146*/\
-	MUX_VAL(CP(UART2_RX),		(IEN  | PTD | DIS | M4)) /*GPIO_147*/\
-	MUX_VAL(CP(UART1_TX),		(IDIS | PTD | DIS | M0)) /*UART1_TX*/\
-	MUX_VAL(CP(UART1_CTS),		(IEN  | PTU | DIS | M4)) /*GPIO_150-MMC3_WP*/\
-	MUX_VAL(CP(UART1_RX),		(IEN  | PTD | DIS | M0)) /*UART1_RX*/\
- /*Serial Interface*/\
-	MUX_VAL(CP(UART3_CTS_RCTX),	(IEN  | PTD | EN  | M0)) /*UART3_CTS_RCTX*/\
-	MUX_VAL(CP(HDQ_SIO),		(IDIS | PTU | EN  | M4)) /*HDQ_SIO*/\
-	MUX_VAL(CP(MCSPI1_CLK),		(IEN  | PTD | DIS | M0)) /*McSPI1_CLK*/\
-	MUX_VAL(CP(MCSPI1_SIMO),	(IEN  | PTD | DIS | M0)) /*McSPI1_SIMO */\
-	MUX_VAL(CP(MCSPI1_SOMI),	(IEN  | PTD | DIS | M0)) /*McSPI1_SOMI */\
-	MUX_VAL(CP(MCSPI1_CS0),		(IEN  | PTD | EN  | M0)) /*McSPI1_CS0*/\
-	MUX_VAL(CP(MCSPI1_CS1),		(IDIS | PTD | EN  | M0)) /*McSPI1_CS1*/\
-	MUX_VAL(CP(MCSPI1_CS2),		(IEN  | PTU | DIS | M4)) /*GPIO_176 */\
-								 /* - LAN_INTR */\
- /*Control and debug */\
-	MUX_VAL(CP(SYS_CLKOUT1),	(IEN  | PTU | EN  | M4)) /*GPIO_10*/\
-	MUX_VAL(CP(SYS_CLKOUT2),	(IEN  | PTU | EN  | M4)) /*GPIO_186*/\
-	MUX_VAL(CP(ETK_CLK_ES2),	(IEN  | PTU | EN  | M2)) /*MMC3_CLK*/\
-	MUX_VAL(CP(ETK_CTL_ES2),	(IEN  | PTU | EN  | M2)) /*MMC3_CMD*/\
-	MUX_VAL(CP(ETK_D0_ES2),		(IEN  | PTU | EN  | M4)) /*GPIO_14*/\
-	MUX_VAL(CP(ETK_D3_ES2),		(IEN  | PTU | EN  | M2)) /*MMC3_DAT3*/\
-	MUX_VAL(CP(ETK_D4_ES2),		(IEN  | PTU | EN  | M2)) /*MMC3_DAT0*/\
-	MUX_VAL(CP(ETK_D5_ES2),		(IEN  | PTU | EN  | M2)) /*MMC3_DAT1*/\
-	MUX_VAL(CP(ETK_D6_ES2),		(IEN  | PTU | EN  | M2)) /*MMC3_DAT2*/\
-	MUX_VAL(CP(ETK_D7_ES2),		(IEN  | PTU | EN  | M4)) /*GPIO_21*/\
-	MUX_VAL(CP(ETK_D8_ES2),		(IEN  | PTU | EN  | M4)) /*GPIO_22*/\
-	MUX_VAL(CP(ETK_D9_ES2),		(IEN  | PTU | EN  | M4)) /*GPIO_23*/\
-
-#define MUX_OVERO_SDIO2_DIRECT() \
-	MUX_VAL(CP(MMC2_CLK),		(IEN  | PTU | EN  | M0)) /*MMC2_CLK*/\
-	MUX_VAL(CP(MMC2_CMD),		(IEN  | PTU | EN  | M0)) /*MMC2_CMD*/\
-	MUX_VAL(CP(MMC2_DAT0),		(IEN  | PTU | EN  | M0)) /*MMC2_DAT0*/\
-	MUX_VAL(CP(MMC2_DAT1),		(IEN  | PTU | EN  | M0)) /*MMC2_DAT1*/\
-	MUX_VAL(CP(MMC2_DAT2),		(IEN  | PTU | EN  | M0)) /*MMC2_DAT2*/\
-	MUX_VAL(CP(MMC2_DAT3),		(IEN  | PTU | EN  | M0)) /*MMC2_DAT3*/\
-	MUX_VAL(CP(MMC2_DAT4),		(IEN  | PTU | EN  | M0)) /*MMC2_DAT4*/\
-	MUX_VAL(CP(MMC2_DAT5),		(IEN  | PTU | EN  | M0)) /*MMC2_DAT5*/\
-	MUX_VAL(CP(MMC2_DAT6),		(IEN  | PTU | EN  | M0)) /*MMC2_DAT6*/\
-	MUX_VAL(CP(MMC2_DAT7),		(IEN  | PTU | EN  | M0)) /*MMC2_DAT7*/\
-	MUX_VAL(CP(MMC1_DAT4),		(IEN  | PTD | EN  | M4)) /*GPIO_126*/\
-	MUX_VAL(CP(MMC1_DAT5),		(IEN  | PTU | EN  | M4)) /*GPIO_127*/\
-	MUX_VAL(CP(MMC1_DAT6),		(IEN  | PTU | EN  | M4)) /*GPIO_128*/\
-	MUX_VAL(CP(MMC1_DAT7),		(IEN  | PTU | EN  | M4)) /*GPIO_129*/
-
-#define MUX_OVERO_SDIO2_TRANSCEIVER() \
-	MUX_VAL(CP(MMC2_CLK),		(IEN  | PTU | EN  | M0)) /*MMC2_CLK*/\
-	MUX_VAL(CP(MMC2_CMD),		(IEN  | PTU | EN  | M0)) /*MMC2_CMD*/\
-	MUX_VAL(CP(MMC2_DAT0),		(IEN  | PTU | EN  | M0)) /*MMC2_DAT0*/\
-	MUX_VAL(CP(MMC2_DAT1),		(IEN  | PTU | EN  | M0)) /*MMC2_DAT1*/\
-	MUX_VAL(CP(MMC2_DAT2),		(IEN  | PTU | EN  | M0)) /*MMC2_DAT2*/\
-	MUX_VAL(CP(MMC2_DAT3),		(IEN  | PTU | EN  | M0)) /*MMC2_DAT3*/\
-	MUX_VAL(CP(MMC2_DAT4),		(IEN  | PTU | EN  | M1)) /*MMC2_DIR_DAT0*/\
-	MUX_VAL(CP(MMC2_DAT5),		(IEN  | PTU | EN  | M1)) /*MMC2_DIR_DAT1*/\
-	MUX_VAL(CP(MMC2_DAT6),		(IEN  | PTU | EN  | M1)) /*MMC2_DIR_CMD*/\
-	MUX_VAL(CP(MMC2_DAT7),		(IEN  | PTU | EN  | M1)) /*MMC2_CLKIN*/\
-	MUX_VAL(CP(MMC1_DAT4),		(IEN  | PTU | EN  | M4)) /*GPIO_126*/\
-	MUX_VAL(CP(MMC1_DAT5),		(IEN  | PTU | EN  | M4)) /*GPIO_127*/\
-	MUX_VAL(CP(MMC1_DAT6),		(IEN  | PTU | EN  | M4)) /*GPIO_128*/\
-	MUX_VAL(CP(MMC1_DAT7),		(IEN  | PTU | EN  | M4)) /*GPIO_129*/
-
-#define MUX_USRP_E() \
-	MUX_VAL(CP(MCSPI1_SOMI),	(IEN  | PTD | DIS | M4)) /*GPIO_173 */\
-	MUX_VAL(CP(MCSPI1_CS1),		(IDIS | PTD | EN  | M4)) /*GPIO_175 */\
-
-#define MUX_ALTO35() \
-	MUX_VAL(CP(SYS_CLKOUT1),	(IEN  | PTU | EN  | M4)) /*GPIO_10-BTN*/\
-	MUX_VAL(CP(UART1_TX),		(IDIS | PTD | DIS | M4)) /*GPIO_148-RED LED*/\
-	MUX_VAL(CP(UART1_CTS),		(IDIS | PTD | DIS | M4)) /*GPIO_150-YELLOW LED*/\
-	MUX_VAL(CP(UART1_RX),		(IDIS | PTD | DIS | M4)) /*GPIO_151-BLUE LED*/\
-	MUX_VAL(CP(HDQ_SIO),		(IDIS | PTD | DIS | M4)) /*GPIO_170-GREEN LED*/\
-	MUX_VAL(CP(MCSPI1_CS1),		(IDIS | PTD | EN  | M4)) /*GPIO_175*/\
-
-#define MUX_ARBOR43C() \
-	MUX_VAL(CP(CSI2_DX1),		(IDIS | PTD | DIS | M4)) /*GPIO_114-RED LED*/\
-	MUX_VAL(CP(UART1_CTS),		(IDIS | PTD | DIS | M4)) /*GPIO_150-YELLOW LED*/\
-	MUX_VAL(CP(HDQ_SIO),		(IEN  | PTU | EN  | M4)) /*GPIO_170-BUTTON */\
-	MUX_VAL(CP(SYS_CLKOUT2),	(IDIS | PTD | DIS | M4)) /*GPIO_186-BLUE LED*/\
-	MUX_VAL(CP(JTAG_EMU1),		(IDIS | PTD | DIS | M4)) /*GPIO_31-CAP WAKE*/\
-	MUX_VAL(CP(SYS_CLKOUT1),	(IEN  | PTU | EN  | M4)) /*GPIO_10-CAP IRQ*/\
-
-#endif
diff --git a/board/overo/spl.c b/board/overo/spl.c
deleted file mode 100644
index 91d8091..0000000
--- a/board/overo/spl.c
+++ /dev/null
@@ -1,61 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Maintainer : Steve Sakoman <steve@sakoman.com>
- *
- * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
- *      Richard Woodruff <r-woodruff2@ti.com>
- *      Syed Mohammed Khasim <khasim@ti.com>
- *      Sunil Kumar <sunilsaini05@gmail.com>
- *      Shashi Ranjan <shashiranjanmca05@gmail.com>
- *
- * (C) Copyright 2004-2008
- * Texas Instruments, <www.ti.com>
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/mem.h>
-#include <asm/arch/sys_proto.h>
-#include "overo.h"
-
-/*
- * Routine: get_board_mem_timings
- * Description: If we use SPL then there is no x-loader nor config header
- * so we have to setup the DDR timings ourself on both banks.
- */
-void get_board_mem_timings(struct board_sdrc_timings *timings)
-{
-	timings->mr = MICRON_V_MR_165;
-	switch (get_board_revision()) {
-	case REVISION_0: /* Micron 1286MB/256MB, 1/2 banks of 128MB */
-		timings->mcfg = MICRON_V_MCFG_165(256 << 20);
-		timings->ctrla = MICRON_V_ACTIMA_165;
-		timings->ctrlb = MICRON_V_ACTIMB_165;
-		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
-		break;
-	case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */
-	case REVISION_4:
-		timings->mcfg = MICRON_V_MCFG_200(256 << 20);
-		timings->ctrla = MICRON_V_ACTIMA_200;
-		timings->ctrlb = MICRON_V_ACTIMB_200;
-		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
-		break;
-	case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */
-		timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
-		timings->ctrla = HYNIX_V_ACTIMA_200;
-		timings->ctrlb = HYNIX_V_ACTIMB_200;
-		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
-		break;
-	case REVISION_3: /* Micron 512MB/1024MB, 1/2 banks of 512MB */
-		timings->mcfg = MCFG(512 << 20, 15);
-		timings->ctrla = MICRON_V_ACTIMA_200;
-		timings->ctrlb = MICRON_V_ACTIMB_200;
-		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
-		break;
-	default:
-		timings->mcfg = MICRON_V_MCFG_165(128 << 20);
-		timings->ctrla = MICRON_V_ACTIMA_165;
-		timings->ctrlb = MICRON_V_ACTIMB_165;
-		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
-	}
-}