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authorTom Rini <trini@konsulko.com>2021-05-12 10:07:21 -0400
committerTom Rini <trini@konsulko.com>2021-05-12 10:07:21 -0400
commitea184cbff99ea1d82dcf94c95afe054e95da5069 (patch)
tree48553e6cf25f0b5f34483c3fddafdebbbc240b55 /board
parent59a2b9e605c5a5e2dff35506a13b51f33d3051b4 (diff)
parentbbc9da58b332bd44e51ac5579040ea984b2f963b (diff)
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Merge tag 'ti-v2021.07-rc3' of https://source.denx.de/u-boot/custodians/u-boot-tiWIP/12May2021
- Initial support for AM64 EVM and SK - K3 DDR driver unification for J7 and AM64 platforms. - Minor fixes for TI clock driver
Diffstat (limited to 'board')
-rw-r--r--board/ti/am64x/Kconfig62
-rw-r--r--board/ti/am64x/MAINTAINERS8
-rw-r--r--board/ti/am64x/Makefile8
-rw-r--r--board/ti/am64x/evm.c154
-rw-r--r--board/ti/j721e/Kconfig4
5 files changed, 234 insertions, 2 deletions
diff --git a/board/ti/am64x/Kconfig b/board/ti/am64x/Kconfig
new file mode 100644
index 0000000..d4ec759
--- /dev/null
+++ b/board/ti/am64x/Kconfig
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
+
+choice
+ prompt "K3 AM64 based boards"
+ optional
+
+config TARGET_AM642_A53_EVM
+ bool "TI K3 based AM642 EVM running on A53"
+ select ARM64
+ select SOC_K3_AM642
+ imply BOARD
+ imply SPL_BOARD
+ imply TI_I2C_BOARD_DETECT
+
+config TARGET_AM642_R5_EVM
+ bool "TI K3 based AM642 EVM running on R5"
+ select CPU_V7R
+ select SYS_THUMB_BUILD
+ select K3_LOAD_SYSFW
+ select SOC_K3_AM642
+ select RAM
+ select SPL_RAM
+ select K3_DDRSS
+ imply SYS_K3_SPL_ATF
+ imply TI_I2C_BOARD_DETECT
+
+endchoice
+
+if TARGET_AM642_A53_EVM
+
+config SYS_BOARD
+ default "am64x"
+
+config SYS_VENDOR
+ default "ti"
+
+config SYS_CONFIG_NAME
+ default "am64x_evm"
+
+source "board/ti/common/Kconfig"
+
+endif
+
+if TARGET_AM642_R5_EVM
+
+config SYS_BOARD
+ default "am64x"
+
+config SYS_VENDOR
+ default "ti"
+
+config SYS_CONFIG_NAME
+ default "am64x_evm"
+
+config SPL_LDSCRIPT
+ default "arch/arm/mach-omap2/u-boot-spl.lds"
+
+source "board/ti/common/Kconfig"
+
+endif
diff --git a/board/ti/am64x/MAINTAINERS b/board/ti/am64x/MAINTAINERS
new file mode 100644
index 0000000..d384a33
--- /dev/null
+++ b/board/ti/am64x/MAINTAINERS
@@ -0,0 +1,8 @@
+AM64x BOARD
+M: Dave Gerlach <d-gerlach@ti.com>
+M: Lokesh Vutla <lokeshvutla@ti.com>
+S: Maintained
+F: board/ti/am64x/
+F: include/configs/am64x_evm.h
+F: configs/am64x_evm_r5_defconfig
+F: configs/am64x_evm_a53_defconfig
diff --git a/board/ti/am64x/Makefile b/board/ti/am64x/Makefile
new file mode 100644
index 0000000..8b98e6f
--- /dev/null
+++ b/board/ti/am64x/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
+# Keerthy <j-keerthy@ti.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += evm.o
diff --git a/board/ti/am64x/evm.c b/board/ti/am64x/evm.c
new file mode 100644
index 0000000..35cd9e0
--- /dev/null
+++ b/board/ti/am64x/evm.c
@@ -0,0 +1,154 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Board specific initialization for AM642 EVM
+ *
+ * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
+ * Keerthy <j-keerthy@ti.com>
+ *
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <spl.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/sys_proto.h>
+#include <env.h>
+
+#include "../common/board_detect.h"
+
+#define board_is_am64x_gpevm() board_ti_k3_is("AM64-GPEVM")
+#define board_is_am64x_skevm() board_ti_k3_is("AM64-SKEVM")
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = 0x80000000;
+
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ /* Bank 0 declares the memory available in the DDR low region */
+ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].size = 0x80000000;
+ gd->ram_size = 0x80000000;
+
+ return 0;
+}
+
+#if defined(CONFIG_SPL_LOAD_FIT)
+int board_fit_config_name_match(const char *name)
+{
+ bool eeprom_read = board_ti_was_eeprom_read();
+
+ if (!eeprom_read || board_is_am64x_gpevm()) {
+ if (!strcmp(name, "k3-am642-r5-evm") || !strcmp(name, "k3-am642-evm"))
+ return 0;
+ } else if (board_is_am64x_skevm()) {
+ if (!strcmp(name, "k3-am642-r5-sk") || !strcmp(name, "k3-am642-sk"))
+ return 0;
+ }
+
+ return -1;
+}
+#endif
+
+#ifdef CONFIG_TI_I2C_BOARD_DETECT
+int do_board_detect(void)
+{
+ int ret;
+
+ ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
+ CONFIG_EEPROM_CHIP_ADDRESS);
+ if (ret) {
+ printf("EEPROM not available at 0x%02x, trying to read at 0x%02x\n",
+ CONFIG_EEPROM_CHIP_ADDRESS, CONFIG_EEPROM_CHIP_ADDRESS + 1);
+ ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
+ CONFIG_EEPROM_CHIP_ADDRESS + 1);
+ if (ret)
+ pr_err("Reading on-board EEPROM at 0x%02x failed %d\n",
+ CONFIG_EEPROM_CHIP_ADDRESS + 1, ret);
+ }
+
+ return ret;
+}
+
+int checkboard(void)
+{
+ struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
+
+ if (!do_board_detect())
+ printf("Board: %s rev %s\n", ep->name, ep->version);
+
+ return 0;
+}
+
+#ifdef CONFIG_BOARD_LATE_INIT
+static void setup_board_eeprom_env(void)
+{
+ char *name = "am64x_gpevm";
+
+ if (do_board_detect())
+ goto invalid_eeprom;
+
+ if (board_is_am64x_gpevm())
+ name = "am64x_gpevm";
+ else if (board_is_am64x_skevm())
+ name = "am64x_skevm";
+ else
+ printf("Unidentified board claims %s in eeprom header\n",
+ board_ti_get_name());
+
+invalid_eeprom:
+ set_board_info_env_am6(name);
+}
+
+static void setup_serial(void)
+{
+ struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
+ unsigned long board_serial;
+ char *endp;
+ char serial_string[17] = { 0 };
+
+ if (env_get("serial#"))
+ return;
+
+ board_serial = simple_strtoul(ep->serial, &endp, 16);
+ if (*endp != '\0') {
+ pr_err("Error: Can't set serial# to %s\n", ep->serial);
+ return;
+ }
+
+ snprintf(serial_string, sizeof(serial_string), "%016lx", board_serial);
+ env_set("serial#", serial_string);
+}
+#endif
+#endif
+
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+ if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) {
+ struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
+
+ setup_board_eeprom_env();
+ setup_serial();
+ /*
+ * The first MAC address for ethernet a.k.a. ethernet0 comes from
+ * efuse populated via the am654 gigabit eth switch subsystem driver.
+ * All the other ones are populated via EEPROM, hence continue with
+ * an index of 1.
+ */
+ board_ti_am6_set_ethaddr(1, ep->mac_addr_cnt);
+ }
+
+ return 0;
+}
+#endif
diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig
index 2cbe2b2..c28752a 100644
--- a/board/ti/j721e/Kconfig
+++ b/board/ti/j721e/Kconfig
@@ -23,7 +23,7 @@ config TARGET_J721E_R5_EVM
select K3_LOAD_SYSFW
select RAM
select SPL_RAM
- select K3_J721E_DDRSS
+ select K3_DDRSS
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT
@@ -43,7 +43,7 @@ config TARGET_J7200_R5_EVM
select K3_LOAD_SYSFW
select RAM
select SPL_RAM
- select K3_J721E_DDRSS
+ select K3_DDRSS
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT