Merge tag 'xilinx-for-v2023.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblazeWIP/27Jan2023

Xilinx chnages for v2023.04-rc1

makefile:
- Add multi_dtb_fit dependency

clk:
- Handle error cases

microblaze:
- Disable falcon mode and cleanup code around

xilinx:
- Enable regular expression matching in board_fit_config_name_match()
- Fix FRU handling for 0xC1 format
- Fix Xilinx legacy format eeprom parsing

zynqmp:
- Some DT updates/cleanups
- Fix IDcode for xck24
- Remove empty mini config files
- Add support for k24

versal:
- Remove empty mini config files

versal_net:
- Setup timer when runs in EL3
- Build u-boot.elf for mini configurations

zynq-gem:
- Add support for new compatible strings
- Remove support for Avnet Ultrazedev SOM
- Handle SGMII with PCS phy

spi:
- Add support for gigadevice parts

misc:
- Remove CONFIG_TARGET_VENUS ifdef
- Add missing headers to remove sparse warnings

8 files changed, 1174 insertions, 691 deletions

diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index 59d87f2..fbc76ee 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -1,7 +1,9 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * (C) Copyright 2014 - 2020 Xilinx, Inc.
- * Michal Simek <michal.simek@xilinx.com>
+ * (C) Copyright 2014 - 2022, Xilinx, Inc.
+ * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <michal.simek@amd.com>
  */
 
 #include <common.h>
@@ -9,6 +11,7 @@
 #include <efi_loader.h>
 #include <env.h>
 #include <image.h>
+#include <init.h>
 #include <lmb.h>
 #include <log.h>
 #include <asm/global_data.h>
@@ -22,6 +25,7 @@
 #include <i2c_eeprom.h>
 #include <net.h>
 #include <generated/dt.h>
+#include <slre.h>
 #include <soc.h>
 #include <linux/ctype.h>
 #include <linux/kernel.h>
@@ -82,7 +86,7 @@ static struct xilinx_board_description *board_info;
 struct xilinx_legacy_format {
 	char board_sn[18]; /* 0x0 */
 	char unused0[14]; /* 0x12 */
-	char eth_mac[6]; /* 0x20 */
+	char eth_mac[ETH_ALEN]; /* 0x20 */
 	char unused1[170]; /* 0x26 */
 	char board_name[11]; /* 0xd0 */
 	char unused2[5]; /* 0xdc */
@@ -98,9 +102,13 @@ static void xilinx_eeprom_legacy_cleanup(char *eeprom, int size)
 	for (i = 0; i < size; i++) {
 		byte = eeprom[i];
 
-		/* Remove all ffs and spaces */
-		if (byte == 0xff || byte == ' ')
+		/* Remove all non printable chars but ignore MAC address */
+		if ((i < offsetof(struct xilinx_legacy_format, eth_mac) ||
+		     i >= offsetof(struct xilinx_legacy_format, unused1)) &&
+		     (byte < '!' || byte > '~')) {
 			eeprom[i] = 0;
+			continue;
+		}
 
 		/* Convert strings to lower case */
 		if (byte >= 'A' && byte <= 'Z')
@@ -133,21 +141,25 @@ static int xilinx_read_eeprom_legacy(struct udevice *dev, char *name,
 
 	xilinx_eeprom_legacy_cleanup((char *)eeprom_content, size);
 
-	printf("Xilinx I2C Legacy format at %s:\n", name);
-	printf(" Board name:\t%s\n", eeprom_content->board_name);
-	printf(" Board rev:\t%s\n", eeprom_content->board_revision);
-	printf(" Board SN:\t%s\n", eeprom_content->board_sn);
+	/* Terminating \0 chars are the part of desc fields already */
+	strlcpy(desc->name, eeprom_content->board_name,
+		sizeof(eeprom_content->board_name) + 1);
+	strlcpy(desc->revision, eeprom_content->board_revision,
+		sizeof(eeprom_content->board_revision) + 1);
+	strlcpy(desc->serial, eeprom_content->board_sn,
+		sizeof(eeprom_content->board_sn) + 1);
 
 	eth_valid = is_valid_ethaddr((const u8 *)eeprom_content->eth_mac);
 	if (eth_valid)
-		printf(" Ethernet mac:\t%pM\n", eeprom_content->eth_mac);
+		memcpy(desc->mac_addr[0], eeprom_content->eth_mac, ETH_ALEN);
+
+	printf("Xilinx I2C Legacy format at %s:\n", name);
+	printf(" Board name:\t%s\n", desc->name);
+	printf(" Board rev:\t%s\n", desc->revision);
+	printf(" Board SN:\t%s\n", desc->serial);
 
-	/* Terminating \0 chars ensure end of string */
-	strcpy(desc->name, eeprom_content->board_name);
-	strcpy(desc->revision, eeprom_content->board_revision);
-	strcpy(desc->serial, eeprom_content->board_sn);
 	if (eth_valid)
-		memcpy(desc->mac_addr[0], eeprom_content->eth_mac, ETH_ALEN);
+		printf(" Ethernet mac:\t%pM\n", desc->mac_addr);
 
 	desc->header = EEPROM_HEADER_MAGIC;
 
@@ -468,6 +480,21 @@ int __maybe_unused board_fit_config_name_match(const char *name)
 {
 	debug("%s: Check %s, default %s\n", __func__, name, board_name);
 
+#if !defined(CONFIG_SPL_BUILD)
+	if (CONFIG_IS_ENABLED(REGEX)) {
+		struct slre slre;
+		int ret;
+
+		ret = slre_compile(&slre, name);
+		if (ret) {
+			ret = slre_match(&slre, board_name, strlen(board_name),
+					 NULL);
+			debug("%s: name match ret = %d\n", __func__,  ret);
+			return !ret;
+		}
+	}
+#endif
+
 	if (!strcmp(name, board_name))
 		return 0;
 
diff --git a/board/xilinx/common/fru_ops.c b/board/xilinx/common/fru_ops.c
index c4f009a..167252c 100644
--- a/board/xilinx/common/fru_ops.c
+++ b/board/xilinx/common/fru_ops.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * (C) Copyright 2019 - 2020 Xilinx, Inc.
+ * (C) Copyright 2019 - 2022, Xilinx, Inc.
+ * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
  */
 
 #include <common.h>
@@ -61,9 +62,6 @@ static int fru_check_type_len(u8 type_len, u8 language, u8 *type)
 {
 	int len;
 
-	if (type_len == FRU_TYPELEN_EOF)
-		return -EINVAL;
-
 	*type = (type_len & FRU_TYPELEN_CODE_MASK) >> FRU_TYPELEN_TYPE_SHIFT;
 
 	len = type_len & FRU_TYPELEN_LEN_MASK;
@@ -172,9 +170,16 @@ static int fru_parse_board(unsigned long addr)
 {
 	u8 i, type;
 	int len;
-	u8 *data, *term, *limit;
+	u8 *data, *term, *limit, *next_addr, *eof;
 
 	memcpy(&fru_data.brd.ver, (void *)addr, 6);
+
+	/*
+	 * eof marks the last data byte (without checksum). That's why checksum
+	 * is address length - 1 and last data byte is length - 2.
+	 */
+	eof = (u8 *)(fru_data.brd.len * 8 + addr - 2);
+
 	addr += 6;
 	data = (u8 *)&fru_data.brd.manufacturer_type_len;
 
@@ -184,10 +189,21 @@ static int fru_parse_board(unsigned long addr)
 	for (i = 0; ; i++, data += FRU_BOARD_MAX_LEN) {
 		len = fru_check_type_len(*(u8 *)addr, fru_data.brd.lang_code,
 					 &type);
+		next_addr = (u8 *)addr + 1;
+
+		if ((u8 *)addr >= eof) {
+			debug("Reach EOF record: addr %lx, eof %lx\n", addr,
+			      (unsigned long)eof);
+			break;
+		}
+
 		/*
-		 * Stop cature if it end of fields
+		 * Stop capture if the type is ASCII and valid field length
+		 * is 1 (0xc1) and next FRU data is less than 0x20 (space " ")
+		 * or it is 0x7f (delete 'DEL').
 		 */
-		if (len == -EINVAL)
+		if (type == FRU_TYPELEN_TYPE_ASCII8 && len == 1	&&
+		    (*next_addr < 0x20 || *next_addr == 0x7F))
 			break;
 
 		/* Stop when amount of chars is more then fields to record */
@@ -332,9 +348,11 @@ static int fru_display_board(struct fru_board_data *brd, int verbose)
 	for (u8 i = 0; i < (sizeof(boardinfo) / sizeof(*boardinfo)); i++) {
 		len = fru_check_type_len(*data++, brd->lang_code,
 					 &type);
-		if (len == -EINVAL) {
-			printf("**** EOF for Board Area ****\n");
-			break;
+
+		/* Empty record has no len/type filled */
+		if (!len) {
+			debug("%s not found\n", boardinfo[i]);
+			continue;
 		}
 
 		if (type <= FRU_TYPELEN_TYPE_ASCII8 &&
@@ -344,11 +362,6 @@ static int fru_display_board(struct fru_board_data *brd, int verbose)
 		else
 			debug("Type code: %s\n", typecode[type + 1]);
 
-		if (!len) {
-			debug("%s not found\n", boardinfo[i]);
-			continue;
-		}
-
 		switch (type) {
 		case FRU_TYPELEN_TYPE_BINARY:
 			debug("Length: %d\n", len);
diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c
index 7600319..5fb7110 100644
--- a/board/xilinx/versal-net/board.c
+++ b/board/xilinx/versal-net/board.c
@@ -121,6 +121,47 @@ int board_early_init_f(void)
 
 int board_early_init_r(void)
 {
+	u32 val;
+
+	if (current_el() != 3)
+		return 0;
+
+	debug("iou_switch ctrl div0 %x\n",
+	      readl(&crlapb_base->iou_switch_ctrl));
+
+	writel(IOU_SWITCH_CTRL_CLKACT_BIT |
+	       (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT),
+	       &crlapb_base->iou_switch_ctrl);
+
+	/* Global timer init - Program time stamp reference clk */
+	val = readl(&crlapb_base->timestamp_ref_ctrl);
+	val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT;
+	writel(val, &crlapb_base->timestamp_ref_ctrl);
+
+	debug("ref ctrl 0x%x\n",
+	      readl(&crlapb_base->timestamp_ref_ctrl));
+
+	/* Clear reset of timestamp reg */
+	writel(0, &crlapb_base->rst_timestamp);
+
+	/*
+	 * Program freq register in System counter and
+	 * enable system counter.
+	 */
+	writel(CONFIG_COUNTER_FREQUENCY,
+	       &iou_scntr_secure->base_frequency_id_register);
+
+	debug("counter val 0x%x\n",
+	      readl(&iou_scntr_secure->base_frequency_id_register));
+
+	writel(IOU_SCNTRS_CONTROL_EN,
+	       &iou_scntr_secure->counter_control_register);
+
+	debug("scntrs control 0x%x\n",
+	      readl(&iou_scntr_secure->counter_control_register));
+	debug("timer 0x%llx\n", get_ticks());
+	debug("timer 0x%llx\n", get_ticks());
+
 	return 0;
 }
 
diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index f9f5457..4cdc2ec 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -4,6 +4,7 @@
  * Michal Simek <michal.simek@xilinx.com>
  */
 
+#include <command.h>
 #include <common.h>
 #include <cpu_func.h>
 #include <env.h>
diff --git a/board/xilinx/zynqmp/MAINTAINERS b/board/xilinx/zynqmp/MAINTAINERS
index 07b91b8..a4527f8 100644
--- a/board/xilinx/zynqmp/MAINTAINERS
+++ b/board/xilinx/zynqmp/MAINTAINERS
@@ -9,9 +9,3 @@ F:	board/xilinx/zynqmp/
 F:	include/configs/xilinx_zynqmp*
 F:	configs/xilinx_zynqmp*
 F:	configs/avnet_ultra96_rev1_defconfig
-
-ARM ZYNQMP AVNET ULTRAZED EV BOARD
-M:	Luca Ceresoli <luca.ceresoli@bootlin.com>
-S:	Maintained
-F:	arch/arm/dts/avnet-ultrazedev-*
-F:	configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig
diff --git a/board/xilinx/zynqmp/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0/psu_init_gpl.c b/board/xilinx/zynqmp/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0/psu_init_gpl.c
deleted file mode 100644
index d030e79..0000000
--- a/board/xilinx/zynqmp/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0/psu_init_gpl.c
+++ /dev/null
@@ -1,655 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (c) Copyright 2015 Xilinx, Inc. All rights reserved.
- */
-
-#include <asm/arch/psu_init_gpl.h>
-#include <xil_io.h>
-
-static unsigned long psu_pll_init_data(void)
-{
-	psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U);
-	psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014800U);
-	psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U);
-	psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U);
-	psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U);
-	mask_poll(0xFF5E0040, 0x00000002U);
-	psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U);
-	psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U);
-	psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012300U);
-	psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E4B0C82U);
-	psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00015A00U);
-	psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U);
-	psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U);
-	psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U);
-	mask_poll(0xFF5E0040, 0x00000001U);
-	psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U);
-	psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U);
-	psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
-	psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014200U);
-	psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U);
-	psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U);
-	psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U);
-	mask_poll(0xFD1A0044, 0x00000001U);
-	psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U);
-	psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U);
-	psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
-	psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014800U);
-	psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U);
-	psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U);
-	psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U);
-	mask_poll(0xFD1A0044, 0x00000002U);
-	psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U);
-	psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U);
-	psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C82U);
-	psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00015A00U);
-	psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U);
-	psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U);
-	psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U);
-	mask_poll(0xFD1A0044, 0x00000004U);
-	psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U);
-	psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U);
-
-	return 1;
-}
-
-static unsigned long psu_clock_init_data(void)
-{
-	psu_mask_write(0xFF5E005C, 0x063F3F07U, 0x06010C00U);
-	psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U);
-	psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U);
-	psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x02031900U);
-	psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010C00U);
-	psu_mask_write(0xFF5E006C, 0x013F3F07U, 0x01010602U);
-	psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010602U);
-	psu_mask_write(0xFF18030C, 0x00020003U, 0x00000000U);
-	psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U);
-	psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U);
-	psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U);
-	psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U);
-	psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U);
-	psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U);
-	psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
-	psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
-	psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
-	psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
-	psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U);
-	psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011E02U);
-	psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U);
-	psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U);
-	psu_mask_write(0xFD1A00A0, 0x01003F07U, 0x01000200U);
-	psu_mask_write(0xFD1A00B4, 0x01003F07U, 0x01000200U);
-	psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010500U);
-	psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01011003U);
-	psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01010F03U);
-	psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
-	psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U);
-	psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U);
-	psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U);
-	psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U);
-	psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U);
-	psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000303U);
-	psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U);
-	psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U);
-	psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U);
-	psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U);
-	psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U);
-	psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U);
-
-	return 1;
-}
-
-static unsigned long psu_ddr_init_data(void)
-{
-	psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U);
-	psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x81040010U);
-	psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U);
-	psu_mask_write(0xFD070020, 0x000003F3U, 0x00000300U);
-	psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U);
-	psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U);
-	psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00409410U);
-	psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U);
-	psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U);
-	psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U);
-	psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x009280D2U);
-	psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U);
-	psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U);
-	psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U);
-	psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0048051FU);
-	psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020126U);
-	psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00020000U);
-	psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002705U);
-	psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x09340301U);
-	psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00280200U);
-	psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U);
-	psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x000006C0U);
-	psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U);
-	psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U);
-	psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU);
-	psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x131C2813U);
-	psu_mask_write(0xFD070104, 0x001F1F7FU, 0x0004041CU);
-	psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0808050FU);
-	psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU);
-	psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030409U);
-	psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U);
-	psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U);
-	psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U);
-	psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x05050D08U);
-	psu_mask_write(0xFD070124, 0x40070F3FU, 0x0002040CU);
-	psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x1308010EU);
-	psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U);
-	psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x81000040U);
-	psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x0201C9C2U);
-	psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048C820DU);
-	psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U);
-	psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U);
-	psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U);
-	psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U);
-	psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x00C800FFU);
-	psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U);
-	psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000A0BU);
-	psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U);
-	psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU);
-	psu_mask_write(0xFD070204, 0x001F1F1FU, 0x001F0909U);
-	psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U);
-	psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x00000000U);
-	psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU);
-	psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x070F0707U);
-	psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x07070707U);
-	psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU);
-	psu_mask_write(0xFD070220, 0x00001F1FU, 0x00001F08U);
-	psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x07070707U);
-	psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x07070707U);
-	psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000007U);
-	psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x06000600U);
-	psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U);
-	psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U);
-	psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U);
-	psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U);
-	psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U);
-	psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U);
-	psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U);
-	psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U);
-	psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U);
-	psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U);
-	psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU);
-	psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU);
-	psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U);
-	psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU);
-	psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U);
-	psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU);
-	psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU);
-	psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U);
-	psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U);
-	psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U);
-	psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU);
-	psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU);
-	psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U);
-	psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U);
-	psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U);
-	psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU);
-	psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU);
-	psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U);
-	psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U);
-	psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU);
-	psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U);
-	psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU);
-	psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU);
-	psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU);
-	psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U);
-	psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U);
-	psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU);
-	psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U);
-	psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU);
-	psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU);
-	psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU);
-	psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U);
-	psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U);
-	psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU);
-	psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U);
-	psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU);
-	psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U);
-	psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U);
-	psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U);
-	psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU);
-	psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U);
-	psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U);
-	psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U);
-	psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F12090U);
-	psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U);
-	psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U);
-	psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x4B025810U);
-	psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0xEA601518U);
-	psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x000E0000U);
-	psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U);
-	psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD0800C4, 0xFFFFFFFFU, 0x000000DDU);
-	psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU);
-	psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x08261009U);
-	psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28380008U);
-	psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x000F0300U);
-	psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U);
-	psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01A42B08U);
-	psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00371009U);
-	psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00001010U);
-	psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U);
-	psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U);
-	psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000300U);
-	psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000834U);
-	psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000301U);
-	psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000028U);
-	psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000200U);
-	psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x000006C0U);
-	psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000819U);
-	psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU);
-	psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U);
-	psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU);
-	psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U);
-	psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U);
-	psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U);
-	psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U);
-	psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12341000U);
-	psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U);
-	psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U);
-	psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U);
-	psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U);
-	psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U);
-	psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0CEU);
-	psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF9032019U);
-	psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U);
-	psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008AEA58U);
-	psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000079DDU);
-	psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U);
-	psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U);
-	psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x00087BDBU);
-	psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U);
-	psu_mask_write(0xFD080704, 0xFFFFFFFFU, 0x00007FFFU);
-	psu_mask_write(0xFD08070C, 0xFFFFFFFFU, 0x3F000008U);
-	psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B03CU);
-	psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09094F4FU);
-	psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU);
-	psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U);
-	psu_mask_write(0xFD080804, 0xFFFFFFFFU, 0x00007FFFU);
-	psu_mask_write(0xFD08080C, 0xFFFFFFFFU, 0x3F000008U);
-	psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B03CU);
-	psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09094F4FU);
-	psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU);
-	psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U);
-	psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU);
-	psu_mask_write(0xFD08090C, 0xFFFFFFFFU, 0x3F000008U);
-	psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B03CU);
-	psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09094F4FU);
-	psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU);
-	psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U);
-	psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU);
-	psu_mask_write(0xFD080A0C, 0xFFFFFFFFU, 0x3F000008U);
-	psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B03CU);
-	psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09094F4FU);
-	psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU);
-	psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U);
-	psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU);
-	psu_mask_write(0xFD080B08, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD080B0C, 0xFFFFFFFFU, 0x3F000008U);
-	psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B004U);
-	psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09094F4FU);
-	psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU);
-	psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U);
-	psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU);
-	psu_mask_write(0xFD080C08, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD080C0C, 0xFFFFFFFFU, 0x3F000008U);
-	psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B03CU);
-	psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09094F4FU);
-	psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU);
-	psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U);
-	psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU);
-	psu_mask_write(0xFD080D08, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD080D0C, 0xFFFFFFFFU, 0x3F000008U);
-	psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B004U);
-	psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09094F4FU);
-	psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU);
-	psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U);
-	psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU);
-	psu_mask_write(0xFD080E08, 0xFFFFFFFFU, 0x00000000U);
-	psu_mask_write(0xFD080E0C, 0xFFFFFFFFU, 0x3F000008U);
-	psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B03CU);
-	psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09094F4FU);
-	psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU);
-	psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x80803660U);
-	psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x55556000U);
-	psu_mask_write(0xFD080F08, 0xFFFFFFFFU, 0xAAAAAAAAU);
-	psu_mask_write(0xFD080F0C, 0xFFFFFFFFU, 0x0029A4A4U);
-	psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0C00B000U);
-	psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09094F4FU);
-	psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU);
-	psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU);
-	psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x000E0000U);
-	psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U);
-	psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U);
-	psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70800000U);
-	psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU);
-	psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x000E0000U);
-	psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U);
-	psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U);
-	psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70800000U);
-	psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU);
-	psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x000E0000U);
-	psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U);
-	psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U);
-	psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70800000U);
-	psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU);
-	psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x000E0000U);
-	psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U);
-	psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U);
-	psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70800000U);
-	psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x15019FFEU);
-	psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x200E0000U);
-	psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01266300U);
-	psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U);
-	psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70400000U);
-	psu_mask_write(0xFD0817C4, 0xFFFFFFFFU, 0x000E0000U);
-	psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U);
-
-	return 1;
-}
-
-static unsigned long psu_ddr_qos_init_data(void)
-{
-	return 1;
-}
-
-static unsigned long psu_mio_init_data(void)
-{
-	psu_mask_write(0xFF180000, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180004, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180008, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180018, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180020, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180024, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180028, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180030, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180034, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF180038, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF180040, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF180044, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF180048, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF18004C, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF180050, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF180054, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF180058, 0x000000FEU, 0x00000008U);
-	psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000000U);
-	psu_mask_write(0xFF180060, 0x000000FEU, 0x00000040U);
-	psu_mask_write(0xFF180064, 0x000000FEU, 0x00000040U);
-	psu_mask_write(0xFF180068, 0x000000FEU, 0x00000000U);
-	psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000018U);
-	psu_mask_write(0xFF180070, 0x000000FEU, 0x00000018U);
-	psu_mask_write(0xFF180074, 0x000000FEU, 0x00000018U);
-	psu_mask_write(0xFF180078, 0x000000FEU, 0x00000018U);
-	psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U);
-	psu_mask_write(0xFF180080, 0x000000FEU, 0x000000C0U);
-	psu_mask_write(0xFF180084, 0x000000FEU, 0x000000C0U);
-	psu_mask_write(0xFF180088, 0x000000FEU, 0x000000C0U);
-	psu_mask_write(0xFF18008C, 0x000000FEU, 0x000000C0U);
-	psu_mask_write(0xFF180090, 0x000000FEU, 0x00000000U);
-	psu_mask_write(0xFF180094, 0x000000FEU, 0x00000000U);
-	psu_mask_write(0xFF180098, 0x000000FEU, 0x00000000U);
-	psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000000U);
-	psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000000U);
-	psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000000U);
-	psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000000U);
-	psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000000U);
-	psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000000U);
-	psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U);
-	psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000004U);
-	psu_mask_write(0xFF180100, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180104, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180108, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180110, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180114, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180118, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180120, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180124, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180128, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U);
-	psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U);
-	psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x50000000U);
-	psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B02006U);
-	psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U);
-	psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU);
-	psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU);
-	psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U);
-	psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU);
-	psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU);
-	psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U);
-	psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU);
-	psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU);
-	psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U);
-	psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU);
-	psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU);
-	psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U);
-	psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU);
-	psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU);
-	psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U);
-	psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU);
-	psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU);
-	psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U);
-	psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U);
-
-	return 1;
-}
-
-static unsigned long psu_peripherals_pre_init_data(void)
-{
-	psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012302U);
-
-	return 1;
-}
-
-static unsigned long psu_peripherals_init_data(void)
-{
-	psu_mask_write(0xFD1A0100, 0x000F807EU, 0x00000000U);
-	psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U);
-	psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U);
-	psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U);
-	psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U);
-	psu_mask_write(0xFF180390, 0x00000004U, 0x00000004U);
-	psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U);
-	psu_mask_write(0xFF5E0238, 0x00000060U, 0x00000000U);
-	psu_mask_write(0xFF180310, 0x00008001U, 0x00000001U);
-	psu_mask_write(0xFF180320, 0x33843384U, 0x00801284U);
-	psu_mask_write(0xFF18031C, 0x00007FFEU, 0x00006450U);
-	psu_mask_write(0xFF180358, 0x00080000U, 0x00080000U);
-	psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U);
-	psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U);
-	psu_mask_write(0xFF180324, 0x000003C0U, 0x00000000U);
-	psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U);
-	psu_mask_write(0xFF5E0238, 0x00000400U, 0x00000000U);
-	psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U);
-	psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U);
-	psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U);
-	psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U);
-	psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
-	psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
-	psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U);
-	psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
-	psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD18U);
-	psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
-	psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000202U);
-
-	mask_delay(1);
-	psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000002U);
-
-	mask_delay(5);
-	psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000202U);
-	psu_mask_write(0xFF0A0244, 0x03FFFFFFU, 0x00000020U);
-	psu_mask_write(0xFF0A0248, 0x03FFFFFFU, 0x00000020U);
-	psu_mask_write(0xFF0A0008, 0xFFFFFFFFU, 0xFFDF0020U);
-	mask_delay(1);
-	psu_mask_write(0xFF0A0008, 0xFFFFFFFFU, 0xFFDF0000U);
-	mask_delay(5);
-
-	return 1;
-}
-
-static unsigned long psu_afi_config(void)
-{
-	psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U);
-	psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U);
-	psu_mask_write(0xFD615000, 0x00000F00U, 0x00000A00U);
-
-	return 1;
-}
-
-static unsigned long psu_ddr_phybringup_data(void)
-{
-	unsigned int regval = 0;
-	unsigned int pll_retry = 10;
-	unsigned int pll_locked = 0;
-
-	while ((pll_retry > 0) && (!pll_locked)) {
-		Xil_Out32(0xFD080004, 0x00040010);
-		Xil_Out32(0xFD080004, 0x00040011);
-
-		while ((Xil_In32(0xFD080030) & 0x1) != 1)
-			;
-		pll_locked = (Xil_In32(0xFD080030) & 0x80000000)
-		    >> 31;
-		pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000)
-		    >> 16;
-		pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000)
-		    >> 16;
-		pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000)
-		    >> 16;
-		pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000)
-		    >> 16;
-		pll_retry--;
-	}
-	Xil_Out32(0xFD0800C4, Xil_In32(0xFD0800C4) | (pll_retry << 16));
-	if (!pll_locked)
-		return 0;
-
-	Xil_Out32(0xFD080004U, 0x00040063U);
-
-	while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
-		;
-	prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U);
-
-	while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
-		;
-	Xil_Out32(0xFD0701B0U, 0x00000001U);
-	Xil_Out32(0xFD070320U, 0x00000001U);
-	while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U)
-		;
-	prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U);
-	Xil_Out32(0xFD080004, 0x0004FE01);
-	regval = Xil_In32(0xFD080030);
-	while (regval != 0x80000FFF)
-		regval = Xil_In32(0xFD080030);
-	regval = ((Xil_In32(0xFD080030) & 0x1FFF0000) >> 18);
-	if (regval != 0)
-		return 0;
-
-	Xil_Out32(0xFD080200U, 0x100091C7U);
-	int cur_R006_tREFPRD;
-
-	cur_R006_tREFPRD = (Xil_In32(0xFD080018U) & 0x0003FFFFU) >> 0x00000000U;
-	prog_reg(0xFD080018, 0x3FFFF, 0x0, cur_R006_tREFPRD);
-
-	prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000003U);
-	prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000003U);
-	prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000003U);
-	prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000003U);
-	prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000003U);
-	prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000003U);
-
-	Xil_Out32(0xFD080004, 0x00060001);
-	regval = Xil_In32(0xFD080030);
-	while ((regval & 0x80004001) != 0x80004001)
-		regval = Xil_In32(0xFD080030);
-
-	prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000000U);
-	prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000000U);
-	prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000000U);
-	prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000000U);
-	prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000000U);
-	prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000000U);
-
-	Xil_Out32(0xFD080200U, 0x800091C7U);
-	prog_reg(0xFD080018, 0x3FFFF, 0x0, cur_R006_tREFPRD);
-
-	Xil_Out32(0xFD080004, 0x0000C001);
-	regval = Xil_In32(0xFD080030);
-	while ((regval & 0x80000C01) != 0x80000C01)
-		regval = Xil_In32(0xFD080030);
-
-	Xil_Out32(0xFD070180U, 0x01000040U);
-	Xil_Out32(0xFD070060U, 0x00000000U);
-	prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U);
-
-	return 1;
-}
-
-static void init_peripheral(void)
-{
-	psu_mask_write(0xFD5F0018, 0x8000001FU, 0x8000001FU);
-}
-
-int psu_init(void)
-{
-	int status = 1;
-
-	status &= psu_mio_init_data();
-	status &= psu_peripherals_pre_init_data();
-	status &= psu_pll_init_data();
-	status &= psu_clock_init_data();
-	status &= psu_ddr_init_data();
-	status &= psu_ddr_phybringup_data();
-	status &= psu_peripherals_init_data();
-	init_peripheral();
-
-	status &= psu_afi_config();
-	psu_ddr_qos_init_data();
-
-	if (status == 0)
-		return 1;
-	return 0;
-}
diff --git a/board/xilinx/zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c
new file mode 100644
index 0000000..4510230
--- /dev/null
+++ b/board/xilinx/zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c
@@ -0,0 +1,1061 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (c) Copyright 2015 Xilinx, Inc. All rights reserved.
+ */
+
+#include <asm/arch/psu_init_gpl.h>
+#include <xil_io.h>
+
+static void dpll_prog(int div2, int ddr_pll_fbdiv, int d_lock_dly,
+		      int d_lock_cnt, int d_lfhf, int d_cp, int d_res)
+{
+	unsigned int pll_ctrl_regval;
+	unsigned int pll_status_regval;
+
+	pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
+	pll_ctrl_regval = pll_ctrl_regval & (~0x00010000U);
+	pll_ctrl_regval = pll_ctrl_regval | (div2 << 16);
+	Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval);
+
+	pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
+	pll_ctrl_regval = pll_ctrl_regval & (~0xFE000000U);
+	pll_ctrl_regval = pll_ctrl_regval | (d_lock_dly << 25);
+	Xil_Out32(((0xFD1A0000U) + 0x00000030), pll_ctrl_regval);
+
+	pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
+	pll_ctrl_regval = pll_ctrl_regval & (~0x007FE000U);
+	pll_ctrl_regval = pll_ctrl_regval | (d_lock_cnt << 13);
+	Xil_Out32(((0xFD1A0000U) + 0x00000030), pll_ctrl_regval);
+
+	pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
+	pll_ctrl_regval = pll_ctrl_regval & (~0x00000C00U);
+	pll_ctrl_regval = pll_ctrl_regval | (d_lfhf << 10);
+	Xil_Out32(((0xFD1A0000U) + 0x00000030), pll_ctrl_regval);
+
+	pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
+	pll_ctrl_regval = pll_ctrl_regval & (~0x000001E0U);
+	pll_ctrl_regval = pll_ctrl_regval | (d_cp << 5);
+	Xil_Out32(((0xFD1A0000U) + 0x00000030), pll_ctrl_regval);
+
+	pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
+	pll_ctrl_regval = pll_ctrl_regval & (~0x0000000FU);
+	pll_ctrl_regval = pll_ctrl_regval | (d_res << 0);
+	Xil_Out32(((0xFD1A0000U) + 0x00000030), pll_ctrl_regval);
+
+	pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
+	pll_ctrl_regval = pll_ctrl_regval & (~0x00007F00U);
+	pll_ctrl_regval = pll_ctrl_regval | (ddr_pll_fbdiv << 8);
+	Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval);
+
+	pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
+	pll_ctrl_regval = pll_ctrl_regval & (~0x00000008U);
+	pll_ctrl_regval = pll_ctrl_regval | (1 << 3);
+	Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval);
+
+	pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
+	pll_ctrl_regval = pll_ctrl_regval & (~0x00000001U);
+	pll_ctrl_regval = pll_ctrl_regval | (1 << 0);
+	Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval);
+
+	pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
+	pll_ctrl_regval = pll_ctrl_regval & (~0x00000001U);
+	pll_ctrl_regval = pll_ctrl_regval | (0 << 0);
+	Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval);
+
+	pll_status_regval = 0x00000000;
+	while ((pll_status_regval & 0x00000002U) != 0x00000002U)
+		pll_status_regval = Xil_In32(((0xFD1A0000U) + 0x00000044));
+
+	pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
+	pll_ctrl_regval = pll_ctrl_regval & (~0x00000008U);
+	pll_ctrl_regval = pll_ctrl_regval | (0 << 3);
+	Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval);
+}
+
+static unsigned long psu_pll_init_data(void)
+{
+	psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U);
+	psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014000U);
+	psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U);
+	psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U);
+	mask_poll(0xFF5E0040, 0x00000002U);
+	psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U);
+	psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000200U);
+	psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012300U);
+	psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E4B0C82U);
+	psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00015A00U);
+	psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U);
+	psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U);
+	mask_poll(0xFF5E0040, 0x00000001U);
+	psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U);
+	psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U);
+	psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
+	psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014F00U);
+	psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U);
+	psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U);
+	mask_poll(0xFD1A0044, 0x00000001U);
+	psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U);
+	psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U);
+	psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x8000FB15U);
+	psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
+	psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00013F00U);
+	psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U);
+	psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U);
+	mask_poll(0xFD1A0044, 0x00000002U);
+	psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U);
+	psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000200U);
+	psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C82U);
+	psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00015A00U);
+	psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U);
+	psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U);
+	mask_poll(0xFD1A0044, 0x00000004U);
+	psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U);
+	psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U);
+
+	return 1;
+}
+
+static unsigned long psu_clock_init_data(void)
+{
+	psu_mask_write(0xFF5E005C, 0x063F3F07U, 0x06010C00U);
+	psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U);
+	psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U);
+	psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x02031900U);
+	psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010C00U);
+	psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010800U);
+	psu_mask_write(0xFF18030C, 0x00020000U, 0x00000000U);
+	psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U);
+	psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U);
+	psu_mask_write(0xFF5E0080, 0x013F3F07U, 0x01010800U);
+	psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000200U);
+	psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U);
+	psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U);
+	psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
+	psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
+	psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
+	psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
+	psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U);
+	psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01010F00U);
+	psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011E02U);
+	psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U);
+	psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U);
+	psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010500U);
+	psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01011603U);
+	psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01011403U);
+	psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
+	psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U);
+	psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U);
+	psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000203U);
+	psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000203U);
+	psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000300U);
+	psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U);
+	psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U);
+	psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U);
+	psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U);
+	psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U);
+	psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U);
+	psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U);
+
+	return 1;
+}
+
+static unsigned long psu_ddr_init_data(void)
+{
+	psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U);
+	psu_mask_write(0xFD070000, 0xE30FBE3DU, 0xC1081020U);
+	psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U);
+	psu_mask_write(0xFD070020, 0x000003F3U, 0x00000202U);
+	psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00501B9BU);
+	psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U);
+	psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408210U);
+	psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U);
+	psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U);
+	psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U);
+	psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x00408093U);
+	psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U);
+	psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U);
+	psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U);
+	psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0030051FU);
+	psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00030403U);
+	psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00680000U);
+	psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002205U);
+	psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x0034001BU);
+	psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00310008U);
+	psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U);
+	psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x00000000U);
+	psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U);
+	psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000077FU);
+	psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x13151117U);
+	psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00040422U);
+	psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x050A170FU);
+	psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x00F08000U);
+	psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x0A04060CU);
+	psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x01040808U);
+	psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010005U);
+	psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000401U);
+	psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x04040606U);
+	psu_mask_write(0xFD070124, 0x40070F3FU, 0x0004040DU);
+	psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x440C011CU);
+	psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U);
+	psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x820D0010U);
+	psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x01B64228U);
+	psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x04918208U);
+	psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U);
+	psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U);
+	psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U);
+	psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x83FF0003U);
+	psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x00C800FFU);
+	psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000004U);
+	psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000F06U);
+	psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U);
+	psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU);
+	psu_mask_write(0xFD070204, 0x001F1F1FU, 0x00070707U);
+	psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U);
+	psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x0F000000U);
+	psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU);
+	psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x060F0606U);
+	psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x06060606U);
+	psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU);
+	psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000000U);
+	psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x06060606U);
+	psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x06060606U);
+	psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000006U);
+	psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x04000400U);
+	psu_mask_write(0xFD070244, 0x00003333U, 0x00000000U);
+	psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U);
+	psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U);
+	psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U);
+	psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U);
+	psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U);
+	psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U);
+	psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U);
+	psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U);
+	psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU);
+	psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU);
+	psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU);
+	psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U);
+	psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU);
+	psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU);
+	psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U);
+	psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U);
+	psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU);
+	psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU);
+	psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U);
+	psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U);
+	psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU);
+	psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU);
+	psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U);
+	psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU);
+	psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U);
+	psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU);
+	psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU);
+	psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU);
+	psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U);
+	psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU);
+	psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U);
+	psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU);
+	psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU);
+	psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU);
+	psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U);
+	psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU);
+	psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U);
+	psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU);
+	psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U);
+	psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U);
+	psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U);
+	psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU);
+	psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U);
+	psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U);
+	psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x87001E00U);
+	psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F07C30U);
+	psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U);
+	psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U);
+	psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x41A20D10U);
+	psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0xCD141275U);
+	psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U);
+	psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U);
+	psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD0800C4, 0xFFFFFFFFU, 0x000000E5U);
+	psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0000040DU);
+	psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x0B2E1708U);
+	psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x282A0711U);
+	psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x000F012EU);
+	psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x82000501U);
+	psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01262B0BU);
+	psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x0043260BU);
+	psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000A14U);
+	psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U);
+	psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U);
+	psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000034U);
+	psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x0000001BU);
+	psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000031U);
+	psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000008U);
+	psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000056U);
+	psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x00000056U);
+	psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U);
+	psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x00000019U);
+	psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000016U);
+	psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U);
+	psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U);
+	psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U);
+	psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U);
+	psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12340800U);
+	psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x0000000AU);
+	psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U);
+	psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000005U);
+	psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300BD99U);
+	psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF1032019U);
+	psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U);
+	psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U);
+	psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008A8C58U);
+	psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x0001B39BU);
+	psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U);
+	psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U);
+	psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x0001BB9BU);
+	psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U);
+	psu_mask_write(0xFD080704, 0xFFFFFFFFU, 0x00007FFFU);
+	psu_mask_write(0xFD08070C, 0xFFFFFFFFU, 0x3F000008U);
+	psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00F50CU);
+	psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09091616U);
+	psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU);
+	psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U);
+	psu_mask_write(0xFD080804, 0xFFFFFFFFU, 0x00007FFFU);
+	psu_mask_write(0xFD08080C, 0xFFFFFFFFU, 0x3F000008U);
+	psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00F50CU);
+	psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09091616U);
+	psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU);
+	psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U);
+	psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU);
+	psu_mask_write(0xFD08090C, 0xFFFFFFFFU, 0x3F000008U);
+	psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00F504U);
+	psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09091616U);
+	psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU);
+	psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U);
+	psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU);
+	psu_mask_write(0xFD080A0C, 0xFFFFFFFFU, 0x3F000008U);
+	psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00F504U);
+	psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09091616U);
+	psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU);
+	psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x80803660U);
+	psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x55556000U);
+	psu_mask_write(0xFD080B08, 0xFFFFFFFFU, 0xAAAAAAAAU);
+	psu_mask_write(0xFD080B0C, 0xFFFFFFFFU, 0x0029A4A4U);
+	psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0C00BD00U);
+	psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09091616U);
+	psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU);
+	psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x80803660U);
+	psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x55556000U);
+	psu_mask_write(0xFD080C08, 0xFFFFFFFFU, 0xAAAAAAAAU);
+	psu_mask_write(0xFD080C0C, 0xFFFFFFFFU, 0x0029A4A4U);
+	psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0C00BD00U);
+	psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09091616U);
+	psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU);
+	psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x80803660U);
+	psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x55556000U);
+	psu_mask_write(0xFD080D08, 0xFFFFFFFFU, 0xAAAAAAAAU);
+	psu_mask_write(0xFD080D0C, 0xFFFFFFFFU, 0x0029A4A4U);
+	psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0C00BD00U);
+	psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09091616U);
+	psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU);
+	psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x80803660U);
+	psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x55556000U);
+	psu_mask_write(0xFD080E08, 0xFFFFFFFFU, 0xAAAAAAAAU);
+	psu_mask_write(0xFD080E0C, 0xFFFFFFFFU, 0x0029A4A4U);
+	psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0C00BD00U);
+	psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09091616U);
+	psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU);
+	psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x80803660U);
+	psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x55556000U);
+	psu_mask_write(0xFD080F08, 0xFFFFFFFFU, 0xAAAAAAAAU);
+	psu_mask_write(0xFD080F0C, 0xFFFFFFFFU, 0x0029A4A4U);
+	psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0C00BD00U);
+	psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09091616U);
+	psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU);
+	psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU);
+	psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x01100000U);
+	psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U);
+	psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x000C1800U);
+	psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x71000000U);
+	psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU);
+	psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x01100000U);
+	psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U);
+	psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x000C1800U);
+	psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x71000000U);
+	psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x15019FFEU);
+	psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x21100000U);
+	psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01266300U);
+	psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x000C1800U);
+	psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70400000U);
+	psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x15019FFEU);
+	psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x21100000U);
+	psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01266300U);
+	psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x000C1800U);
+	psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70400000U);
+	psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x15019FFEU);
+	psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x21100000U);
+	psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01266300U);
+	psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x000C1800U);
+	psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70400000U);
+	psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U);
+
+	return 1;
+}
+
+static unsigned long psu_ddr_qos_init_data(void)
+{
+	psu_mask_write(0xFD360008, 0x0000000FU, 0x00000000U);
+	psu_mask_write(0xFD36001C, 0x0000000FU, 0x00000000U);
+	psu_mask_write(0xFD370008, 0x0000000FU, 0x00000000U);
+	psu_mask_write(0xFD37001C, 0x0000000FU, 0x00000000U);
+	psu_mask_write(0xFD380008, 0x0000000FU, 0x00000000U);
+	psu_mask_write(0xFD38001C, 0x0000000FU, 0x00000000U);
+	psu_mask_write(0xFD390008, 0x0000000FU, 0x00000000U);
+	psu_mask_write(0xFD39001C, 0x0000000FU, 0x00000000U);
+	psu_mask_write(0xFD3A0008, 0x0000000FU, 0x00000000U);
+	psu_mask_write(0xFD3A001C, 0x0000000FU, 0x00000000U);
+	psu_mask_write(0xFD3B0008, 0x0000000FU, 0x00000000U);
+	psu_mask_write(0xFD3B001C, 0x0000000FU, 0x00000000U);
+	psu_mask_write(0xFF9B0008, 0x0000000FU, 0x00000000U);
+	psu_mask_write(0xFF9B001C, 0x0000000FU, 0x00000000U);
+
+	return 1;
+}
+
+static unsigned long psu_mio_init_data(void)
+{
+	psu_mask_write(0xFF180000, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF180004, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF180008, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF180018, 0x000000FEU, 0x00000080U);
+	psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180020, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180024, 0x000000FEU, 0x00000080U);
+	psu_mask_write(0xFF180028, 0x000000FEU, 0x00000080U);
+	psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000080U);
+	psu_mask_write(0xFF180030, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180034, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180038, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180040, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180044, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180048, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF18004C, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180050, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180054, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180058, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180060, 0x000000FEU, 0x00000040U);
+	psu_mask_write(0xFF180064, 0x000000FEU, 0x00000040U);
+	psu_mask_write(0xFF180068, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000018U);
+	psu_mask_write(0xFF180070, 0x000000FEU, 0x00000018U);
+	psu_mask_write(0xFF180074, 0x000000FEU, 0x00000018U);
+	psu_mask_write(0xFF180078, 0x000000FEU, 0x00000018U);
+	psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180080, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180084, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180088, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180090, 0x000000FEU, 0x000000C0U);
+	psu_mask_write(0xFF180094, 0x000000FEU, 0x000000C0U);
+	psu_mask_write(0xFF180098, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000010U);
+	psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000010U);
+	psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000010U);
+	psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000010U);
+	psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000010U);
+	psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U);
+	psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U);
+	psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U);
+	psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U);
+	psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U);
+	psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U);
+	psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U);
+	psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U);
+	psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U);
+	psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U);
+	psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000004U);
+	psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000004U);
+	psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000004U);
+	psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000004U);
+	psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000004U);
+	psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000004U);
+	psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000004U);
+	psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000004U);
+	psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000004U);
+	psu_mask_write(0xFF180100, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF180104, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF180108, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF180110, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF180114, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF180118, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF180120, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF180124, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF180128, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U);
+	psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U);
+	psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x50000000U);
+	psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B02020U);
+	psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U);
+	psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x00000000U);
+	psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU);
+	psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U);
+	psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU);
+	psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU);
+	psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x03FFFFFFU);
+	psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x00080814U);
+	psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU);
+	psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U);
+	psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU);
+	psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU);
+	psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x03F7F7EBU);
+	psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x00FC000BU);
+	psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU);
+	psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U);
+	psu_mask_write(0xFF18017C, 0x0357FFFFU, 0x0357FFFFU);
+	psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x0357FFFFU);
+	psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x0303FFF4U);
+	psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U);
+
+	return 1;
+}
+
+static unsigned long psu_peripherals_pre_init_data(void)
+{
+	psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012302U);
+	psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000001U);
+
+	return 1;
+}
+
+static unsigned long psu_peripherals_init_data(void)
+{
+	psu_mask_write(0xFD1A0100, 0x0001807CU, 0x00000000U);
+	psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U);
+	psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U);
+	psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U);
+	psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U);
+	psu_mask_write(0xFF180390, 0x00000004U, 0x00000004U);
+	psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U);
+	psu_mask_write(0xFF5E0238, 0x00000040U, 0x00000000U);
+	psu_mask_write(0xFF180310, 0x00008000U, 0x00000000U);
+	psu_mask_write(0xFF180320, 0x33840000U, 0x02840000U);
+	psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U);
+	psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U);
+	psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U);
+	psu_mask_write(0xFF5E0238, 0x00000400U, 0x00000000U);
+	psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U);
+	psu_mask_write(0xFF5E0238, 0x00000010U, 0x00000000U);
+	psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U);
+	psu_mask_write(0xFF5E0238, 0x00000004U, 0x00000000U);
+	psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U);
+	psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
+	psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
+	psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U);
+	psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
+	psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD18U);
+	psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000202U);
+
+	mask_delay(1);
+	psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000002U);
+
+	mask_delay(5);
+	psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000202U);
+
+	return 1;
+}
+
+static unsigned long psu_serdes_init_data(void)
+{
+	psu_mask_write(0xFD410000, 0x0000001FU, 0x00000009U);
+	psu_mask_write(0xFD410004, 0x0000001FU, 0x00000009U);
+	psu_mask_write(0xFD410008, 0x0000001FU, 0x00000008U);
+	psu_mask_write(0xFD402860, 0x00000080U, 0x00000080U);
+	psu_mask_write(0xFD402864, 0x00000081U, 0x00000001U);
+	psu_mask_write(0xFD402868, 0x00000082U, 0x00000002U);
+	psu_mask_write(0xFD40A094, 0x00000010U, 0x00000010U);
+	psu_mask_write(0xFD40A368, 0x000000FFU, 0x00000038U);
+	psu_mask_write(0xFD40A36C, 0x00000007U, 0x00000003U);
+	psu_mask_write(0xFD402368, 0x000000FFU, 0x00000058U);
+	psu_mask_write(0xFD40236C, 0x00000007U, 0x00000003U);
+	psu_mask_write(0xFD406368, 0x000000FFU, 0x00000058U);
+	psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U);
+	psu_mask_write(0xFD402370, 0x000000FFU, 0x0000007CU);
+	psu_mask_write(0xFD402374, 0x000000FFU, 0x00000033U);
+	psu_mask_write(0xFD402378, 0x000000FFU, 0x00000002U);
+	psu_mask_write(0xFD40237C, 0x00000033U, 0x00000030U);
+	psu_mask_write(0xFD406370, 0x000000FFU, 0x0000007CU);
+	psu_mask_write(0xFD406374, 0x000000FFU, 0x00000033U);
+	psu_mask_write(0xFD406378, 0x000000FFU, 0x00000002U);
+	psu_mask_write(0xFD40637C, 0x00000033U, 0x00000030U);
+	psu_mask_write(0xFD40A370, 0x000000FFU, 0x000000F4U);
+	psu_mask_write(0xFD40A374, 0x000000FFU, 0x00000031U);
+	psu_mask_write(0xFD40A378, 0x000000FFU, 0x00000002U);
+	psu_mask_write(0xFD40A37C, 0x00000033U, 0x00000030U);
+	psu_mask_write(0xFD40906C, 0x00000003U, 0x00000003U);
+	psu_mask_write(0xFD4080F4, 0x00000003U, 0x00000003U);
+	psu_mask_write(0xFD4090CC, 0x00000020U, 0x00000020U);
+	psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U);
+	psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U);
+	psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U);
+	psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U);
+	psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U);
+	psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U);
+	psu_mask_write(0xFD40989C, 0x00000080U, 0x00000080U);
+	psu_mask_write(0xFD4098F8, 0x000000FFU, 0x0000001AU);
+	psu_mask_write(0xFD4098FC, 0x000000FFU, 0x0000001AU);
+	psu_mask_write(0xFD409990, 0x000000FFU, 0x00000010U);
+	psu_mask_write(0xFD409924, 0x000000FFU, 0x000000FEU);
+	psu_mask_write(0xFD409928, 0x000000FFU, 0x00000000U);
+	psu_mask_write(0xFD409900, 0x000000FFU, 0x0000001AU);
+	psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000000U);
+	psu_mask_write(0xFD409980, 0x000000FFU, 0x000000FFU);
+	psu_mask_write(0xFD409914, 0x000000FFU, 0x000000F7U);
+	psu_mask_write(0xFD409918, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFD409940, 0x000000FFU, 0x000000F7U);
+	psu_mask_write(0xFD409944, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U);
+	psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U);
+	psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U);
+	psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U);
+	psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U);
+	psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U);
+	psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU);
+	psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U);
+	psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U);
+	psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU);
+	psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U);
+	psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U);
+	psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU);
+	psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U);
+	psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U);
+	psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU);
+	psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U);
+	psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U);
+	psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U);
+	psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U);
+	psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U);
+	psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U);
+	psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U);
+	psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U);
+	psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U);
+	psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U);
+
+	serdes_illcalib(0, 0, 3, 0, 4, 0, 4, 0);
+	psu_mask_write(0xFD410010, 0x00000077U, 0x00000044U);
+	psu_mask_write(0xFD410014, 0x00000007U, 0x00000003U);
+	psu_mask_write(0xFD400CB4, 0x00000037U, 0x00000037U);
+	psu_mask_write(0xFD404CB4, 0x00000037U, 0x00000037U);
+	psu_mask_write(0xFD4001D8, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFD404CC0, 0x0000001FU, 0x00000000U);
+	psu_mask_write(0xFD400CC0, 0x0000001FU, 0x00000000U);
+	psu_mask_write(0xFD404048, 0x000000FFU, 0x00000000U);
+	psu_mask_write(0xFD400048, 0x000000FFU, 0x00000000U);
+
+	return 1;
+}
+
+static unsigned long psu_resetout_init_data(void)
+{
+	psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U);
+	psu_mask_write(0xFF9D0080, 0x00000001U, 0x00000001U);
+	psu_mask_write(0xFF9D007C, 0x00000001U, 0x00000000U);
+	psu_mask_write(0xFF5E023C, 0x00000140U, 0x00000000U);
+	psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U);
+	psu_mask_write(0xFD1A0100, 0x00010000U, 0x00000000U);
+	psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000000U);
+	psu_mask_write(0xFD4A0238, 0x0000000FU, 0x00000000U);
+	psu_mask_write(0xFE20C200, 0x00023FFFU, 0x00022457U);
+	psu_mask_write(0xFE20C630, 0x003FFF00U, 0x00000000U);
+	psu_mask_write(0xFE20C11C, 0x00000600U, 0x00000600U);
+	psu_mask_write(0xFE20C12C, 0x00004000U, 0x00004000U);
+	psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U);
+	mask_poll(0xFD4063E4, 0x00000010U);
+	mask_poll(0xFD40A3E4, 0x00000010U);
+
+	return 1;
+}
+
+static unsigned long psu_resetin_init_data(void)
+{
+	psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000540U);
+	psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000008U);
+	psu_mask_write(0xFD4A0238, 0x0000000FU, 0x0000000AU);
+	psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000002U);
+	psu_mask_write(0xFD1A0100, 0x00010000U, 0x00010000U);
+
+	return 1;
+}
+
+static unsigned long psu_afi_config(void)
+{
+	psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U);
+	psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U);
+
+	return 1;
+}
+
+static unsigned long psu_ddr_phybringup_data(void)
+{
+	unsigned int regval = 0;
+
+	for (int tp = 0; tp < 20; tp++)
+		regval = Xil_In32(0xFD070018);
+	int cur_PLLCR0;
+
+	cur_PLLCR0 = (Xil_In32(0xFD080068U) & 0xFFFFFFFFU) >> 0x00000000U;
+	int cur_DX8SL0PLLCR0;
+
+	cur_DX8SL0PLLCR0 = (Xil_In32(0xFD081404U) & 0xFFFFFFFFU) >> 0x00000000U;
+	int cur_DX8SL1PLLCR0;
+
+	cur_DX8SL1PLLCR0 = (Xil_In32(0xFD081444U) & 0xFFFFFFFFU) >> 0x00000000U;
+	int cur_DX8SL2PLLCR0;
+
+	cur_DX8SL2PLLCR0 = (Xil_In32(0xFD081484U) & 0xFFFFFFFFU) >> 0x00000000U;
+	int cur_DX8SL3PLLCR0;
+
+	cur_DX8SL3PLLCR0 = (Xil_In32(0xFD0814C4U) & 0xFFFFFFFFU) >> 0x00000000U;
+	int cur_DX8SL4PLLCR0;
+
+	cur_DX8SL4PLLCR0 = (Xil_In32(0xFD081504U) & 0xFFFFFFFFU) >> 0x00000000U;
+	int cur_DX8SLBPLLCR0;
+
+	cur_DX8SLBPLLCR0 = (Xil_In32(0xFD0817C4U) & 0xFFFFFFFFU) >> 0x00000000U;
+	Xil_Out32(0xFD080068, 0x02120000);
+	Xil_Out32(0xFD081404, 0x02120000);
+	Xil_Out32(0xFD081444, 0x02120000);
+	Xil_Out32(0xFD081484, 0x02120000);
+	Xil_Out32(0xFD0814C4, 0x02120000);
+	Xil_Out32(0xFD081504, 0x02120000);
+	Xil_Out32(0xFD0817C4, 0x02120000);
+	int cur_div2;
+
+	cur_div2 = (Xil_In32(0xFD1A002CU) & 0x00010000U) >> 0x00000010U;
+	int cur_fbdiv;
+
+	cur_fbdiv = (Xil_In32(0xFD1A002CU) & 0x00007F00U) >> 0x00000008U;
+	dpll_prog(1, 49, 63, 625, 3, 3, 2);
+	for (int tp = 0; tp < 20; tp++)
+		regval = Xil_In32(0xFD070018);
+	unsigned int pll_retry = 10;
+	unsigned int pll_locked = 0;
+
+	while ((pll_retry > 0) && (!pll_locked)) {
+		Xil_Out32(0xFD080004, 0x00040010);
+		Xil_Out32(0xFD080004, 0x00040011);
+
+		while ((Xil_In32(0xFD080030) & 0x1) != 1)
+			;
+		pll_locked = (Xil_In32(0xFD080030) & 0x80000000)
+		    >> 31;
+		pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000)
+		    >> 16;
+		pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16;
+		pll_retry--;
+	}
+	Xil_Out32(0xFD0800C4, Xil_In32(0xFD0800C4) | (pll_retry << 16));
+	if (!pll_locked)
+		return 0;
+
+	Xil_Out32(0xFD080004U, 0x00040063U);
+	Xil_Out32(0xFD0800C0U, 0x00000001U);
+
+	while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
+		;
+	prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U);
+
+	while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
+		;
+	Xil_Out32(0xFD070010U, 0x80000018U);
+	Xil_Out32(0xFD0701B0U, 0x00000005U);
+	regval = Xil_In32(0xFD070018);
+	while ((regval & 0x1) != 0x0)
+		regval = Xil_In32(0xFD070018);
+
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	Xil_Out32(0xFD070014U, 0x00000331U);
+	Xil_Out32(0xFD070010U, 0x80000018U);
+	regval = Xil_In32(0xFD070018);
+	while ((regval & 0x1) != 0x0)
+		regval = Xil_In32(0xFD070018);
+
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	Xil_Out32(0xFD070014U, 0x00000B36U);
+	Xil_Out32(0xFD070010U, 0x80000018U);
+	regval = Xil_In32(0xFD070018);
+	while ((regval & 0x1) != 0x0)
+		regval = Xil_In32(0xFD070018);
+
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	Xil_Out32(0xFD070014U, 0x00000C56U);
+	Xil_Out32(0xFD070010U, 0x80000018U);
+	regval = Xil_In32(0xFD070018);
+	while ((regval & 0x1) != 0x0)
+		regval = Xil_In32(0xFD070018);
+
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	Xil_Out32(0xFD070014U, 0x00000E19U);
+	Xil_Out32(0xFD070010U, 0x80000018U);
+	regval = Xil_In32(0xFD070018);
+	while ((regval & 0x1) != 0x0)
+		regval = Xil_In32(0xFD070018);
+
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	regval = Xil_In32(0xFD070018);
+	Xil_Out32(0xFD070014U, 0x00001616U);
+	Xil_Out32(0xFD070010U, 0x80000018U);
+	Xil_Out32(0xFD070010U, 0x80000010U);
+	Xil_Out32(0xFD0701B0U, 0x00000005U);
+	Xil_Out32(0xFD070320U, 0x00000001U);
+	while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U)
+		;
+	prog_reg(0xFD0701B0U, 0x00000001U, 0x00000000U, 0x00000000U);
+	prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U);
+	prog_reg(0xFD080028U, 0x00000001U, 0x00000000U, 0x00000001U);
+	prog_reg(0xFD080004U, 0x20000000U, 0x0000001DU, 0x00000001U);
+	prog_reg(0xFD08016CU, 0x00000004U, 0x00000002U, 0x00000001U);
+	prog_reg(0xFD080168U, 0x000000F0U, 0x00000004U, 0x00000007U);
+	prog_reg(0xFD080168U, 0x00000F00U, 0x00000008U, 0x00000002U);
+	prog_reg(0xFD080168U, 0x0000000FU, 0x00000000U, 0x00000001U);
+	for (int tp = 0; tp < 20; tp++)
+		regval = Xil_In32(0xFD070018);
+
+	Xil_Out32(0xFD080068, cur_PLLCR0);
+	Xil_Out32(0xFD081404, cur_DX8SL0PLLCR0);
+	Xil_Out32(0xFD081444, cur_DX8SL1PLLCR0);
+	Xil_Out32(0xFD081484, cur_DX8SL2PLLCR0);
+	Xil_Out32(0xFD0814C4, cur_DX8SL3PLLCR0);
+	Xil_Out32(0xFD081504, cur_DX8SL4PLLCR0);
+	Xil_Out32(0xFD0817C4, cur_DX8SLBPLLCR0);
+	for (int tp = 0; tp < 20; tp++)
+		regval = Xil_In32(0xFD070018);
+
+	dpll_prog(cur_div2, cur_fbdiv, 63, 625, 3, 3, 2);
+	for (int tp = 0; tp < 2000; tp++)
+		regval = Xil_In32(0xFD070018);
+
+	prog_reg(0xFD080004U, 0x20000000U, 0x0000001DU, 0x00000000U);
+	prog_reg(0xFD080004U, 0x00040000U, 0x00000012U, 0x00000001U);
+	prog_reg(0xFD080004U, 0x00000040U, 0x00000006U, 0x00000001U);
+	prog_reg(0xFD080004U, 0x00000020U, 0x00000005U, 0x00000001U);
+	prog_reg(0xFD080004U, 0x00000010U, 0x00000004U, 0x00000001U);
+	prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U);
+
+	while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
+		;
+	prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U);
+
+	while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
+		;
+	for (int tp = 0; tp < 2000; tp++)
+		regval = Xil_In32(0xFD070018);
+
+	prog_reg(0xFD080028U, 0x00000001U, 0x00000000U, 0x00000000U);
+	prog_reg(0xFD08016CU, 0x00000004U, 0x00000002U, 0x00000001U);
+	prog_reg(0xFD080168U, 0x000000F0U, 0x00000004U, 0x00000007U);
+	prog_reg(0xFD080168U, 0x00000F00U, 0x00000008U, 0x00000003U);
+	prog_reg(0xFD080168U, 0x0000000FU, 0x00000000U, 0x00000001U);
+	for (int tp = 0; tp < 2000; tp++)
+		regval = Xil_In32(0xFD070018);
+
+	prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U);
+	Xil_Out32(0xFD080004, 0x0014FE01);
+
+	regval = Xil_In32(0xFD080030);
+	while (regval != 0x8000007E)
+		regval = Xil_In32(0xFD080030);
+
+	Xil_Out32(0xFD080200U, 0x000091C7U);
+	regval = Xil_In32(0xFD080030);
+	while (regval != 0x80008FFF)
+		regval = Xil_In32(0xFD080030);
+
+	Xil_Out32(0xFD080200U, 0x800091C7U);
+	regval = ((Xil_In32(0xFD080030) & 0x1FFF0000) >> 18);
+	if (regval != 0)
+		return 0;
+
+	Xil_Out32(0xFD080200U, 0x800091C7U);
+	int cur_R006_tREFPRD;
+
+	cur_R006_tREFPRD = (Xil_In32(0xFD080018U) & 0x0003FFFFU) >> 0x00000000U;
+	prog_reg(0xFD080018, 0x3FFFF, 0x0, cur_R006_tREFPRD);
+
+	prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000003U);
+	prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000003U);
+	prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000003U);
+	prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000003U);
+	prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000003U);
+	prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000003U);
+
+	Xil_Out32(0xFD080004, 0x00060001);
+	regval = Xil_In32(0xFD080030);
+	while ((regval & 0x80004001) != 0x80004001)
+		regval = Xil_In32(0xFD080030);
+
+	regval = ((Xil_In32(0xFD080030) & 0x1FFF0000) >> 18);
+	if (regval != 0)
+		return 0;
+
+	prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000000U);
+	prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000000U);
+	prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000000U);
+	prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000000U);
+	prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000000U);
+	prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000000U);
+
+	Xil_Out32(0xFD080200U, 0x800091C7U);
+	prog_reg(0xFD080018, 0x3FFFF, 0x0, cur_R006_tREFPRD);
+
+	Xil_Out32(0xFD080004, 0x0000C001);
+	regval = Xil_In32(0xFD080030);
+	while ((regval & 0x80000C01) != 0x80000C01)
+		regval = Xil_In32(0xFD080030);
+
+	prog_reg(0xFD070320U, 0x00000001U, 0x00000000U, 0x00000000U);
+	prog_reg(0xFD0701B0U, 0x00000001U, 0x00000000U, 0x00000001U);
+	prog_reg(0xFD0701A0U, 0x80000000U, 0x0000001FU, 0x00000000U);
+	prog_reg(0xFD070320U, 0x00000001U, 0x00000000U, 0x00000001U);
+	Xil_Out32(0xFD070180U, 0x020D0010U);
+	Xil_Out32(0xFD070060U, 0x00000000U);
+	prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U);
+	for (int tp = 0; tp < 4000; tp++)
+		regval = Xil_In32(0xFD070018);
+
+	prog_reg(0xFD080090U, 0x00000FC0U, 0x00000006U, 0x00000007U);
+	prog_reg(0xFD080090U, 0x00000004U, 0x00000002U, 0x00000001U);
+	prog_reg(0xFD08070CU, 0x02000000U, 0x00000019U, 0x00000000U);
+	prog_reg(0xFD08080CU, 0x02000000U, 0x00000019U, 0x00000000U);
+	prog_reg(0xFD08090CU, 0x02000000U, 0x00000019U, 0x00000000U);
+	prog_reg(0xFD080A0CU, 0x02000000U, 0x00000019U, 0x00000000U);
+	prog_reg(0xFD080F0CU, 0x02000000U, 0x00000019U, 0x00000000U);
+	prog_reg(0xFD080200U, 0x00000010U, 0x00000004U, 0x00000001U);
+	prog_reg(0xFD080250U, 0x00000002U, 0x00000001U, 0x00000000U);
+	prog_reg(0xFD080250U, 0x0000000CU, 0x00000002U, 0x00000001U);
+	prog_reg(0xFD080250U, 0x000000F0U, 0x00000004U, 0x00000000U);
+	prog_reg(0xFD080250U, 0x00300000U, 0x00000014U, 0x00000001U);
+	prog_reg(0xFD080250U, 0xF0000000U, 0x0000001CU, 0x00000002U);
+	prog_reg(0xFD08070CU, 0x08000000U, 0x0000001BU, 0x00000000U);
+	prog_reg(0xFD08080CU, 0x08000000U, 0x0000001BU, 0x00000000U);
+	prog_reg(0xFD08090CU, 0x08000000U, 0x0000001BU, 0x00000000U);
+	prog_reg(0xFD080A0CU, 0x08000000U, 0x0000001BU, 0x00000000U);
+	prog_reg(0xFD080B0CU, 0x08000000U, 0x0000001BU, 0x00000000U);
+	prog_reg(0xFD080C0CU, 0x08000000U, 0x0000001BU, 0x00000000U);
+	prog_reg(0xFD080D0CU, 0x08000000U, 0x0000001BU, 0x00000000U);
+	prog_reg(0xFD080E0CU, 0x08000000U, 0x0000001BU, 0x00000000U);
+	prog_reg(0xFD080F0CU, 0x08000000U, 0x0000001BU, 0x00000000U);
+	prog_reg(0xFD080254U, 0x000000FFU, 0x00000000U, 0x00000001U);
+	prog_reg(0xFD080254U, 0x000F0000U, 0x00000010U, 0x0000000AU);
+	prog_reg(0xFD080250U, 0x00000001U, 0x00000000U, 0x00000001U);
+
+	return 1;
+}
+
+static void init_peripheral(void)
+{
+	psu_mask_write(0xFD5F0018, 0x8000001FU, 0x8000001FU);
+}
+
+int psu_init(void)
+{
+	int status = 1;
+
+	status &= psu_mio_init_data();
+	status &= psu_peripherals_pre_init_data();
+	status &= psu_pll_init_data();
+	status &= psu_clock_init_data();
+	status &= psu_ddr_init_data();
+	status &= psu_ddr_phybringup_data();
+	status &= psu_peripherals_init_data();
+	init_peripheral();
+
+	status &= psu_afi_config();
+	psu_ddr_qos_init_data();
+
+	if (status == 0)
+		return 1;
+	return 0;
+}
diff --git a/board/xilinx/zynqmp/zynqmp-smk-k24-revA b/board/xilinx/zynqmp/zynqmp-smk-k24-revA
new file mode 120000
index 0000000..89e45cd
--- /dev/null
+++ b/board/xilinx/zynqmp/zynqmp-smk-k24-revA
@@ -0,0 +1 @@
+zynqmp-sm-k24-revA
\ No newline at end of file