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| author | Tom Rini <trini@konsulko.com> | 2021-12-14 13:36:39 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-12-27 16:20:18 -0500 |
| commit | e4c3ce7e2845d75dc1696b2875bb632993a9c51c (patch) | |
| tree | 092fa1c26bdbbb3a5bfd6176ae780c1be2c17fe2 /board/xes | |
| parent | 0abfcf2fd3067c2622261fbdecdf2a4461f5ac8c (diff) | |
| download | u-boot-e4c3ce7e2845d75dc1696b2875bb632993a9c51c.zip u-boot-e4c3ce7e2845d75dc1696b2875bb632993a9c51c.tar.gz u-boot-e4c3ce7e2845d75dc1696b2875bb632993a9c51c.tar.bz2 | |
CONFIG_SYS_CLK_FREQ: Consistently be static or get_board_sys_clk()
This CONFIG option is used in one of two ways. The first way is that it
is defined to a static value, of an unsigned long size. The second way
is that it is defined to something, typically a function, to determine
this value at run time.
However, in a few cases that function returns a static value. Change
that to using the static value directly.
In the case of using something at run time, convert everything to using
a function of the same name and prototype. This will allow for further
cleanups.
Finally, we have a few cases where the function is just not used, so
drop it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board/xes')
| -rw-r--r-- | board/xes/common/fsl_8xxx_clk.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/board/xes/common/fsl_8xxx_clk.c b/board/xes/common/fsl_8xxx_clk.c index 8ca65ca..8c72c15 100644 --- a/board/xes/common/fsl_8xxx_clk.c +++ b/board/xes/common/fsl_8xxx_clk.c @@ -9,7 +9,7 @@ /* * Return SYSCLK input frequency - 50 MHz or 66 MHz depending on POR config */ -unsigned long get_board_sys_clk(ulong dummy) +unsigned long get_board_sys_clk(void) { #if defined(CONFIG_MPC85xx) volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); @@ -33,13 +33,13 @@ unsigned long get_board_sys_clk(ulong dummy) * Return DDR input clock - synchronous with SYSCLK or 66 MHz * Note: 86xx doesn't support asynchronous DDR clk */ -unsigned long get_board_ddr_clk(ulong dummy) +unsigned long get_board_ddr_clk(void) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); u32 ddr_ratio = (in_be32(&gur->porpllsr) & 0x00003e00) >> 9; if (ddr_ratio == 0x7) - return get_board_sys_clk(dummy); + return get_board_sys_clk(); #ifdef CONFIG_ARCH_P2020 if (in_be32(&gur->gpporcr) & 0x20000) |