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author | Becky Bruce <beckyb@kernel.crashing.org> | 2010-06-17 11:37:20 -0500 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2010-07-16 10:55:09 -0500 |
commit | f51cdaf19141151ce2b40d562a468605340f2315 (patch) | |
tree | 60b51af79796f061d119f2839d101f9584964dfc /board/xes/xpedite5370 | |
parent | 0914f4832887341ee073d2d2bfbada69a6872548 (diff) | |
download | u-boot-f51cdaf19141151ce2b40d562a468605340f2315.zip u-boot-f51cdaf19141151ce2b40d562a468605340f2315.tar.gz u-boot-f51cdaf19141151ce2b40d562a468605340f2315.tar.bz2 |
83xx/85xx/86xx: LBC register cleanup
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers. Merge
this into a single spot.
To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.
In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.
I have done a successful ppc build all and tested a board or two from
each processor family.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/xes/xpedite5370')
-rw-r--r-- | board/xes/xpedite5370/xpedite5370.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/board/xes/xpedite5370/xpedite5370.c b/board/xes/xpedite5370/xpedite5370.c index 48d9fc8..2a060c2 100644 --- a/board/xes/xpedite5370/xpedite5370.c +++ b/board/xes/xpedite5370/xpedite5370.c @@ -58,7 +58,6 @@ int checkboard(void) static void flash_cs_fixup(void) { - volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); int flash_sel; /* @@ -71,11 +70,11 @@ static void flash_cs_fixup(void) printf("FLASH: Executed from FLASH%d\n", flash_sel ? 2 : 1); if (flash_sel) { - out_be32(&lbc->br0, CONFIG_SYS_BR1_PRELIM); - out_be32(&lbc->or0, CONFIG_SYS_OR1_PRELIM); + set_lbc_br(0, CONFIG_SYS_BR1_PRELIM); + set_lbc_or(0, CONFIG_SYS_OR1_PRELIM); - out_be32(&lbc->br1, CONFIG_SYS_BR0_PRELIM); - out_be32(&lbc->or1, CONFIG_SYS_OR0_PRELIM); + set_lbc_br(1, CONFIG_SYS_BR0_PRELIM); + set_lbc_or(1, CONFIG_SYS_OR0_PRELIM); } } |