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authorTom Rini <trini@konsulko.com>2021-05-14 21:34:25 -0400
committerTom Rini <trini@konsulko.com>2021-07-07 19:52:24 -0400
commited7fe2bee12a464da5b944cc2218d924793b8a80 (patch)
treedf3428c8ac1ddbd99a41722693a68ce368040a33 /board/xes/xpedite520x/ddr.c
parent66e3c64f2c6bec4739d1d618b3583d5c92f10176 (diff)
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ppc: Remove xpedite boards
These boards have not been converted to CONFIG_DM_PCI by the deadline and is also missing conversion to CONFIG_DM. Remove them. As this includes the last ARCH_MPC8572 platform, remove that as well. Cc: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Peter Tyser <ptyser@xes-inc.com>
Diffstat (limited to 'board/xes/xpedite520x/ddr.c')
-rw-r--r--board/xes/xpedite520x/ddr.c68
1 files changed, 0 insertions, 68 deletions
diff --git a/board/xes/xpedite520x/ddr.c b/board/xes/xpedite520x/ddr.c
deleted file mode 100644
index c142bec..0000000
--- a/board/xes/xpedite520x/ddr.c
+++ /dev/null
@@ -1,68 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright 2008 Freescale Semiconductor, Inc.
- */
-
-#include <common.h>
-#include <i2c.h>
-
-#include <fsl_ddr_sdram.h>
-#include <fsl_ddr_dimm_params.h>
-
-void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
-
- /* We use soldered memory, but use an SPD EEPROM to describe it.
- * The SPD has an unspecified dimm type, but the DDR2 initialization
- * code requires a specific type to be specified. This sets the type
- * as a standard unregistered SO-DIMM. */
- if (spd->dimm_type == 0) {
- spd->dimm_type = 0x4;
- ((uchar *)spd)[63] += 0x4;
- }
-}
-
-void fsl_ddr_board_options(memctl_options_t *popts,
- dimm_params_t *pdimm,
- unsigned int ctrl_num)
-{
- /*
- * Factors to consider for clock adjust:
- * - number of chips on bus
- * - position of slot
- * - DDR1 vs. DDR2?
- * - ???
- *
- * This needs to be determined on a board-by-board basis.
- * 0110 3/4 cycle late
- * 0111 7/8 cycle late
- */
- popts->clk_adjust = 7;
-
- /*
- * Factors to consider for CPO:
- * - frequency
- * - ddr1 vs. ddr2
- */
- popts->cpo_override = 9;
-
- /*
- * Factors to consider for write data delay:
- * - number of DIMMs
- *
- * 1 = 1/4 clock delay
- * 2 = 1/2 clock delay
- * 3 = 3/4 clock delay
- * 4 = 1 clock delay
- * 5 = 5/4 clock delay
- * 6 = 3/2 clock delay
- */
- popts->write_data_delay = 3;
-
- /*
- * Factors to consider for half-strength driver enable:
- * - number of DIMMs installed
- */
- popts->half_strength_driver_enable = 0;
-}