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author | Tom Rini <trini@konsulko.com> | 2022-06-16 08:38:46 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2022-06-16 08:38:46 -0400 |
commit | 9abfbef57f55f31e42940ac2a18ebccfb087e5c6 (patch) | |
tree | 96a13568c13a7bffda05adb85cb5b7daabebc4ad /board/toradex | |
parent | fd27812e520881d73bd97a2c034f3b5ecc361c4b (diff) | |
parent | 1a558fafbbdff80cb6a7c8e883addec7f02fe8e5 (diff) | |
download | u-boot-WIP/16Jun2022.zip u-boot-WIP/16Jun2022.tar.gz u-boot-WIP/16Jun2022.tar.bz2 |
Merge tag 'u-boot-imx-20220616' of https://gitlab.denx.de/u-boot/custodians/u-boot-imxWIP/16Jun2022
u-boot-imx-20220616
-------------------
Fixes for 2022.07 + Toradex apalis-imx8 (missed in last PR)
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12322
Diffstat (limited to 'board/toradex')
-rw-r--r-- | board/toradex/apalis-imx8/apalis-imx8.c | 81 | ||||
-rw-r--r-- | board/toradex/common/tdx-cfg-block.c | 18 | ||||
-rw-r--r-- | board/toradex/common/tdx-cfg-block.h | 1 |
3 files changed, 94 insertions, 6 deletions
diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c index 04877fc..4081988 100644 --- a/board/toradex/apalis-imx8/apalis-imx8.c +++ b/board/toradex/apalis-imx8/apalis-imx8.c @@ -18,6 +18,7 @@ #include <env.h> #include <errno.h> #include <linux/libfdt.h> +#include <linux/bitops.h> #include "../common/tdx-cfg-block.h" @@ -28,22 +29,75 @@ DECLARE_GLOBAL_DATA_PTR; (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) +#define TDX_USER_FUSE_BLOCK1_A 276 +#define TDX_USER_FUSE_BLOCK1_B 277 +#define TDX_USER_FUSE_BLOCK2_A 278 +#define TDX_USER_FUSE_BLOCK2_B 279 + static iomux_cfg_t uart1_pads[] = { SC_P_UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL), SC_P_UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL), }; +struct tdx_user_fuses { + u16 pid4; + u16 vers; + u8 ramid; +}; + static void setup_iomux_uart(void) { imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); } +static uint32_t do_get_tdx_user_fuse(int a, int b) +{ + sc_err_t sciErr; + u32 val_a = 0; + u32 val_b = 0; + + sciErr = sc_misc_otp_fuse_read(-1, a, &val_a); + if (sciErr != SC_ERR_NONE) { + printf("Error reading out user fuse %d\n", a); + return 0; + } + + sciErr = sc_misc_otp_fuse_read(-1, b, &val_b); + if (sciErr != SC_ERR_NONE) { + printf("Error reading out user fuse %d\n", b); + return 0; + } + + return ((val_a & 0xffff) << 16) | (val_b & 0xffff); +} + +static void get_tdx_user_fuse(struct tdx_user_fuses *tdxuserfuse) +{ + u32 fuse_block; + + fuse_block = do_get_tdx_user_fuse(TDX_USER_FUSE_BLOCK2_A, + TDX_USER_FUSE_BLOCK2_B); + + /* + * Fuse block 2 acts as a backup area, if this reads 0 we want to + * use fuse block 1 + */ + if (fuse_block == 0) + fuse_block = do_get_tdx_user_fuse(TDX_USER_FUSE_BLOCK1_A, + TDX_USER_FUSE_BLOCK1_B); + + tdxuserfuse->pid4 = (fuse_block >> 18) & GENMASK(13, 0); + tdxuserfuse->vers = (fuse_block >> 4) & GENMASK(13, 0); + tdxuserfuse->ramid = fuse_block & GENMASK(3, 0); +} + void board_mem_get_layout(u64 *phys_sdram_1_start, u64 *phys_sdram_1_size, u64 *phys_sdram_2_start, u64 *phys_sdram_2_size) { u32 is_quadplus = 0, val = 0; + struct tdx_user_fuses tdxramfuses; sc_err_t scierr = sc_misc_otp_fuse_read(-1, 6, &val); if (scierr == SC_ERR_NONE) { @@ -51,14 +105,33 @@ void board_mem_get_layout(u64 *phys_sdram_1_start, is_quadplus = ((val >> 4) & 0x3) != 0x0; } + get_tdx_user_fuse(&tdxramfuses); + *phys_sdram_1_start = PHYS_SDRAM_1; *phys_sdram_1_size = PHYS_SDRAM_1_SIZE; *phys_sdram_2_start = PHYS_SDRAM_2; - if (is_quadplus) - /* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */ + + switch (tdxramfuses.ramid) { + case 1: + *phys_sdram_2_size = SZ_2G; + break; + case 2: *phys_sdram_2_size = 0x0UL; - else - *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; + break; + case 3: + *phys_sdram_2_size = SZ_2G; + break; + case 4: + *phys_sdram_2_size = SZ_4G + SZ_2G; + break; + default: + if (is_quadplus) + /* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */ + *phys_sdram_2_size = 0x0UL; + else + *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; + break; + } } int board_early_init_f(void) diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c index 9c87289..6c8cf45 100644 --- a/board/toradex/common/tdx-cfg-block.c +++ b/board/toradex/common/tdx-cfg-block.c @@ -144,6 +144,7 @@ const char * const toradex_modules[] = { [64] = "Verdin iMX8M Plus Quad 2GB Wi-Fi / BT IT", [65] = "Verdin iMX8M Plus QuadLite 1GB IT", [66] = "Verdin iMX8M Plus Quad 8GB Wi-Fi / BT", + [67] = "Apalis iMX8 QuadMax 8GB Wi-Fi / BT IT", }; const char * const toradex_carrier_boards[] = { @@ -359,6 +360,7 @@ static int get_cfgblock_interactive(void) char *soc; char it = 'n'; char wb = 'n'; + char mem8g = 'n'; int len = 0; /* Unknown module by default */ @@ -377,6 +379,14 @@ static int get_cfgblock_interactive(void) sprintf(message, "Does the module have Wi-Fi / Bluetooth? [y/N] "); len = cli_readline(message); wb = console_buffer[0]; + +#if defined(CONFIG_TARGET_APALIS_IMX8) + if ((wb == 'y' || wb == 'Y') && (it == 'y' || it == 'Y')) { + sprintf(message, "Does your module have 8GB of RAM? [y/N] "); + len = cli_readline(message); + mem8g = console_buffer[0]; + } +#endif #endif soc = env_get("soc"); @@ -430,8 +440,12 @@ static int get_cfgblock_interactive(void) tdx_hw_tag.prodid = COLIBRI_IMX7S; else if (is_cpu_type(MXC_CPU_IMX8QM)) { if (it == 'y' || it == 'Y') { - if (wb == 'y' || wb == 'Y') - tdx_hw_tag.prodid = APALIS_IMX8QM_WIFI_BT_IT; + if (wb == 'y' || wb == 'Y') { + if (mem8g == 'y' || mem8g == 'Y') + tdx_hw_tag.prodid = APALIS_IMX8QM_8GB_WIFI_BT_IT; + else + tdx_hw_tag.prodid = APALIS_IMX8QM_WIFI_BT_IT; + } else tdx_hw_tag.prodid = APALIS_IMX8QM_IT; } else { diff --git a/board/toradex/common/tdx-cfg-block.h b/board/toradex/common/tdx-cfg-block.h index ddcf699..43e662e 100644 --- a/board/toradex/common/tdx-cfg-block.h +++ b/board/toradex/common/tdx-cfg-block.h @@ -87,6 +87,7 @@ enum { VERDIN_IMX8MPQ_2GB_WIFI_BT_IT, VERDIN_IMX8MPQL_IT, /* 65 */ VERDIN_IMX8MPQ_8GB_WIFI_BT, + APALIS_IMX8QM_8GB_WIFI_BT_IT, }; enum { |