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| author | Wenyou Yang <wenyou.yang@atmel.com> | 2016-02-03 10:16:50 +0800 |
|---|---|---|
| committer | Andreas Bießmann <andreas.devel@googlemail.com> | 2016-02-18 21:34:40 +0100 |
| commit | 70341e2ed9a0ff98a777febb7b56dbcee4d885c4 (patch) | |
| tree | 791c3679b750e1d5a0e76a6f3c76453250bb073c /board/siemens/corvus | |
| parent | eced5a7eb4750e16dd571a9bd4980c68d2276f11 (diff) | |
| download | u-boot-70341e2ed9a0ff98a777febb7b56dbcee4d885c4.zip u-boot-70341e2ed9a0ff98a777febb7b56dbcee4d885c4.tar.gz u-boot-70341e2ed9a0ff98a777febb7b56dbcee4d885c4.tar.bz2 | |
board: atmel: clean up peripheral clock code
Due to introducing the new peripheral clock handle functions,
use these functions to reduce duplicated code.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Heiko Schocher <hs@denx.de>
[Rebased on current master, fixup for at91rm9200ek]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'board/siemens/corvus')
| -rw-r--r-- | board/siemens/corvus/board.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c index 38c0ca3..ba70819 100644 --- a/board/siemens/corvus/board.c +++ b/board/siemens/corvus/board.c @@ -17,7 +17,6 @@ #include <asm/arch/at91sam9g45_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #include <asm/arch/clk.h> @@ -147,13 +146,11 @@ static void ddr2_conf(struct atmel_mpddrc_config *ddr2) void mem_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct atmel_mpddrc_config ddr2; ddr2_conf(&ddr2); - /* enable DDR2 clock */ - writel(AT91_PMC_DDR, &pmc->scer); + at91_system_clk_enable(AT91_PMC_DDR); /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2); @@ -214,6 +211,7 @@ void at91_udp_hw_init(void) /* Enable UPLL clock */ writel(AT91_PMC_UPLLEN | AT91_PMC_BIASEN, &pmc->uckr); + /* Enable UDPHS clock */ at91_periph_clk_enable(ATMEL_ID_UDPHS); } |