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authorMartyn Welch <martyn@welchs.me.uk>2018-12-11 11:34:46 +0000
committerStefano Babic <sbabic@denx.de>2019-01-28 12:47:27 +0100
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parent774ec60b74a7b8d356a2ec6249936b097631a726 (diff)
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imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063). CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0 Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg) Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
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diff --git a/board/phytec/pcl063/MAINTAINERS b/board/phytec/pcl063/MAINTAINERS
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+PCL063 BOARD
+M: Martyn Welch <martyn.welch@collabora.com>
+S: Maintained
+F: arch/arm/dts/imx6ul-pcl063.dtsi
+F: arch/arm/dts/imx6ul-phycore-segin.dts
+F: board/phytec/pcl063/
+F: configs/phycore_pcl063_defconfig
+F: include/configs/pcl063.h