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| author | Paul Burton <paul.burton@imgtec.com> | 2013-11-08 11:18:49 +0000 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2013-11-09 17:21:01 +0100 |
| commit | a257f6263b51321ecacc69ac1effbcbe2158fe15 (patch) | |
| tree | 0087af9ab0339ce5496dbd810ae1b12a0fc97b76 /board/imgtec/malta/malta.c | |
| parent | 7a9d109b00a207b481b05d8e147673da33ad1cd3 (diff) | |
| download | u-boot-a257f6263b51321ecacc69ac1effbcbe2158fe15.zip u-boot-a257f6263b51321ecacc69ac1effbcbe2158fe15.tar.gz u-boot-a257f6263b51321ecacc69ac1effbcbe2158fe15.tar.bz2 | |
malta: setup super I/O UARTs
On a real Malta the Super I/O needs to be configured before we are able
to access the UARTs. This patch performs that configuration, setting up
the UARTs in the same way that YAMON would.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'board/imgtec/malta/malta.c')
| -rw-r--r-- | board/imgtec/malta/malta.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/board/imgtec/malta/malta.c b/board/imgtec/malta/malta.c index 7eddf1c..09da9ea 100644 --- a/board/imgtec/malta/malta.c +++ b/board/imgtec/malta/malta.c @@ -12,6 +12,8 @@ #include <asm/malta.h> #include <pci_gt64120.h> +#include "superio.h" + phys_size_t initdram(int board_type) { return CONFIG_SYS_MEM_SIZE; @@ -36,6 +38,14 @@ void _machine_restart(void) __raw_writel(GORESET, reset_base); } +int board_early_init_f(void) +{ + /* setup FDC37M817 super I/O controller */ + malta_superio_init((void *)CKSEG1ADDR(MALTA_IO_PORT_BASE)); + + return 0; +} + void pci_init_board(void) { set_io_port_base(CKSEG1ADDR(MALTA_IO_PORT_BASE)); |