diff options
| author | Pali Rohár <pali@kernel.org> | 2022-04-07 12:16:17 +0200 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2022-04-26 17:18:39 +0530 |
| commit | 0992c2be776b51c5ca7d85147050908fbcc96d80 (patch) | |
| tree | 6cc7ae41ce84cd43aed828831e3cd339e5627992 /board/freescale | |
| parent | 4aceaec585d925eed468c3bd25fdcdfd7568033e (diff) | |
| download | u-boot-0992c2be776b51c5ca7d85147050908fbcc96d80.zip u-boot-0992c2be776b51c5ca7d85147050908fbcc96d80.tar.gz u-boot-0992c2be776b51c5ca7d85147050908fbcc96d80.tar.bz2 | |
board: freescale: p1_p2_rdb_pc: Do not set MPC85xx_PMUXCR_SDHC_WP bit when SDHC_WP is used as GPIO
When MPC85xx_PMUXCR_SDHC_WP is set then SDHC controller automatically makes
inserted SD card readonly if GPIO[9] is active.
In some design GPIO[9] pin does not have to be connected to SD card
write-protect pin and can be used as GPIO.
So do not set MPC85xx_PMUXCR_SDHC_WP bit when GPIO[9] is not used for
SDHC_WP functionality.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index dde0c1d..bed2033 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -147,8 +147,10 @@ int board_early_init_f(void) { ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - setbits_be32(&gur->pmuxcr, - (MPC85xx_PMUXCR_SDHC_CD | MPC85xx_PMUXCR_SDHC_WP)); + setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SDHC_CD); +#ifndef SDHC_WP_IS_GPIO + setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SDHC_WP); +#endif clrbits_be32(&gur->sdhcdcr, SDHCDCR_CD_INV); clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA); |