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| author | Ilya Yanok <yanok@emcraft.com> | 2010-09-17 23:41:49 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-09-23 21:14:08 +0200 |
| commit | 65ea758939a7bcbc87fe1c1bd816a98176bc2a9b (patch) | |
| tree | 13048971c089c4ed70f7012cbbec1f6d7e4c2f10 /board/freescale/mpc8308rdb/mpc8308rdb.c | |
| parent | f3ce250d96588d96bd4148883455e00ea14adca5 (diff) | |
| download | u-boot-65ea758939a7bcbc87fe1c1bd816a98176bc2a9b.zip u-boot-65ea758939a7bcbc87fe1c1bd816a98176bc2a9b.tar.gz u-boot-65ea758939a7bcbc87fe1c1bd816a98176bc2a9b.tar.bz2 | |
MPC8308RDB: various clean ups
This patch cleans up the Freescale MPC8308RDB Development board support.
Things fixed:
- Removed unused PCIE2 definitions from configuration
- SICR{L,H} defines used for System I/O Configuration Registers values
instead of hardcoding
- CONFIG_SYS_SCCR_PCIEXP1CM used to enable PCIE clock instead of
writing to SCCR from the board code
- sleep mode stuff removed as MPC8308 has no support for deep sleep and
PMCCR1 register. board_early_init_f() removed.
- MPC8308 has no ERRATA for DDR controller so workaround removed
- 'assignment in if statement' issues solved
- use LBLAWAR_* defines instead of hardcoding
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'board/freescale/mpc8308rdb/mpc8308rdb.c')
| -rw-r--r-- | board/freescale/mpc8308rdb/mpc8308rdb.c | 20 |
1 files changed, 4 insertions, 16 deletions
diff --git a/board/freescale/mpc8308rdb/mpc8308rdb.c b/board/freescale/mpc8308rdb/mpc8308rdb.c index a864189..fb29abf 100644 --- a/board/freescale/mpc8308rdb/mpc8308rdb.c +++ b/board/freescale/mpc8308rdb/mpc8308rdb.c @@ -36,16 +36,6 @@ DECLARE_GLOBAL_DATA_PTR; -int board_early_init_f(void) -{ - immap_t *im = (immap_t *)CONFIG_SYS_IMMR; - - if (in_be32(&im->pmc.pmccr1) & PMCCR1_POWER_OFF) - gd->flags |= GD_FLG_SILENT; - - return 0; -} - static u8 read_board_info(void) { u8 val8; @@ -96,16 +86,12 @@ void pci_init_board(void) { immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; sysconf83xx_t *sysconf = &immr->sysconf; - clk83xx_t *clk = (clk83xx_t *)&immr->clk; law83xx_t *pcie_law = sysconf->pcielaw; struct pci_region *pcie_reg[] = { pcie_regions_0 }; fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX, FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V); - clrsetbits_be32(&clk->sccr, SCCR_PCIEXP1CM , - SCCR_PCIEXP1CM_1); - /* Deassert the resets in the control register */ out_be32(&sysconf->pecr1, 0xE0008000); udelay(2000); @@ -146,12 +132,14 @@ int board_eth_init(bd_t *bis) int rv, num_if = 0; /* Initialize TSECs first */ - if ((rv = cpu_eth_init(bis)) >= 0) + rv = cpu_eth_init(bis); + if (rv >= 0) num_if += rv; else printf("ERROR: failed to initialize TSECs.\n"); - if ((rv = pci_eth_init(bis)) >= 0) + rv = pci_eth_init(bis); + if (rv >= 0) num_if += rv; else printf("ERROR: failed to initialize PCI Ethernet.\n"); |