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author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2016-08-02 19:03:27 +0800 |
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committer | York Sun <york.sun@nxp.com> | 2016-09-14 14:07:13 -0700 |
commit | b392a6d4b05b7409283cd75b4ac6bd12018d187a (patch) | |
tree | 272b0b5b8780f23ed8fc102d09c97d94c9dbe7e6 /board/freescale/ls1021atwr | |
parent | 664b6520582fcea7e150f57258c7a63627837318 (diff) | |
download | u-boot-b392a6d4b05b7409283cd75b4ac6bd12018d187a.zip u-boot-b392a6d4b05b7409283cd75b4ac6bd12018d187a.tar.gz u-boot-b392a6d4b05b7409283cd75b4ac6bd12018d187a.tar.bz2 |
fsl-layerscape: Add workaround for PCIe erratum A010315
As the access to serders protocol unselected PCIe controller will
hang. So disable the R/W permission to unselected PCIe controller
including its CCSR, IO space and memory space according to the
serders protocol field of RCW.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/ls1021atwr')
-rw-r--r-- | board/freescale/ls1021atwr/ls1021atwr.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index 85c036b..4638bed 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -480,6 +480,10 @@ void ls1twr_program_regulator(void) int board_init(void) { +#ifdef CONFIG_SYS_FSL_ERRATUM_A010315 + erratum_a010315(); +#endif + #ifndef CONFIG_SYS_FSL_NO_SERDES fsl_serdes_init(); #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) |