diff options
author | Tom Rini <trini@konsulko.com> | 2021-02-09 08:02:59 -0500 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2021-02-15 10:11:37 -0500 |
commit | 8444860ca0125a0dcd2c18d85f6eb062399be154 (patch) | |
tree | a322317317d7b4eaae6933a924c12eb1494fd306 /board/bluegiga/apx4devkit | |
parent | e31350c3c466f1a548ae6a224be0cc84ad6c2163 (diff) | |
download | u-boot-8444860ca0125a0dcd2c18d85f6eb062399be154.zip u-boot-8444860ca0125a0dcd2c18d85f6eb062399be154.tar.gz u-boot-8444860ca0125a0dcd2c18d85f6eb062399be154.tar.bz2 |
arm: Remove apx4devkit board
This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago. In addition there are other DM
migrations it is also missing. Remove it.
Cc: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Lauri Hintsala <lauri.hintsala@silabs.com<mailto:lauri.hintsala@silabs.com>>
Signed-off-by: Tom Rini <trini@konsulko.com<mailto:trini@konsulko.com>>
Diffstat (limited to 'board/bluegiga/apx4devkit')
-rw-r--r-- | board/bluegiga/apx4devkit/Kconfig | 15 | ||||
-rw-r--r-- | board/bluegiga/apx4devkit/MAINTAINERS | 6 | ||||
-rw-r--r-- | board/bluegiga/apx4devkit/Makefile | 10 | ||||
-rw-r--r-- | board/bluegiga/apx4devkit/apx4devkit.c | 142 | ||||
-rw-r--r-- | board/bluegiga/apx4devkit/spl_boot.c | 152 |
5 files changed, 0 insertions, 325 deletions
diff --git a/board/bluegiga/apx4devkit/Kconfig b/board/bluegiga/apx4devkit/Kconfig deleted file mode 100644 index f327fa1..0000000 --- a/board/bluegiga/apx4devkit/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_APX4DEVKIT - -config SYS_BOARD - default "apx4devkit" - -config SYS_VENDOR - default "bluegiga" - -config SYS_SOC - default "mxs" - -config SYS_CONFIG_NAME - default "apx4devkit" - -endif diff --git a/board/bluegiga/apx4devkit/MAINTAINERS b/board/bluegiga/apx4devkit/MAINTAINERS deleted file mode 100644 index 286e9e9..0000000 --- a/board/bluegiga/apx4devkit/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -APX4DEVKIT BOARD -M: Lauri Hintsala <lauri.hintsala@bluegiga.com> -S: Maintained -F: board/bluegiga/apx4devkit/ -F: include/configs/apx4devkit.h -F: configs/apx4devkit_defconfig diff --git a/board/bluegiga/apx4devkit/Makefile b/board/bluegiga/apx4devkit/Makefile deleted file mode 100644 index 039d62d..0000000 --- a/board/bluegiga/apx4devkit/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -ifndef CONFIG_SPL_BUILD -obj-y := apx4devkit.o -else -obj-y := spl_boot.o -endif diff --git a/board/bluegiga/apx4devkit/apx4devkit.c b/board/bluegiga/apx4devkit/apx4devkit.c deleted file mode 100644 index 739f71f..0000000 --- a/board/bluegiga/apx4devkit/apx4devkit.c +++ /dev/null @@ -1,142 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Bluegiga APX4 Development Kit - * - * Copyright (C) 2012 Bluegiga Technologies Oy - * - * Authors: - * Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com> - * Lauri Hintsala <lauri.hintsala@bluegiga.com> - * - * Based on m28evk.c: - * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> - * on behalf of DENX Software Engineering GmbH - */ - -#include <common.h> -#include <init.h> -#include <net.h> -#include <asm/gpio.h> -#include <asm/io.h> -#include <asm/setup.h> -#include <asm/arch/imx-regs.h> -#include <asm/arch/iomux-mx28.h> -#include <asm/arch/clock.h> -#include <asm/arch/sys_proto.h> -#include <env.h> -#include <linux/mii.h> -#include <miiphy.h> -#include <netdev.h> -#include <errno.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* Functions */ -int board_early_init_f(void) -{ - /* IO0 clock at 480MHz */ - mxs_set_ioclk(MXC_IOCLK0, 480000); - /* IO1 clock at 480MHz */ - mxs_set_ioclk(MXC_IOCLK1, 480000); - - /* SSP0 clock at 96MHz */ - mxs_set_sspclk(MXC_SSPCLK0, 96000, 0); - - return 0; -} - -int dram_init(void) -{ - return mxs_dram_init(); -} - -int board_init(void) -{ - /* Adress of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; - - return 0; -} - -#ifdef CONFIG_CMD_MMC -int board_mmc_init(struct bd_info *bis) -{ - return mxsmmc_initialize(bis, 0, NULL, NULL); -} -#endif - - -#ifdef CONFIG_CMD_NET - -#define MII_PHY_CTRL2 0x1f -int fecmxc_mii_postcall(int phy) -{ - /* change PHY RMII clock to 50MHz */ - miiphy_write("FEC", 0, MII_PHY_CTRL2, 0x8180); - - return 0; -} - -int board_eth_init(struct bd_info *bis) -{ - int ret; - struct eth_device *dev; - - ret = cpu_eth_init(bis); - if (ret) { - printf("FEC MXS: Unable to init FEC clocks\n"); - return ret; - } - - ret = fecmxc_initialize(bis); - if (ret) { - printf("FEC MXS: Unable to init FEC\n"); - return ret; - } - - dev = eth_get_dev_by_name("FEC"); - if (!dev) { - printf("FEC MXS: Unable to get FEC device entry\n"); - return -EINVAL; - } - - ret = fecmxc_register_mii_postcall(dev, fecmxc_mii_postcall); - if (ret) { - printf("FEC MXS: Unable to register FEC MII postcall\n"); - return ret; - } - - return ret; -} -#endif - -#ifdef CONFIG_SERIAL_TAG -#define MXS_OCOTP_MAX_TIMEOUT 1000000 -void get_board_serial(struct tag_serialnr *serialnr) -{ - struct mxs_ocotp_regs *ocotp_regs = - (struct mxs_ocotp_regs *)MXS_OCOTP_BASE; - - serialnr->high = 0; - serialnr->low = 0; - - writel(OCOTP_CTRL_RD_BANK_OPEN, &ocotp_regs->hw_ocotp_ctrl_set); - - if (mxs_wait_mask_clr(&ocotp_regs->hw_ocotp_ctrl_reg, OCOTP_CTRL_BUSY, - MXS_OCOTP_MAX_TIMEOUT)) { - printf("MXS: Can't get serial number from OCOTP\n"); - return; - } - - serialnr->low = readl(&ocotp_regs->hw_ocotp_cust3); -} -#endif - -#ifdef CONFIG_REVISION_TAG -u32 get_board_rev(void) -{ - if (env_get("revision#") != NULL) - return simple_strtoul(env_get("revision#"), NULL, 10); - return 0; -} -#endif diff --git a/board/bluegiga/apx4devkit/spl_boot.c b/board/bluegiga/apx4devkit/spl_boot.c deleted file mode 100644 index e5d5c46..0000000 --- a/board/bluegiga/apx4devkit/spl_boot.c +++ /dev/null @@ -1,152 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Bluegiga APX4 Development Kit - * - * Copyright (C) 2012 Bluegiga Technologies Oy - * - * Authors: - * Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com> - * Lauri Hintsala <lauri.hintsala@bluegiga.com> - * - * Based on spl_boot.c: - * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> - * on behalf of DENX Software Engineering GmbH - */ - -#include <common.h> -#include <config.h> -#include <asm/gpio.h> -#include <asm/io.h> -#include <asm/arch/iomux-mx28.h> -#include <asm/arch/imx-regs.h> -#include <asm/arch/sys_proto.h> - -#define MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) -#define MUX_CONFIG_GPMI (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL) -#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) -#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL) - -const iomux_cfg_t iomux_setup[] = { - /* DUART */ - MX28_PAD_PWM0__DUART_RX, - MX28_PAD_PWM1__DUART_TX, - - /* LED */ - MX28_PAD_PWM3__GPIO_3_28, - - /* MMC0 */ - MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0, - MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0, - MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0, - MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0, - MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0, - MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT | - (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_NOPULL), - MX28_PAD_SSP0_SCK__SSP0_SCK | - (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), - - /* GPMI NAND */ - MX28_PAD_GPMI_D00__GPMI_D0 | MUX_CONFIG_GPMI, - MX28_PAD_GPMI_D01__GPMI_D1 | MUX_CONFIG_GPMI, - MX28_PAD_GPMI_D02__GPMI_D2 | MUX_CONFIG_GPMI, - MX28_PAD_GPMI_D03__GPMI_D3 | MUX_CONFIG_GPMI, - MX28_PAD_GPMI_D04__GPMI_D4 | MUX_CONFIG_GPMI, - MX28_PAD_GPMI_D05__GPMI_D5 | MUX_CONFIG_GPMI, - MX28_PAD_GPMI_D06__GPMI_D6 | MUX_CONFIG_GPMI, - MX28_PAD_GPMI_D07__GPMI_D7 | MUX_CONFIG_GPMI, - MX28_PAD_GPMI_CE0N__GPMI_CE0N | MUX_CONFIG_GPMI, - MX28_PAD_GPMI_RDY0__GPMI_READY0 | MUX_CONFIG_GPMI, - MX28_PAD_GPMI_RDN__GPMI_RDN | - (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP), - MX28_PAD_GPMI_WRN__GPMI_WRN | MUX_CONFIG_GPMI, - MX28_PAD_GPMI_ALE__GPMI_ALE | MUX_CONFIG_GPMI, - MX28_PAD_GPMI_CLE__GPMI_CLE | MUX_CONFIG_GPMI, - MX28_PAD_GPMI_RESETN__GPMI_RESETN | MUX_CONFIG_GPMI, - - /* FEC0 */ - MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET, - MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET, - MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MUX_CONFIG_ENET, - MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET, - MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MUX_CONFIG_ENET, - MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MUX_CONFIG_ENET, - MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET, - MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET, - MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET, - - /* I2C */ - MX28_PAD_I2C0_SCL__I2C0_SCL, - MX28_PAD_I2C0_SDA__I2C0_SDA, - - /* EMI */ - MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI, - MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI, - MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI, - MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI, - MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI, - MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI, - MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI, - MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI, - MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI, - MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI, - MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI, - MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI, - MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI, - MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI, - MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI, - MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI, - MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI, - MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI, - MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI, - MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI, - MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI, - MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI, - MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI, - MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI, - MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI, - - MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI, - MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI, - MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI, - MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI, - MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI, - MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI, - MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI, - MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI, - MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI, - MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI, - MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI, - MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI, - MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI, - MX28_PAD_EMI_A13__EMI_ADDR13 | MUX_CONFIG_EMI, - MX28_PAD_EMI_A14__EMI_ADDR14 | MUX_CONFIG_EMI, - MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI, - MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI, - MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI, - MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI, - MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI, - MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI, - MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI, - MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI, - MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI, -}; - -void board_init_ll(const uint32_t arg, const uint32_t *resptr) -{ - mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup)); - - /* switch LED on */ - gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0); -} - -void mxs_adjust_memory_params(uint32_t *dram_vals) -{ - /* - * All address lines are routed from CPU to memory chip. - * ADDR_PINS field is set to zero. - */ - dram_vals[0x74 >> 2] = 0x0f02000a; - - /* Used memory has 4 banks. EIGHT_BANK_MODE bit is disabled. */ - dram_vals[0x7c >> 2] = 0x00000101; -} |