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| author | Nicolas Ferre <nicolas.ferre@microchip.com> | 2020-10-30 18:33:14 +0100 |
|---|---|---|
| committer | Eugen Hristev <eugen.hristev@microchip.com> | 2021-01-07 09:44:16 +0200 |
| commit | aeaef07c5124afbe848f727a24019cf432f5e011 (patch) | |
| tree | b087fbcc76216b0db2e838e399656ea42567be88 /board/CZ.NIC | |
| parent | 05176cd08f352e63ad9d8b2627184a31edaaa51e (diff) | |
| download | u-boot-aeaef07c5124afbe848f727a24019cf432f5e011.zip u-boot-aeaef07c5124afbe848f727a24019cf432f5e011.tar.gz u-boot-aeaef07c5124afbe848f727a24019cf432f5e011.tar.bz2 | |
ARM: dts: sama7g5ek: fix TXC pin configuration
TXC line is directly connected from the SoC to the KSZ9131 PHY. There
is a transient state on this signal, before configuring it to RGMII,
which leads to packet transmit being blocked.
Keeping a pull-up when muxing this pin as function A (G0_TXCK) fixes
the issue.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Diffstat (limited to 'board/CZ.NIC')
0 files changed, 0 insertions, 0 deletions