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| author | Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> | 2018-03-02 16:20:10 +0530 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2018-03-23 09:34:44 +0100 |
| commit | 83bf2ff03d084c68e5dd92f18b6a359b6ac1570b (patch) | |
| tree | 20912ed5c6e445f5cb05c7f7e5dc3a5a3f9504ba /board/Arcturus/ucp1020 | |
| parent | a79b590f78ca9ad2d786e3ae3180cca02cb02bfc (diff) | |
| download | u-boot-83bf2ff03d084c68e5dd92f18b6a359b6ac1570b.zip u-boot-83bf2ff03d084c68e5dd92f18b6a359b6ac1570b.tar.gz u-boot-83bf2ff03d084c68e5dd92f18b6a359b6ac1570b.tar.bz2 | |
arm64: zynqmp: Correct EG/EV part detection logic
The vcu disable bit in efuse ipdisable register is valid only
if PL powered up so, consider PL powerup status for determing
EG/EV part. If PL is not powered up, ignore EG/EV part of string.
The PL powerup status will be filled by pmufw based on PL PROGB
status in the 9th bit of version field.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'board/Arcturus/ucp1020')
0 files changed, 0 insertions, 0 deletions