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| author | Neal Frager <neal.frager@xilinx.com> | 2022-03-02 15:12:02 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2022-03-09 12:39:33 +0100 |
| commit | 9fb9ec5e24f95bef8f342812b159de38af4a27c6 (patch) | |
| tree | ddb469f2762cf70e92e9c559d0fddaaac40f7374 /arch | |
| parent | f76f86029d75df2546e734e3ae1a50fa62d72526 (diff) | |
| download | u-boot-9fb9ec5e24f95bef8f342812b159de38af4a27c6.zip u-boot-9fb9ec5e24f95bef8f342812b159de38af4a27c6.tar.gz u-boot-9fb9ec5e24f95bef8f342812b159de38af4a27c6.tar.bz2 | |
arm64: zynqmp: add support for zcu106 rev1.0
This patch adds psu_init for Xilinx ZCU106 rev1.0. Xilinx ZCU106 rev1.0 has
newer x16 DDR4 memories and it is SW compatible with revA.
Signed-off-by: Neal Frager <neal.frager@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/997b3e23457e4d24ce0e197d742382aaec36c2b2.1646230318.git.michal.simek@xilinx.com
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-zcu106-rev1.0.dts | 16 |
2 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 960f1a9..2edcb26 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -349,6 +349,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-zcu104-revA.dtb \ zynqmp-zcu104-revC.dtb \ zynqmp-zcu106-revA.dtb \ + zynqmp-zcu106-rev1.0.dtb \ zynqmp-zcu111-revA.dtb \ zynqmp-zcu1275-revA.dtb \ zynqmp-zcu1275-revB.dtb \ diff --git a/arch/arm/dts/zynqmp-zcu106-rev1.0.dts b/arch/arm/dts/zynqmp-zcu106-rev1.0.dts new file mode 100644 index 0000000..f43c477 --- /dev/null +++ b/arch/arm/dts/zynqmp-zcu106-rev1.0.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Xilinx ZynqMP ZCU106 Rev1.0 + * + * (C) Copyright 2016 - 2022, Xilinx, Inc. + * + * Michal Simek <michal.simek@xilinx.com> + */ + +#include "zynqmp-zcu106-revA.dts" + +/ { + model = "ZynqMP ZCU106 Rev1.0"; + compatible = "xlnx,zynqmp-zcu106-rev1.0", "xlnx,zynqmp-zcu106-revA", + "xlnx,zynqmp-zcu106", "xlnx,zynqmp"; +}; |