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author | Pali Rohár <pali@kernel.org> | 2021-07-31 14:22:54 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2021-08-11 08:42:26 +0200 |
commit | 7dd26bbff8489da75ea2b80f0ebede03ee05de3c (patch) | |
tree | 92343269dc533b17f55d7cc4076243dd8ee00d3d /arch | |
parent | 2ddf554b8648d892efc5733e7486cec5e93dc269 (diff) | |
download | u-boot-7dd26bbff8489da75ea2b80f0ebede03ee05de3c.zip u-boot-7dd26bbff8489da75ea2b80f0ebede03ee05de3c.tar.gz u-boot-7dd26bbff8489da75ea2b80f0ebede03ee05de3c.tar.bz2 |
arm: mvebu: msys: Set CONFIG_SYS_TCLK globally
This mvebu msys platform always uses fixed 200 MHz TCLK. So specify this
CONFIG_SYS_TCLK option in msys section of global file soc.h file instead of
manual configuration in every board file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-mvebu/include/mach/soc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index eb6906a..e29c0f3 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -187,6 +187,8 @@ #define BOOT_FROM_NAND 0x1 #define BOOT_FROM_UART 0x2 #define BOOT_FROM_SPI 0x3 + +#define CONFIG_SYS_TCLK 200000000 /* 200MHz */ #else /* SAR values for Armada XP */ #define CONFIG_SAR_REG (MVEBU_REGISTER(0x18230)) |