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authorJim Lin <jilin@nvidia.com>2012-07-29 20:53:29 +0000
committerTom Warren <twarren@nvidia.com>2012-09-07 13:54:31 -0700
commit312693c3dd280a73824c6403e249775ccb7c3547 (patch)
treed1e3ca34226778745ef6e6967cf31d9b242e6144 /arch
parent7cedd1811a9ab3ebfe2a8f56239648c1a3fa61d5 (diff)
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tegra: nand: Add Tegra NAND driver
A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/arch-tegra20/tegra20.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra20/tegra20.h b/arch/arm/include/asm/arch-tegra20/tegra20.h
index 6750754..b2fb50e 100644
--- a/arch/arm/include/asm/arch-tegra20/tegra20.h
+++ b/arch/arm/include/asm/arch-tegra20/tegra20.h
@@ -39,6 +39,7 @@
#define NV_PA_APB_UARTC_BASE (NV_PA_APB_MISC_BASE + 0x6200)
#define NV_PA_APB_UARTD_BASE (NV_PA_APB_MISC_BASE + 0x6300)
#define NV_PA_APB_UARTE_BASE (NV_PA_APB_MISC_BASE + 0x6400)
+#define TEGRA20_NAND_BASE (NV_PA_APB_MISC_BASE + 0x8000)
#define TEGRA20_SPI_BASE (NV_PA_APB_MISC_BASE + 0xC380)
#define TEGRA20_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400)
#define TEGRA20_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800)