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| author | Adam Ford <aford173@gmail.com> | 2022-01-11 07:21:06 -0600 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2022-01-22 23:12:56 +0100 |
| commit | 16f4d36c7b8b6aeb0374485acb91afee795ccfc9 (patch) | |
| tree | 86a37f8a8c311cb4d137fa1a7816feb1efd04ae1 /arch | |
| parent | 1a192f1622c8cdf74ab19011c6a5328b72cfc0b3 (diff) | |
| download | u-boot-16f4d36c7b8b6aeb0374485acb91afee795ccfc9.zip u-boot-16f4d36c7b8b6aeb0374485acb91afee795ccfc9.tar.gz u-boot-16f4d36c7b8b6aeb0374485acb91afee795ccfc9.tar.bz2 | |
arm: dts: rz-g2-beacon-u-boot: Enable pinmux for QSPI
When booting from QSPI, the boot ROM appears to mux the QSPI
pins, but it's not guaranteed to be setup when booting from
eMMC. Fix this by explicitly configuring the pinmux.
Signed-off-by: Adam Ford <aford173@gmail.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/rz-g2-beacon-u-boot.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/dts/rz-g2-beacon-u-boot.dtsi b/arch/arm/dts/rz-g2-beacon-u-boot.dtsi index ef0b96a..4d17854 100644 --- a/arch/arm/dts/rz-g2-beacon-u-boot.dtsi +++ b/arch/arm/dts/rz-g2-beacon-u-boot.dtsi @@ -33,12 +33,21 @@ u-boot,dm-pre-reloc; }; +&pfc { + qspi_pins: qspi { + groups = "qspi_ctrl", "qspi_data4"; + function = "qspi"; + }; +}; + &prr { u-boot,dm-pre-reloc; }; &rpc { compatible = "renesas,rcar-gen3-rpc"; + pinctrl-0 = <&qspi_pins>; + pinctrl-names = "default"; num-cs = <1>; spi-max-frequency = <40000000>; #address-cells = <1>; |