ti: remove usage of DM_I2C_COMPAT and don't disable DM_I2C in SPL

DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C
API when DM_I2C is used. The goal is to eventually remove DM_I2C_COMPAT
when all I2C "clients" have been migrated to use the DM API.
This a step in that direction for the TI based platforms.
Build tested with buildman:
buildman -dle am33xx ti omap3 omap4 omap5 davinci keystone

boot tested with:
am335x_evm, am335x_boneblack, am335x_boneblack_vboot (DM version),
am57xx_evm, dra7xx_evm, k2g_evm, am437x_evm

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>

3 files changed, 54 insertions, 11 deletions

diff --git a/arch/arm/mach-keystone/ddr3_spd.c b/arch/arm/mach-keystone/ddr3_spd.c
index 2613092..6eee9ad 100644
--- a/arch/arm/mach-keystone/ddr3_spd.c
+++ b/arch/arm/mach-keystone/ddr3_spd.c
@@ -403,6 +403,7 @@ static void init_ddr3param(struct ddr3_spd_cb *spd_cb,
 static int ddr3_read_spd(ddr3_spd_eeprom_t *spd_params)
 {
 	int ret;
+#ifndef CONFIG_DM_I2C
 	int old_bus;
 
 	i2c_init(CONFIG_SYS_DAVINCI_I2C_SPEED, CONFIG_SYS_DAVINCI_I2C_SLAVE);
@@ -413,7 +414,13 @@ static int ddr3_read_spd(ddr3_spd_eeprom_t *spd_params)
 	ret = i2c_read(0x53, 0, 1, (unsigned char *)spd_params, 256);
 
 	i2c_set_bus_num(old_bus);
+#else
+	struct udevice *dev;
 
+	ret = i2c_get_chip_for_busnum(1, 0x53, 1, &dev);
+	if (!ret)
+		ret = dm_i2c_read(dev, 0, (unsigned char *)spd_params, 256);
+#endif
 	if (ret) {
 		printf("Cannot read DIMM params\n");
 		return 1;
diff --git a/arch/arm/mach-omap2/am33xx/clk_synthesizer.c b/arch/arm/mach-omap2/am33xx/clk_synthesizer.c
index 0e7ad1d..ff1bfaf 100644
--- a/arch/arm/mach-omap2/am33xx/clk_synthesizer.c
+++ b/arch/arm/mach-omap2/am33xx/clk_synthesizer.c
@@ -14,6 +14,7 @@
 
 /**
  * clk_synthesizer_reg_read - Read register from synthesizer.
+ * dev:		i2c bus device (not used if CONFIG_DM_I2C is not set)
  * @addr:	addr within the i2c device
  * buf:		Buffer to which value is to be read.
  *
@@ -21,13 +22,14 @@
  * be send along with enabling byte read more, and then read can happen.
  * Returns 0 on success
  */
-static int clk_synthesizer_reg_read(int addr, uint8_t *buf)
+static int clk_synthesizer_reg_read(struct udevice *dev, int addr, u8 *buf)
 {
 	int rc;
 
 	/* Enable Bye read */
 	addr = addr | CLK_SYNTHESIZER_BYTE_MODE;
 
+#ifndef CONFIG_DM_I2C
 	/* Send the command byte */
 	rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
 	if (rc)
@@ -35,26 +37,46 @@ static int clk_synthesizer_reg_read(int addr, uint8_t *buf)
 
 	/* Read the Data */
 	return i2c_read(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
+#else
+	/* Send the command byte */
+	rc = dm_i2c_reg_write(dev, addr, *buf);
+	if (rc)
+		printf("Failed to send command to clock synthesizer\n");
+
+	/* Read the Data */
+	rc = dm_i2c_reg_read(dev, addr);
+	if (rc < 0)
+		return rc;
+
+	*buf = (u8)rc;
+	return 0;
+#endif
+
 }
 
 /**
  * clk_synthesizer_reg_write - Write a value to register in synthesizer.
+ * dev:		i2c bus device (not used if CONFIG_DM_I2C is not set)
  * @addr:	addr within the i2c device
  * val:		Value to be written in the addr.
  *
  * Enable the byte read mode in the address and start the i2c transfer.
  * Returns 0 on success
  */
-static int clk_synthesizer_reg_write(int addr, uint8_t val)
+static int clk_synthesizer_reg_write(struct udevice *dev, int addr, u8 val)
 {
-	uint8_t cmd[2];
+	u8 cmd[2];
 	int rc = 0;
 
 	/* Enable byte write */
 	cmd[0] = addr | CLK_SYNTHESIZER_BYTE_MODE;
 	cmd[1] = val;
 
+#ifndef CONFIG_DM_I2C
 	rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, cmd, 2);
+#else
+	rc = dm_i2c_write(dev, addr, cmd, 2);
+#endif
 	if (rc)
 		printf("Clock synthesizer reg write failed at addr = 0x%x\n",
 		       addr);
@@ -72,30 +94,42 @@ static int clk_synthesizer_reg_write(int addr, uint8_t val)
 int setup_clock_synthesizer(struct clk_synth *data)
 {
 	int rc;
-	uint8_t val;
-
+	u8 val = 0;
+	struct udevice *dev = NULL;
+#ifndef CONFIG_DM_I2C
 	rc =  i2c_probe(CLK_SYNTHESIZER_I2C_ADDR);
 	if (rc) {
 		printf("i2c probe failed at address 0x%x\n",
 		       CLK_SYNTHESIZER_I2C_ADDR);
 		return rc;
 	}
-
-	rc = clk_synthesizer_reg_read(CLK_SYNTHESIZER_ID_REG, &val);
+#else
+	rc = i2c_get_chip_for_busnum(0, CLK_SYNTHESIZER_I2C_ADDR, 1, &dev);
+	if (rc) {
+		printf("failed to get device for synthesizer at address 0x%x\n",
+		       CLK_SYNTHESIZER_I2C_ADDR);
+		return rc;
+	}
+#endif
+	rc = clk_synthesizer_reg_read(dev, CLK_SYNTHESIZER_ID_REG, &val);
 	if (val != data->id)
 		return rc;
 
 	/* Crystal Load capacitor selection */
-	rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_XCSEL, data->capacitor);
+	rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_XCSEL,
+				       data->capacitor);
 	if (rc)
 		return rc;
-	rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_MUX_REG, data->mux);
+	rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_MUX_REG,
+				       data->mux);
 	if (rc)
 		return rc;
-	rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_PDIV2_REG, data->pdiv2);
+	rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_PDIV2_REG,
+				       data->pdiv2);
 	if (rc)
 		return rc;
-	rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_PDIV3_REG, data->pdiv3);
+	rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_PDIV3_REG,
+				       data->pdiv3);
 	if (rc)
 		return rc;
 
diff --git a/arch/arm/mach-omap2/clocks-common.c b/arch/arm/mach-omap2/clocks-common.c
index 790548e..5932d69 100644
--- a/arch/arm/mach-omap2/clocks-common.c
+++ b/arch/arm/mach-omap2/clocks-common.c
@@ -909,6 +909,7 @@ void prcm_init(void)
 		enable_basic_uboot_clocks();
 }
 
+#if !defined(CONFIG_DM_I2C)
 void gpi2c_init(void)
 {
 	static int gpi2c = 1;
@@ -919,3 +920,4 @@ void gpi2c_init(void)
 		gpi2c = 0;
 	}
 }
+#endif