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| author | Patrice Chotard <patrice.chotard@st.com> | 2017-11-15 13:14:43 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-11-29 22:30:50 -0500 |
| commit | d3651aac4685a21a716c33b0c9636288b013da38 (patch) | |
| tree | 456a59301ab1498cc6e7d11f2a888e8f7bee69af /arch | |
| parent | 34255b92e6e68941ab1134299faa86acc5a1abc8 (diff) | |
| download | u-boot-d3651aac4685a21a716c33b0c9636288b013da38.zip u-boot-d3651aac4685a21a716c33b0c9636288b013da38.tar.gz u-boot-d3651aac4685a21a716c33b0c9636288b013da38.tar.bz2 | |
ARM: DTS: stm32: add pwrcfg node for stm32f746
This node is needed to enable performance mode
when system frequency is set up to 200Mhz.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/stm32f7-u-boot.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/dts/stm32f746.dtsi | 7 |
2 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/dts/stm32f7-u-boot.dtsi b/arch/arm/dts/stm32f7-u-boot.dtsi index 5f77f57..a56ae93 100644 --- a/arch/arm/dts/stm32f7-u-boot.dtsi +++ b/arch/arm/dts/stm32f7-u-boot.dtsi @@ -22,3 +22,7 @@ u-boot,dm-pre-reloc; }; }; + +&pwrcfg { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index 783d4e7..b95cca2 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -99,12 +99,19 @@ status = "disabled"; u-boot,dm-pre-reloc; }; + + pwrcfg: power-config@58024800 { + compatible = "syscon"; + reg = <0x40007000 0x400>; + }; + rcc: rcc@40023810 { #reset-cells = <1>; #clock-cells = <2>; compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; reg = <0x40023800 0x400>; clocks = <&clk_hse>; + st,syscfg = <&pwrcfg>; u-boot,dm-pre-reloc; }; |