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authorMarek Vasut <marex@denx.de>2022-04-24 23:44:04 +0200
committerStefano Babic <sbabic@denx.de>2022-05-20 09:03:01 +0200
commitbe23774ed1e31bd74132b97a2feb2c7864b2ea43 (patch)
tree49d0ecbfc220f97994c469f986eabf6471c026f7 /arch
parent52b6b480db314d623eba536f390c0dc879900262 (diff)
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ARM: imx: imx27: Introduce and use UART_BASE_ADDR(n)
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base address. Convert all board configurations to this new macro. This is the first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a clean up, no functional change. The new macro contains compile-time test to verify N is in suitable range. The test works such that it multiplies constant N by constant double-negation of size of a non-empty structure, i.e. it multiplies constant N by constant 1 in each successful compilation case. The non-empty structure may contain C11 _Static_assert(), make use of this and place the kernel variant of static assert in there, so that it performs the compile-time check for N in the correct range. Note that it is not possible to directly use static_assert in compound statements, hence this convoluted construct. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/arch-mx27/imx-regs.h24
1 files changed, 18 insertions, 6 deletions
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h
index d39f6b0..77794d7 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -179,16 +179,16 @@ struct fuse_bank0_regs {
#define IMX_TIM2_BASE (0x04000 + IMX_IO_BASE)
#define IMX_TIM3_BASE (0x05000 + IMX_IO_BASE)
#define IMX_RTC_BASE (0x07000 + IMX_IO_BASE)
-#define UART1_BASE (0x0a000 + IMX_IO_BASE)
-#define UART2_BASE (0x0b000 + IMX_IO_BASE)
-#define UART3_BASE (0x0c000 + IMX_IO_BASE)
-#define UART4_BASE (0x0d000 + IMX_IO_BASE)
+#define UART1_BASE_ADDR (0x0a000 + IMX_IO_BASE)
+#define UART2_BASE_ADDR (0x0b000 + IMX_IO_BASE)
+#define UART3_BASE_ADDR (0x0c000 + IMX_IO_BASE)
+#define UART4_BASE_ADDR (0x0d000 + IMX_IO_BASE)
#define I2C1_BASE_ADDR (0x12000 + IMX_IO_BASE)
#define IMX_GPIO_BASE (0x15000 + IMX_IO_BASE)
#define IMX_TIM4_BASE (0x19000 + IMX_IO_BASE)
#define IMX_TIM5_BASE (0x1a000 + IMX_IO_BASE)
-#define IMX_UART5_BASE (0x1b000 + IMX_IO_BASE)
-#define IMX_UART6_BASE (0x1c000 + IMX_IO_BASE)
+#define UART5_BASE_ADDR (0x1b000 + IMX_IO_BASE)
+#define UART6_BASE_ADDR (0x1c000 + IMX_IO_BASE)
#define I2C2_BASE_ADDR (0x1D000 + IMX_IO_BASE)
#define IMX_TIM6_BASE (0x1f000 + IMX_IO_BASE)
#define IMX_AIPI2_BASE (0x20000 + IMX_IO_BASE)
@@ -204,6 +204,18 @@ struct fuse_bank0_regs {
#define NFC_BASE_ADDR IMX_NFC_BASE
+#define UART_BASE_ADDR(n) ( \
+ !!sizeof(struct { \
+ static_assert((n) >= 1 && (n) <= 6); \
+ int pad; \
+ }) * ( \
+ (n) == 1 ? UART1_BASE_ADDR : \
+ (n) == 2 ? UART2_BASE_ADDR : \
+ (n) == 3 ? UART3_BASE_ADDR : \
+ (n) == 4 ? UART4_BASE_ADDR : \
+ (n) == 5 ? UART5_BASE_ADDR : \
+ UART6_BASE_ADDR) \
+ )
/* FMCR System Control bit definition*/
#define UART4_RXD_CTL (1 << 25)