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authorPeng Fan <peng.fan@nxp.com>2018-01-10 13:20:33 +0800
committerStefano Babic <sbabic@denx.de>2018-02-04 12:00:58 +0100
commitecd7ab56284613a92975a9ea5063015cb2a6ce43 (patch)
treefcee9a43f3d49f633553bd06cccf01a51d864136 /arch
parent8cf223133c11c8064b4c8c258403371bc1873804 (diff)
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imx: bootaux: support i.MX8M
Add i.MX8M support. Because i.MX8M use SiP call trap to Arm Trusted Firmware to handle M4, so use #ifdef to avoid build error on i.MX6/7. Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-imx/imx_bootaux.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c
index 0272851..6256b3a 100644
--- a/arch/arm/mach-imx/imx_bootaux.c
+++ b/arch/arm/mach-imx/imx_bootaux.c
@@ -6,7 +6,9 @@
#include <common.h>
#include <asm/io.h>
+#include <asm/mach-imx/sys_proto.h>
#include <command.h>
+#include <imx_sip.h>
#include <linux/compiler.h>
int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
@@ -24,14 +26,21 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
writel(pc, M4_BOOTROM_BASE_ADDR + 4);
/* Enable M4 */
+#ifdef CONFIG_MX8M
+ call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0);
+#else
clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET,
SRC_M4C_NON_SCLR_RST_MASK, SRC_M4_ENABLE_MASK);
+#endif
return 0;
}
int arch_auxiliary_core_check_up(u32 core_id)
{
+#ifdef CONFIG_MX8M
+ return call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0);
+#else
unsigned int val;
val = readl(SRC_BASE_ADDR + SRC_M4_REG_OFFSET);
@@ -40,6 +49,7 @@ int arch_auxiliary_core_check_up(u32 core_id)
return 0; /* assert in reset */
return 1;
+#endif
}
/*