diff options
| author | Aswath Govindraju <a-govindraju@ti.com> | 2021-07-21 21:28:42 +0530 |
|---|---|---|
| committer | Lokesh Vutla <lokeshvutla@ti.com> | 2021-07-27 10:57:12 +0530 |
| commit | cbea79867e906e642d872f8043ea2f9cb6dd7386 (patch) | |
| tree | 201b4f245fcced62ae9cf2a2c3ef4fc7a4c5d122 /arch | |
| parent | 6c4be8eb7e6e101d8ef72cb3096af0c8f767feb0 (diff) | |
| download | u-boot-cbea79867e906e642d872f8043ea2f9cb6dd7386.zip u-boot-cbea79867e906e642d872f8043ea2f9cb6dd7386.tar.gz u-boot-cbea79867e906e642d872f8043ea2f9cb6dd7386.tar.bz2 | |
arm: dts: k3-j7200-common-proc-board: Enable SERDES DT
Add default lane function for torrent serdes. This is in sync
with v5.13 Linux Kernel.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210721155849.20994-14-kishon@ti.com
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/k3-j7200-common-proc-board.dts | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-j7200-common-proc-board.dts b/arch/arm/dts/k3-j7200-common-proc-board.dts index 5120711..f0440cd 100644 --- a/arch/arm/dts/k3-j7200-common-proc-board.dts +++ b/arch/arm/dts/k3-j7200-common-proc-board.dts @@ -9,6 +9,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/net/ti-dp83867.h> #include <dt-bindings/mux/ti-serdes.h> +#include <dt-bindings/phy/phy.h> / { chosen { @@ -281,3 +282,25 @@ ti,adc-channels = <0 1 2 3 4 5 6 7>; }; }; + +&serdes_refclk { + clock-frequency = <100000000>; +}; + +&serdes0 { + serdes0_pcie_link: link@0 { + reg = <0>; + cdns,num-lanes = <2>; + #phy-cells = <0>; + cdns,phy-type = <PHY_TYPE_PCIE>; + resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>; + }; + + serdes0_qsgmii_link: link@1 { + reg = <2>; + cdns,num-lanes = <1>; + #phy-cells = <0>; + cdns,phy-type = <PHY_TYPE_QSGMII>; + resets = <&serdes_wiz0 3>; + }; +}; |