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| author | Andre Przywara <andre.przywara@arm.com> | 2017-02-16 01:20:21 +0000 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2017-04-05 15:03:17 +0530 |
| commit | 85db5831ad4b62719775ff0fd0918a944755b967 (patch) | |
| tree | 3fedd00444ea4d6e9d0195c5fb5826a290056f35 /arch | |
| parent | 4d24e5f175fee197cb39027de9048a8c18fa6dba (diff) | |
| download | u-boot-85db5831ad4b62719775ff0fd0918a944755b967.zip u-boot-85db5831ad4b62719775ff0fd0918a944755b967.tar.gz u-boot-85db5831ad4b62719775ff0fd0918a944755b967.tar.bz2 | |
sunxi: simplify ACTLR.SMP bit set #ifdef
Instead of enumerating all SoC families that need that bit set, let's
just express this more clearly: The SMP bits needs to be set on
SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the
other way round, so we use ! CPU_IS_UP and ! ARM64.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/Kconfig | 4 | ||||
| -rw-r--r-- | arch/arm/mach-sunxi/board.c | 5 |
2 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e644ee3..7b20750 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -214,6 +214,10 @@ config ENABLE_ARM_SOC_BOOT0_HOOK ARM_SOC_BOOT0_HOOK which contains the required assembler preprocessor code. +config ARM_CORTEX_CPU_IS_UP + bool + default n + config USE_ARCH_MEMCPY bool "Use an assembly optimized implementation of memcpy" default y diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 58fbacb..fdcf68e 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -180,10 +180,7 @@ void s_init(void) /* No H3 BSP, boot0 seems to not modify SUNXI_SRAMC_BASE + 0x44 */ #endif -#if defined CONFIG_MACH_SUN6I || \ - defined CONFIG_MACH_SUN7I || \ - defined CONFIG_MACH_SUN8I || \ - defined CONFIG_MACH_SUN9I +#if !defined(CONFIG_ARM_CORTEX_CPU_IS_UP) && !defined(CONFIG_ARM64) /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */ asm volatile( "mrc p15, 0, r0, c1, c0, 1\n" |