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| author | Adam Ford <aford173@gmail.com> | 2018-01-23 04:04:28 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-01-30 12:52:57 -0500 |
| commit | 76e22222d3aa6edf0150d32d6a3c501bf3424b5d (patch) | |
| tree | 132bc276fe64803c4e52f7733f1f4e37b8163b8f /arch | |
| parent | 405fc8305baef921593b822809fb7bf60474b73f (diff) | |
| download | u-boot-76e22222d3aa6edf0150d32d6a3c501bf3424b5d.zip u-boot-76e22222d3aa6edf0150d32d6a3c501bf3424b5d.tar.gz u-boot-76e22222d3aa6edf0150d32d6a3c501bf3424b5d.tar.bz2 | |
Convert CONFIG_SYS_DV_CLKMODE et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_DV_CLKMODE
CONFIG_SYS_DA850_PLL0_POSTDIV
CONFIG_SYS_DA850_PLL0_PLLDIV1
CONFIG_SYS_DA850_PLL0_PLLDIV2
CONFIG_SYS_DA850_PLL0_PLLDIV3
CONFIG_SYS_DA850_PLL0_PLLDIV4
CONFIG_SYS_DA850_PLL0_PLLDIV5
CONFIG_SYS_DA850_PLL0_PLLDIV6
CONFIG_SYS_DA850_PLL0_PLLDIV7
CONFIG_SYS_DA850_PLL1_POSTDIV
CONFIG_SYS_DA850_PLL1_PLLDIV1
CONFIG_SYS_DA850_PLL1_PLLDIV2
CONFIG_SYS_DA850_PLL1_PLLDIV3
Signed-off-by: Adam Ford <aford173@gmail.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-davinci/Kconfig | 85 |
1 files changed, 84 insertions, 1 deletions
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index 51a70e0..7b05b17 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -24,7 +24,7 @@ config TARGET_EA20 config TARGET_OMAPL138_LCDK bool "OMAPL138 LCDK" - select SOC_DA8XX + select SOC_DA850 select SUPPORT_SPL config TARGET_CALIMAIN @@ -63,6 +63,89 @@ config SOC_DA8XX config MACH_DAVINCI_DA850_EVM bool +if SYS_DA850_PLL_INIT +comment "DA850 PLL Initialization Parameters" + +config SYS_DV_CLKMODE + int "PLLCTL Clock Mode" + default 0 if SOC_DA850 + help + Set PLLCTL Clock Mode bit as External Clock or On Chip oscillator + +config SYS_DA850_PLL0_POSTDIV + int "PLLC0 PLL Post-Divider" + default 1 if SOC_DA850 + help + Value written to PLLC0 PLL Post-Divider Control Register + +config SYS_DA850_PLL0_PLLDIV1 + hex "PLLC0 Divider 1" + default 0x8000 if SOC_DA850 + help + Value written to PLLC0 Divider 1 register + +config SYS_DA850_PLL0_PLLDIV2 + hex "PLLC0 Divider 2" + default 0x8001 if SOC_DA850 + help + Value written to PLLC0 Divider 2 register + +config SYS_DA850_PLL0_PLLDIV3 + hex "PLLC0 Divider 3" + default 0x8002 if SOC_DA850 + help + Value written to PLLC0 Divider 3 register + +config SYS_DA850_PLL0_PLLDIV4 + hex "PLLC0 Divider 4" + default 0x8003 if SOC_DA850 + help + Value written to PLLC0 Divider 4 register + +config SYS_DA850_PLL0_PLLDIV5 + hex "PLLC0 Divider 5" + default 0x8002 if SOC_DA850 + help + Value written to PLLC0 Divider 5 register + +config SYS_DA850_PLL0_PLLDIV6 + hex "PLLC0 Divider 6" + default 0x8000 if SOC_DA850 + help + Value written to PLLC0 Divider 6 register + +config SYS_DA850_PLL0_PLLDIV7 + hex "PLLC0 Divider 7" + default 0x8005 if SOC_DA850 + help + Value written to PLLC0 Divider 7 register + +config SYS_DA850_PLL1_POSTDIV + hex "PLLC1 PLL Post-Divider" + default 1 if SOC_DA850 + help + Value written to PLLC1 PLL Post-Divider Control Register + +config SYS_DA850_PLL1_PLLDIV1 + hex "PLLC1 Divider 2" + default 0x8000 if SOC_DA850 + help + Value written to PLLC1 Divider 1 register + +config SYS_DA850_PLL1_PLLDIV2 + hex "PLLC1 Divider 2" + default 0x8001 if SOC_DA850 + help + Value written to PLLC1 Divider 2 register + +config SYS_DA850_PLL1_PLLDIV3 + hex "PLLC1 Divider 3" + default 0x8002 if SOC_DA850 + help + Value written to PLLC1 Divider 3 register + +endif + source "board/Barix/ipam390/Kconfig" source "board/davinci/da8xxevm/Kconfig" source "board/davinci/ea20/Kconfig" |