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| author | David Wu <david.wu@rock-chips.com> | 2018-01-13 14:07:04 +0800 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2018-01-28 17:12:39 +0100 |
| commit | 64a12202ed113c4696c0f4b6c3d6a35d97383851 (patch) | |
| tree | 3692509e925f183ba0054b2013bada8fd5e746c8 /arch | |
| parent | 01c60eafbbf613f8b29fb317f7c52be932d303d1 (diff) | |
| download | u-boot-64a12202ed113c4696c0f4b6c3d6a35d97383851.zip u-boot-64a12202ed113c4696c0f4b6c3d6a35d97383851.tar.gz u-boot-64a12202ed113c4696c0f4b6c3d6a35d97383851.tar.bz2 | |
clk: rockchip: clk_rk3368: Implement "assign-clock-parent"
Implement the setting parent for gmac clock, and add internal
pll div set for mac clk.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/arch-rockchip/cru_rk3368.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h index 5f6a5fb..6a6fe47 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h @@ -95,6 +95,13 @@ enum { CLK_SARADC_DIV_CON_WIDTH = 8, /* CLKSEL43_CON */ + GMAC_DIV_CON_SHIFT = 0x0, + GMAC_DIV_CON_MASK = GENMASK(4, 0), + GMAC_PLL_SHIFT = 6, + GMAC_PLL_MASK = GENMASK(7, 6), + GMAC_PLL_SELECT_NEW = (0x0 << GMAC_PLL_SHIFT), + GMAC_PLL_SELECT_CODEC = (0x1 << GMAC_PLL_SHIFT), + GMAC_PLL_SELECT_GENERAL = (0x2 << GMAC_PLL_SHIFT), GMAC_MUX_SEL_EXTCLK = BIT(8), /* CLKSEL51_CON */ |