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author | Tom Rini <trini@konsulko.com> | 2021-07-31 20:51:24 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2021-07-31 20:51:24 -0400 |
commit | 5371593aed56ee11cbb6cc6ac8d058fcd9b8f58c (patch) | |
tree | d36cea4bd3ddb0657ed0139f52572c1f9f11a529 /arch | |
parent | 85769006fce951d0ebf61585ae0ab6b7d880735d (diff) | |
parent | 001ec430be141fd0c6346bca985c70068ad2d52b (diff) | |
download | u-boot-5371593aed56ee11cbb6cc6ac8d058fcd9b8f58c.zip u-boot-5371593aed56ee11cbb6cc6ac8d058fcd9b8f58c.tar.gz u-boot-5371593aed56ee11cbb6cc6ac8d058fcd9b8f58c.tar.bz2 |
Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi
- Move the PSCI runtime code for H3/A23/A33 into SRAM
- Pick the environment from the actual MMC boot device (SD card vs.
eMMC)
- Plus a small improvement from Icenowy, just for good measure.
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/sunxi-u-boot.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 11 |
2 files changed, 13 insertions, 2 deletions
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi index 06da009..4a6ed3a 100644 --- a/arch/arm/dts/sunxi-u-boot.dtsi +++ b/arch/arm/dts/sunxi-u-boot.dtsi @@ -64,7 +64,7 @@ }; }; -#ifndef CONFIG_MACH_SUN50I_H616 +#ifdef SCP_ADDR scp { description = "SCP firmware"; type = "firmware"; @@ -92,7 +92,7 @@ @config-SEQ { description = "NAME"; firmware = "atf"; -#ifdef CONFIG_MACH_SUN50I_H616 +#ifndef SCP_ADDR loadables = "uboot"; #else loadables = "scp", "uboot"; diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h index 02ce739..d4c795d 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h @@ -11,7 +11,18 @@ #define SUNXI_SRAM_A1_BASE 0x00000000 #define SUNXI_SRAM_A1_SIZE (16 * 1024) /* 16 kiB */ +#if defined(CONFIG_SUNXI_GEN_SUN6I) && \ + !defined(CONFIG_MACH_SUN8I_R40) && \ + !defined(CONFIG_MACH_SUN8I_V3S) +#define SUNXI_SRAM_A2_BASE 0x00040000 +#ifdef CONFIG_MACH_SUN8I_H3 +#define SUNXI_SRAM_A2_SIZE (48 * 1024) /* 16+32 kiB */ +#else +#define SUNXI_SRAM_A2_SIZE (80 * 1024) /* 16+64 kiB */ +#endif +#else #define SUNXI_SRAM_A2_BASE 0x00004000 /* 16 kiB */ +#endif #define SUNXI_SRAM_A3_BASE 0x00008000 /* 13 kiB */ #define SUNXI_SRAM_A4_BASE 0x0000b400 /* 3 kiB */ #define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */ |