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author | Tom Rini <trini@konsulko.com> | 2018-10-10 13:35:17 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2018-10-10 13:35:17 -0400 |
commit | 3d5ced9e22d32112a20f9dc0f5fb1f22ef088079 (patch) | |
tree | 2c1e1f34c4dad05dfd08bd3687e6aee634c58500 /arch | |
parent | 98068b3be51a77d8b931a2f5097b5c22c57bcea5 (diff) | |
parent | 41b781ddf1869f5349e05ace888979f3673fe8c6 (diff) | |
download | u-boot-3d5ced9e22d32112a20f9dc0f5fb1f22ef088079.zip u-boot-3d5ced9e22d32112a20f9dc0f5fb1f22ef088079.tar.gz u-boot-3d5ced9e22d32112a20f9dc0f5fb1f22ef088079.tar.bz2 |
Merge tag 'dm-9oct18' of git://git.denx.de/u-boot-dm
Test improvements to tidy up output and drop duplicate tests
Sandbox SPL/TPL support
Various dm-related improvements
Diffstat (limited to 'arch')
-rw-r--r-- | arch/sandbox/cpu/os.c | 85 | ||||
-rw-r--r-- | arch/sandbox/cpu/start.c | 19 | ||||
-rw-r--r-- | arch/sandbox/cpu/state.c | 6 | ||||
-rw-r--r-- | arch/sandbox/dts/sandbox.dts | 20 | ||||
-rw-r--r-- | arch/sandbox/dts/sandbox64.dts | 20 | ||||
-rw-r--r-- | arch/sandbox/dts/sandbox_pmic.dtsi | 2 | ||||
-rw-r--r-- | arch/sandbox/dts/test.dts | 49 | ||||
-rw-r--r-- | arch/sandbox/include/asm/state.h | 2 | ||||
-rw-r--r-- | arch/sandbox/include/asm/test.h | 15 | ||||
-rw-r--r-- | arch/x86/cpu/coreboot/coreboot.c | 4 | ||||
-rw-r--r-- | arch/x86/cpu/mtrr.c | 31 | ||||
-rw-r--r-- | arch/x86/include/asm/mtrr.h | 6 |
12 files changed, 208 insertions, 51 deletions
diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index 9fbcb9e..07e4647 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -38,14 +38,6 @@ ssize_t os_read(int fd, void *buf, size_t count) return read(fd, buf, count); } -ssize_t os_read_no_block(int fd, void *buf, size_t count) -{ - const int flags = fcntl(fd, F_GETFL, 0); - - fcntl(fd, F_SETFL, flags | O_NONBLOCK); - return os_read(fd, buf, count); -} - ssize_t os_write(int fd, const void *buf, size_t count) { return write(fd, buf, count); @@ -85,6 +77,8 @@ int os_open(const char *pathname, int os_flags) if (os_flags & OS_O_CREAT) flags |= O_CREAT; + if (os_flags & OS_O_TRUNC) + flags |= O_TRUNC; return open(pathname, flags, 0777); } @@ -104,14 +98,41 @@ void os_exit(int exit_code) exit(exit_code); } +int os_write_file(const char *name, const void *buf, int size) +{ + char fname[256]; + int fd; + + fd = os_open(fname, OS_O_WRONLY | OS_O_CREAT | OS_O_TRUNC); + if (fd < 0) { + printf("Cannot open file '%s'\n", fname); + return -EIO; + } + if (os_write(fd, buf, size) != size) { + printf("Cannot write to file '%s'\n", fname); + return -EIO; + } + os_close(fd); + printf("Write '%s', size %#x (%d)\n", name, size, size); + + return 0; +} + /* Restore tty state when we exit */ static struct termios orig_term; static bool term_setup; +static bool term_nonblock; void os_fd_restore(void) { if (term_setup) { + int flags; + tcsetattr(0, TCSANOW, &orig_term); + if (term_nonblock) { + flags = fcntl(0, F_GETFL, 0); + fcntl(0, F_SETFL, flags & ~O_NONBLOCK); + } term_setup = false; } } @@ -120,6 +141,7 @@ void os_fd_restore(void) void os_tty_raw(int fd, bool allow_sigs) { struct termios term; + int flags; if (term_setup) return; @@ -136,6 +158,13 @@ void os_tty_raw(int fd, bool allow_sigs) if (tcsetattr(fd, TCSANOW, &term)) return; + flags = fcntl(fd, F_GETFL, 0); + if (!(flags & O_NONBLOCK)) { + if (fcntl(fd, F_SETFL, flags | O_NONBLOCK)) + return; + term_nonblock = true; + } + term_setup = true; atexit(os_fd_restore); } @@ -569,15 +598,40 @@ int os_find_u_boot(char *fname, int maxlen) struct sandbox_state *state = state_get_current(); const char *progname = state->argv[0]; int len = strlen(progname); + const char *suffix; char *p; int fd; if (len >= maxlen || len < 4) return -ENOSPC; - /* Look for 'u-boot' in the same directory as 'u-boot-spl' */ strcpy(fname, progname); - if (!strcmp(fname + len - 4, "-spl")) { + suffix = fname + len - 4; + + /* If we are TPL, boot to SPL */ + if (!strcmp(suffix, "-tpl")) { + fname[len - 3] = 's'; + fd = os_open(fname, O_RDONLY); + if (fd >= 0) { + close(fd); + return 0; + } + + /* Look for 'u-boot-tpl' in the tpl/ directory */ + p = strstr(fname, "/tpl/"); + if (p) { + p[1] = 's'; + fd = os_open(fname, O_RDONLY); + if (fd >= 0) { + close(fd); + return 0; + } + } + return -ENOENT; + } + + /* Look for 'u-boot' in the same directory as 'u-boot-spl' */ + if (!strcmp(suffix, "-spl")) { fname[len - 4] = '\0'; fd = os_open(fname, O_RDONLY); if (fd >= 0) { @@ -636,3 +690,14 @@ void os_abort(void) { abort(); } + +int os_mprotect_allow(void *start, size_t len) +{ + int page_size = getpagesize(); + + /* Move start to the start of a page, len to the end */ + start = (void *)(((ulong)start) & ~(page_size - 1)); + len = (len + page_size * 2) & ~(page_size - 1); + + return mprotect(start, len, PROT_READ | PROT_WRITE); +} diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c index 59c68a2..2ee3b48 100644 --- a/arch/sandbox/cpu/start.c +++ b/arch/sandbox/cpu/start.c @@ -177,7 +177,7 @@ static int sandbox_cmdline_cb_memory(struct sandbox_state *state, err = os_read_ram_buf(arg); if (err) { - printf("Failed to read RAM buffer\n"); + printf("Failed to read RAM buffer '%s': %d\n", arg, err); return err; } @@ -273,6 +273,16 @@ static int sandbox_cmdline_cb_verbose(struct sandbox_state *state, } SANDBOX_CMDLINE_OPT_SHORT(verbose, 'v', 0, "Show test output"); +static int sandbox_cmdline_cb_log_level(struct sandbox_state *state, + const char *arg) +{ + state->default_log_level = simple_strtol(arg, NULL, 10); + + return 0; +} +SANDBOX_CMDLINE_OPT_SHORT(log_level, 'L', 1, + "Set log level (0=panic, 7=debug)"); + int board_run_command(const char *cmdline) { printf("## Commands are disabled. Please enable CONFIG_CMDLINE.\n"); @@ -304,15 +314,14 @@ int main(int argc, char *argv[]) if (ret) goto err; - /* Remove old memory file if required */ - if (state->ram_buf_rm && state->ram_buf_fname) - os_unlink(state->ram_buf_fname); - memset(&data, '\0', sizeof(data)); gd = &data; #if CONFIG_VAL(SYS_MALLOC_F_LEN) gd->malloc_base = CONFIG_MALLOC_F_ADDR; #endif +#if CONFIG_IS_ENABLED(LOG) + gd->default_log_level = state->default_log_level; +#endif setup_ram_buf(state); /* Do pre- and post-relocation init */ diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c index 04a11fe..d3b9c05 100644 --- a/arch/sandbox/cpu/state.c +++ b/arch/sandbox/cpu/state.c @@ -393,7 +393,7 @@ int state_uninit(void) state = &main_state; - if (state->write_ram_buf && !state->ram_buf_rm) { + if (state->write_ram_buf) { err = os_write_ram_buf(state->ram_buf_fname); if (err) { printf("Failed to write RAM buffer\n"); @@ -408,6 +408,10 @@ int state_uninit(void) } } + /* Remove old memory file if required */ + if (state->ram_buf_rm && state->ram_buf_fname) + os_unlink(state->ram_buf_fname); + /* Delete this at the last moment so as not to upset gdb too much */ if (state->jumped_fname) os_unlink(state->jumped_fname); diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts index 48db781..fb866e8 100644 --- a/arch/sandbox/dts/sandbox.dts +++ b/arch/sandbox/dts/sandbox.dts @@ -18,7 +18,7 @@ stdout-path = "/serial"; }; - cros_ec: cros-ec@0 { + cros_ec: cros-ec { reg = <0 0>; compatible = "google,cros-ec-sandbox"; @@ -26,23 +26,23 @@ * This describes the flash memory within the EC. Note * that the STM32L flash erases to 0, not 0xff. */ - #address-cells = <1>; - #size-cells = <1>; - flash@8000000 { - reg = <0x08000000 0x20000>; + flash { + image-pos = <0x08000000>; + size = <0x20000>; erase-value = <0>; - #address-cells = <1>; - #size-cells = <1>; /* Information for sandbox */ ro { - reg = <0 0xf000>; + image-pos = <0>; + size = <0xf000>; }; wp-ro { - reg = <0xf000 0x1000>; + image-pos = <0xf000>; + size = <0x1000>; }; rw { - reg = <0x10000 0x10000>; + image-pos = <0x10000>; + size = <0x10000>; }; }; }; diff --git a/arch/sandbox/dts/sandbox64.dts b/arch/sandbox/dts/sandbox64.dts index 0e32fda..2c6d351 100644 --- a/arch/sandbox/dts/sandbox64.dts +++ b/arch/sandbox/dts/sandbox64.dts @@ -17,7 +17,7 @@ stdout-path = "/serial"; }; - cros_ec: cros-ec@0 { + cros_ec: cros-ec { reg = <0 0 0 0>; compatible = "google,cros-ec-sandbox"; @@ -25,23 +25,23 @@ * This describes the flash memory within the EC. Note * that the STM32L flash erases to 0, not 0xff. */ - #address-cells = <1>; - #size-cells = <1>; - flash@8000000 { - reg = <0x08000000 0x20000>; + flash { + image-pos = <0x08000000>; + size = <0x20000>; erase-value = <0>; - #address-cells = <1>; - #size-cells = <1>; /* Information for sandbox */ ro { - reg = <0 0xf000>; + image-pos = <0>; + size = <0xf000>; }; wp-ro { - reg = <0xf000 0x1000>; + image-pos = <0xf000>; + size = <0x1000>; }; rw { - reg = <0x10000 0x10000>; + image-pos = <0x10000>; + size = <0x10000>; }; }; }; diff --git a/arch/sandbox/dts/sandbox_pmic.dtsi b/arch/sandbox/dts/sandbox_pmic.dtsi index 403656f..5ecafaa 100644 --- a/arch/sandbox/dts/sandbox_pmic.dtsi +++ b/arch/sandbox/dts/sandbox_pmic.dtsi @@ -60,7 +60,7 @@ regulator-max-microvolt = <3300000>; }; - ldo1 { + ldo_1: ldo1 { regulator-name = "VDD_EMMC_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index ad94901..420b72f 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -11,6 +11,8 @@ eth0 = "/eth@10002000"; eth3 = ð_3; eth5 = ð_5; + gpio1 = &gpio_a; + gpio2 = &gpio_b; i2c0 = "/i2c@0"; mmc0 = "/mmc0"; mmc1 = "/mmc1"; @@ -40,6 +42,35 @@ osd0 = "/osd"; }; + cros_ec: cros-ec { + reg = <0 0>; + compatible = "google,cros-ec-sandbox"; + + /* + * This describes the flash memory within the EC. Note + * that the STM32L flash erases to 0, not 0xff. + */ + flash { + image-pos = <0x08000000>; + size = <0x20000>; + erase-value = <0>; + + /* Information for sandbox */ + ro { + image-pos = <0>; + size = <0xf000>; + }; + wp-ro { + image-pos = <0xf000>; + size = <0x1000>; + }; + rw { + image-pos = <0x10000>; + size = <0x10000>; + }; + }; + }; + a-test { reg = <0 1>; compatible = "denx,u-boot-fdt-test"; @@ -62,6 +93,15 @@ reg = <2 1>; }; + backlight: backlight { + compatible = "pwm-backlight"; + enable-gpios = <&gpio_a 1>; + power-supply = <&ldo_1>; + pwms = <&pwm 0 1000>; + default-brightness-level = <5>; + brightness-levels = <0 16 32 64 128 170 202 234 255>; + }; + bind-test { bind-test-child1 { compatible = "sandbox,phy"; @@ -412,12 +452,14 @@ power-domains = <&pwrdom 2>; }; - pwm { + pwm: pwm { compatible = "sandbox,pwm"; + #pwm-cells = <2>; }; pwm2 { compatible = "sandbox,pwm"; + #pwm-cells = <2>; }; ram { @@ -454,6 +496,11 @@ remoteproc-name = "remoteproc-test-dev2"; }; + panel { + compatible = "simple-panel"; + backlight = <&backlight 0 100>; + }; + smem@0 { compatible = "sandbox,smem"; }; diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h index a612ce8..dcb6d5f 100644 --- a/arch/sandbox/include/asm/state.h +++ b/arch/sandbox/include/asm/state.h @@ -36,7 +36,6 @@ enum state_terminal_raw { }; struct sandbox_spi_info { - const char *spec; struct udevice *emul; }; @@ -89,6 +88,7 @@ struct sandbox_state { enum state_terminal_raw term_raw; /* Terminal raw/cooked */ bool skip_delays; /* Ignore any time delays (for test) */ bool show_test_output; /* Don't suppress stdout in tests */ + int default_log_level; /* Default log level for sandbox */ /* Pointer to information for each SPI bus/cs */ struct sandbox_spi_info spi[CONFIG_SANDBOX_SPI_MAX_BUS] diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h index 89f3d90..8e60f80 100644 --- a/arch/sandbox/include/asm/test.h +++ b/arch/sandbox/include/asm/test.h @@ -98,4 +98,19 @@ int sandbox_usb_keyb_add_string(struct udevice *dev, const char *str); * @buflen: length of buffer in bytes */ int sandbox_osd_get_mem(struct udevice *dev, u8 *buf, size_t buflen); + +/** + * sandbox_pwm_get_config() - get the PWM config for a channel + * + * @dev: Device to check + * @channel: Channel number to check + * @period_ns: Period of the PWM in nanoseconds + * @duty_ns: Current duty cycle of the PWM in nanoseconds + * @enable: true if the PWM is enabled + * @polarity: true if the PWM polarity is active high + * @return 0 if OK, -ENOSPC if the PWM number is invalid + */ +int sandbox_pwm_get_config(struct udevice *dev, uint channel, uint *period_nsp, + uint *duty_nsp, bool *enablep, bool *polarityp); + #endif diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index a6fd3a8..aaf0d07 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -55,10 +55,10 @@ static void board_final_cleanup(void) if (top_type == MTRR_TYPE_WRPROT) { struct mtrr_state state; - mtrr_open(&state); + mtrr_open(&state, true); wrmsrl(MTRR_PHYS_BASE_MSR(top_mtrr), 0); wrmsrl(MTRR_PHYS_MASK_MSR(top_mtrr), 0); - mtrr_close(&state); + mtrr_close(&state, true); } if (!fdtdec_get_config_bool(gd->fdt_blob, "u-boot,no-apm-finalize")) { diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c index 3094006..0939736 100644 --- a/arch/x86/cpu/mtrr.c +++ b/arch/x86/cpu/mtrr.c @@ -11,6 +11,11 @@ * System Programming */ +/* + * Note that any console output (e.g. debug()) in this file will likely fail + * since the MTRR registers are sometimes in flux. + */ + #include <common.h> #include <asm/io.h> #include <asm/msr.h> @@ -19,27 +24,29 @@ DECLARE_GLOBAL_DATA_PTR; /* Prepare to adjust MTRRs */ -void mtrr_open(struct mtrr_state *state) +void mtrr_open(struct mtrr_state *state, bool do_caches) { if (!gd->arch.has_mtrr) return; - state->enable_cache = dcache_status(); + if (do_caches) { + state->enable_cache = dcache_status(); - if (state->enable_cache) - disable_caches(); + if (state->enable_cache) + disable_caches(); + } state->deftype = native_read_msr(MTRR_DEF_TYPE_MSR); wrmsrl(MTRR_DEF_TYPE_MSR, state->deftype & ~MTRR_DEF_TYPE_EN); } /* Clean up after adjusting MTRRs, and enable them */ -void mtrr_close(struct mtrr_state *state) +void mtrr_close(struct mtrr_state *state, bool do_caches) { if (!gd->arch.has_mtrr) return; wrmsrl(MTRR_DEF_TYPE_MSR, state->deftype | MTRR_DEF_TYPE_EN); - if (state->enable_cache) + if (do_caches && state->enable_cache) enable_caches(); } @@ -50,10 +57,14 @@ int mtrr_commit(bool do_caches) uint64_t mask; int i; + debug("%s: enabled=%d, count=%d\n", __func__, gd->arch.has_mtrr, + gd->arch.mtrr_req_count); if (!gd->arch.has_mtrr) return -ENOSYS; - mtrr_open(&state); + debug("open\n"); + mtrr_open(&state, do_caches); + debug("open done\n"); for (i = 0; i < gd->arch.mtrr_req_count; i++, req++) { mask = ~(req->size - 1); mask &= (1ULL << CONFIG_CPU_ADDR_BITS) - 1; @@ -62,9 +73,12 @@ int mtrr_commit(bool do_caches) } /* Clear the ones that are unused */ + debug("clear\n"); for (; i < MTRR_COUNT; i++) wrmsrl(MTRR_PHYS_MASK_MSR(i), 0); - mtrr_close(&state); + debug("close\n"); + mtrr_close(&state, do_caches); + debug("mtrr done\n"); return 0; } @@ -74,6 +88,7 @@ int mtrr_add_request(int type, uint64_t start, uint64_t size) struct mtrr_request *req; uint64_t mask; + debug("%s: count=%d\n", __func__, gd->arch.mtrr_req_count); if (!gd->arch.has_mtrr) return -ENOSYS; diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h index 05cd7b7..2d897f8 100644 --- a/arch/x86/include/asm/mtrr.h +++ b/arch/x86/include/asm/mtrr.h @@ -77,8 +77,9 @@ struct mtrr_state { * possibly the cache. * * @state: Empty structure to pass in to hold settings + * @do_caches: true to disable caches before opening */ -void mtrr_open(struct mtrr_state *state); +void mtrr_open(struct mtrr_state *state, bool do_caches); /** * mtrr_open() - Clean up after adjusting MTRRs, and enable them @@ -86,8 +87,9 @@ void mtrr_open(struct mtrr_state *state); * This uses the structure containing information returned from mtrr_open(). * * @state: Structure from mtrr_open() + * @state: true to restore cache state to that before mtrr_open() */ -void mtrr_close(struct mtrr_state *state); +void mtrr_close(struct mtrr_state *state, bool do_caches); /** * mtrr_add_request() - Add a new MTRR request |