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authorChee Hong Ang <chee.hong.ang@intel.com>2020-12-24 18:21:06 +0800
committerLey Foon Tan <ley.foon.tan@intel.com>2021-01-15 17:48:37 +0800
commit018d27f2512ef64cb31ac0928c0224076e0e5408 (patch)
tree5109f94ba8a556f1b7a643bbc7cd19fcbee5fa53 /arch
parenta90ae0167bd144124b5386567d5475a4516d0c9b (diff)
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arm: socfpga: soc64: Add ATF support for Reset Manager driver
In non-secure mode (EL2), Reset Manager driver calls the SMC/PSCI service provided by ATF to enable/disable the SOCFPGA bridges. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-socfpga/reset_manager_s10.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/reset_manager_s10.c b/arch/arm/mach-socfpga/reset_manager_s10.c
index 3746e6a..af8f2c0 100644
--- a/arch/arm/mach-socfpga/reset_manager_s10.c
+++ b/arch/arm/mach-socfpga/reset_manager_s10.c
@@ -5,11 +5,14 @@
*/
#include <common.h>
+#include <hang.h>
#include <asm/io.h>
#include <asm/arch/reset_manager.h>
+#include <asm/arch/smc_api.h>
#include <asm/arch/system_manager.h>
#include <dt-bindings/reset/altr,rst-mgr-s10.h>
#include <linux/iopoll.h>
+#include <linux/intel-smc.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -55,6 +58,15 @@ void socfpga_per_reset_all(void)
void socfpga_bridges_reset(int enable)
{
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF)
+ u64 arg = enable;
+
+ int ret = invoke_smc(INTEL_SIP_SMC_HPS_SET_BRIDGES, &arg, 1, NULL, 0);
+ if (ret) {
+ printf("SMC call failed with error %d in %s.\n", ret, __func__);
+ return;
+ }
+#else
u32 reg;
if (enable) {
@@ -101,6 +113,7 @@ void socfpga_bridges_reset(int enable)
/* Disable NOC timeout */
writel(0, socfpga_get_sysmgr_addr() + SYSMGR_SOC64_NOC_TIMEOUT);
}
+#endif
}
/*