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authorPeng Fan <peng.fan@nxp.com>2022-04-29 16:18:49 +0800
committerStefano Babic <sbabic@denx.de>2022-05-20 09:30:28 +0200
commita1d675ac7726bd2cc979be7d615c732667edf8e5 (patch)
treeb4f76105ecb20da3df74439f3c830910e9ffda60 /arch
parent5dd9db8f7df4a892739d81297d09f0af59bd8010 (diff)
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imx: imx8m: drop uneeded check
All i.MX8M needs TZASC ID SWAP set and locked, no need the check to waste cpu cycles. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-imx/imx8m/soc.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index b4c56c3..d261a07 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -72,15 +72,13 @@ void enable_tzc380(void)
* According to TRM, TZASC_ID_SWAP_BYPASS should be set in
* order to avoid AXI Bus errors when GPU is in use
*/
- if (is_imx8mq() || is_imx8mm() || is_imx8mn() || is_imx8mp())
- setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS);
+ setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS);
/*
* imx8mn and imx8mp implements the lock bit for
* TZASC_ID_SWAP_BYPASS, enable it to lock settings
*/
- if (is_imx8mn() || is_imx8mp())
- setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS_LOCK);
+ setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS_LOCK);
/*
* set Region 0 attribute to allow secure and non-secure