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| author | Parth Gajjar <parth.gajjar@amd.com> | 2023-07-10 14:37:29 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2023-07-21 09:00:38 +0200 |
| commit | d95fc99a740583f8656f0b048071f1ec34c963a4 (patch) | |
| tree | 110762fdad14ee8d2ba908506bec74a2c93e780d /arch | |
| parent | 28dc356e66c98daedffc4960919f13aeb4b159de (diff) | |
| download | u-boot-d95fc99a740583f8656f0b048071f1ec34c963a4.zip u-boot-d95fc99a740583f8656f0b048071f1ec34c963a4.tar.gz u-boot-d95fc99a740583f8656f0b048071f1ec34c963a4.tar.bz2 | |
arm64: zynqmp: Update MALI 400 interrupt and clock names
Motivation for the commit is to utilize the upstream community
device tree so that the either modified ARM Mali 400 driver
or upstream lima driver can be used.
Signed-off-by: Parth Gajjar <parth.gajjar@amd.com>
Signed-off-by: Vishal Sagar <vishal.sagar@amd.com>
Link: https://lore.kernel.org/r/1678181001-2327-2-git-send-email-parth.gajjar@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/89d046a9da5638e8b4918f80f3245d73ea46f99f.1688992653.git.michal.simek@amd.com
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/zynqmp-clk-ccf.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp.dtsi | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 173e4bc..4d44924 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -126,7 +126,7 @@ }; &gpu { - clocks = <&zynqmp_clk GPU_REF>, <&zynqmp_clk GPU_PP0_REF>, <&zynqmp_clk GPU_PP1_REF>; + clocks = <&zynqmp_clk GPU_REF>, <&zynqmp_clk GPU_PP0_REF>; }; &lpd_dma_chan1 { diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 5f1e163..38114d5 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -396,12 +396,12 @@ gpu: gpu@fd4b0000 { status = "disabled"; - compatible = "arm,mali-400", "arm,mali-utgard"; + compatible = "xlnx,zynqmp-mali", "arm,mali-400"; reg = <0x0 0xfd4b0000 0x0 0x10000>; interrupt-parent = <&gic>; interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>; - interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1"; - clock-names = "gpu", "gpu_pp0", "gpu_pp1"; + interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", "ppmmu1"; + clock-names = "bus", "core"; power-domains = <&zynqmp_firmware PD_GPU>; }; |