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| author | Harini Katakam <harini.katakam@amd.com> | 2023-07-10 14:37:32 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2023-07-21 09:00:38 +0200 |
| commit | 414fc91f4ecbcd00a7d23e33baf39a0e2f6bac96 (patch) | |
| tree | 7e237a951b177903529a10b48c347d6fef3eb92a /arch | |
| parent | 369d04d6430f1cd3678b99be4e0baaee26b865b5 (diff) | |
| download | u-boot-414fc91f4ecbcd00a7d23e33baf39a0e2f6bac96.zip u-boot-414fc91f4ecbcd00a7d23e33baf39a0e2f6bac96.tar.gz u-boot-414fc91f4ecbcd00a7d23e33baf39a0e2f6bac96.tar.bz2 | |
arm64: zynqmp: Increase reset assert time for TI SGMII PHY
Increase reset assert time for TI SGMII PHY on KR260 CC starting
6.1 kernel. This PHY does not come out of reset with the existing
100us pulse width as per testing on multiple carrier cards. The reset
is driven via a PCA9570 I2C expander. The expander driver was updated
to an upstream version in 6.1 where gpio_chip _set was optimized.
Delays in earlier kernels may have masked this issue. This is a safe
workaround value for assert pulse width before the discussions are
resolved with TI.
Signed-off-by: Harini Katakam <harini.katakam@amd.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8fb9f17d43a43ef504c9f29006cd686cce8ac98b.1688992653.git.michal.simek@amd.com
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/zynqmp-sck-kr-g-revA.dts | 2 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-sck-kr-g-revB.dts | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts index caaf71d..d318773 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts @@ -210,7 +210,7 @@ ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; ti,dp83867-rxctrl-strap-quirk; - reset-assert-us = <100>; + reset-assert-us = <300>; reset-deassert-us = <280>; reset-gpios = <&slg7xl45106 5 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts index f9d8755..69dba07 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts @@ -210,7 +210,7 @@ ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; ti,dp83867-rxctrl-strap-quirk; - reset-assert-us = <100>; + reset-assert-us = <300>; reset-deassert-us = <280>; reset-gpios = <&slg7xl45106 5 GPIO_ACTIVE_LOW>; }; |