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| author | Ashok Reddy Soma <ashok.reddy.soma@amd.com> | 2023-06-14 06:13:50 -0600 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2023-07-21 09:00:38 +0200 |
| commit | 38e0fc06b20d527e99ae18bb99c71c5e83b86864 (patch) | |
| tree | 07740fe46f0d2cd24f38ae9ea45d9c4a91ad43bd /arch | |
| parent | 96683d3436081cd30010ea2d2e3dc7236fbffe7e (diff) | |
| download | u-boot-38e0fc06b20d527e99ae18bb99c71c5e83b86864.zip u-boot-38e0fc06b20d527e99ae18bb99c71c5e83b86864.tar.gz u-boot-38e0fc06b20d527e99ae18bb99c71c5e83b86864.tar.bz2 | |
xilinx: versal-net: Add mini ospi configuration
Add support for Versal NET mini Octal SPI flash configuration. This runs
from onchip memory, so it has to be compact. Hence only Octal SPI
related settings are enabled.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230614121351.21521-3-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/dts/versal-net-mini-ospi-single.dts | 19 | ||||
| -rw-r--r-- | arch/arm/dts/versal-net-mini-ospi.dtsi | 78 |
3 files changed, 98 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f9bc0a9..5975f80 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -416,6 +416,7 @@ dtb-$(CONFIG_ARCH_VERSAL) += \ xilinx-versal-virt.dtb dtb-$(CONFIG_ARCH_VERSAL_NET) += \ versal-net-mini.dtb \ + versal-net-mini-ospi-single.dtb \ versal-net-mini-qspi-single.dtb \ xilinx-versal-net-virt.dtb dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \ diff --git a/arch/arm/dts/versal-net-mini-ospi-single.dts b/arch/arm/dts/versal-net-mini-ospi-single.dts new file mode 100644 index 0000000..11a8e8b --- /dev/null +++ b/arch/arm/dts/versal-net-mini-ospi-single.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal NET OSPI single DTS + * + * (C) Copyright 2023, Advanced Micro Devices, Inc. + * + * Michal Simek <michal.simek@amd.com> + * Ashok Reddy Soma <ashok.reddy.soma@amd.com> + */ + +#include "versal-net-mini-ospi.dtsi" + +/ { + model = "Xilinx Versal NET MINI OSPI SINGLE"; +}; + +&flash0 { + spi-rx-bus-width = <8>; +}; diff --git a/arch/arm/dts/versal-net-mini-ospi.dtsi b/arch/arm/dts/versal-net-mini-ospi.dtsi new file mode 100644 index 0000000..ce8e215 --- /dev/null +++ b/arch/arm/dts/versal-net-mini-ospi.dtsi @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal NET Mini OSPI Configuration + * + * (C) Copyright 2023, Advanced Micro Devices, Inc. + * + * Michal Simek <michal.simek@amd.com> + * Ashok Reddy Soma <ashok.reddy.soma@amd.com> + */ + +/dts-v1/; + +/ { + compatible = "xlnx,versal-net-mini"; + #address-cells = <2>; + #size-cells = <2>; + model = "Xilinx Versal NET MINI OSPI"; + + aliases { + serial0 = &dcc; + spi0 = &ospi; + }; + + chosen { + stdout-path = "serial0:115200"; + }; + + memory@bbf00000 { + device_type = "memory"; + reg = <0 0xBBF00000 0 0x100000>; + }; + + clk125: clk125 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + dcc: dcc { + compatible = "arm,dcc"; + status = "okay"; + bootph-all; + }; + + amba: amba { + bootph-all; + compatible = "simple-bus"; + #address-cells = <0x2>; + #size-cells = <0x2>; + ranges; + + ospi: spi@f1010000 { + compatible = "cadence,qspi", "cdns,qspi-nor"; + status = "okay"; + reg = <0 0xf1010000 0 0x10000>, <0 0xc0000000 0 0x20000000>; + clock-names = "ref_clk", "pclk"; + clocks = <&clk125>, <&clk125>; + bus-num = <2>; + num-cs = <1>; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,is-dma = <1>; + cdns,is-stig-pgm = <1>; + cdns,trigger-address = <0xc0000000>; + #address-cells = <1>; + #size-cells = <0>; + + flash0: flash@0 { + compatible = "mt35xu02g", "micron,m25p80", + "jedec,spi-nor"; + reg = <0>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <20000000>; + }; + }; + }; +}; |